JP3142857B2 - Voltage controlled oscillator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a voltage controlled oscillator that uses a surface acoustic wave delay line and can vary an oscillation frequency by a control voltage.

(Prior Art) In recent years, demand for wireless devices such as cordless phones and car phones has been increasing. These devices perform communication by selecting a vacant frequency channel from among frequency bands allocated by the Radio Law by a multi-channel access method. For this reason, a reference signal oscillator used in the transmission circuit and the reception circuit, that is, a so-called local oscillator, requires a voltage-controlled oscillator having a variable oscillation frequency. Further, from the viewpoint of effective use of the frequency, the frequency interval of the channel of the device is set to be extremely narrow, for example, 25 KHz. For this reason, the reference signal generated by the local oscillator must be extremely stable and have low phase noise so as not to disturb the adjacent channel.

As an oscillator having a stable oscillation frequency and low phase noise, an oscillator using a piezoelectric element such as a surface acoustic wave element of a quartz oscillator is well known. In an oscillator, stabilizing the oscillation frequency and making the frequency variable are inconsistent issues, but using the above piezoelectric element,
Several oscillators with variable frequencies have been devised.
The most common is to connect a variable capacitance element such as a variable capacitance diode in series or parallel with the piezoelectric element, and control the bias voltage applied to the element to change the capacitance, thereby reducing the load capacitance to the piezoelectric element. It is a voltage oscillator that varies the oscillation frequency by changing it.

As another device, a voltage controlled oscillator using a surface acoustic wave delay line shown in FIG. 4 has been devised.

Hereinafter, this voltage controlled oscillator will be described with reference to the drawings. In FIG. 4, the emitter of the transistor 101 is connected to the ground terminal 102, and the collector is connected to each emitter of the transistors 103 and 104. The collector of the transistor 103 is directly connected to the power supply terminal 106 via the resistor 105, and the collector of the transistor 104 is connected to the power supply terminal 106. The base of the transistor 103 and the transistor 104
Are connected to a control terminal 107 and a control terminal 108, respectively. The above circuit constitutes a first variable amplification degree amplifier. That is, the input current input to the base of the transistor 101 is amplified,
1 collector current. The potential of the control terminal 107 is the control terminal
When the potential is the same as the potential of the transistor 108, the base potentials of the transistor 103 and the transistor 104 become the same, so that the collector current of the transistor 101 flows between the collectors and the emitters of the transistors 103 and 104 by 1/2. Therefore, half of the current amplified by the transistor 101 flows between the resistor 105 and the collector and the emitter of the transistor 104. However, when the potential of the control terminal 107 is higher than the potential of the control terminal 108, the base potential of the transistor 103 becomes higher than the base potential of the transistor 104,
The ratio of the collector current of the transistor 101 flowing through the transistor 03 increases, and the ratio of the current flowing through the transistor 104 decreases. Therefore, the transistor 1 flowing through the resistor 105
The proportion of the current amplified by 01 also decreases. Resistance 105
Is considered as a load, the amplification degree, that is, the ratio of the load current to the input current is reduced. Conversely, the control terminal
If the potential of 108 is higher than the potential of the control terminal 107,
The ratio of the current amplified by the transistor 101 flowing through the transistor 105 increases, and the amplification degree increases. in this way,
An amplifier whose amplification degree can be varied by the potentials of the control terminals 107 and 108 is configured.

Next, in FIG. 4, the emitter of the transistor 109 is connected to the ground terminal 102, and the collector is connected to the transistor 11
0,111 are connected to each emitter. Transistor 110
Immediately thereafter, the collector of the transistor 111 is connected to the power supply terminal 106 via the resistor 105. Further, the base of the transistor 110 and the base of the transistor 111 are connected to the control terminal 108 and the control terminal 107, respectively. The above-described circuit constitutes a second variable amplification degree amplifier. Note that the resistor 105 is
Shared with the first variable gain amplifier, but with a resistor 105
Since the base of the transistor 111 whose collector is connected to the control terminal 107 is connected to the control terminal 107 opposite to the first amplification variable amplifier, the amplification of the second amplification variable amplifier with respect to the potential of the control terminals 107 and 108 is performed. Is opposite to the change in the amplification of the first variable amplification amplifier.

Since the resistor 105 is shared, the respective output currents of the first and second variable gain amplifiers are added by the resistor 105.

The change of the amplification degree with respect to the potential of the control terminals 107 and 108 is
When the potential of the control terminal 107 is higher than the potential of the control terminal 108, the current flowing through the resistor 105 includes the second variable gain. The ratio of the current amplified by the amplifier becomes larger than the ratio of the current amplified by the first variable gain amplifier. Conversely, when the potential of the control terminal 108 is higher than the potential of the control terminal 107, the ratio of the current amplified by the first amplification variable amplifier to the current flowing through the resistor 105 is
It becomes larger than the ratio of the current amplified by the second variable gain amplifier.

Here, assuming that signals having the same frequency and a phase difference of 90 degrees are input to the bases of the transistors 101 and 109, respectively, the phase of the current flowing through the resistor 105 is determined by the potential difference between the control terminals 107 and 108. Can be changed by 90 degrees. Because, the current amplified by the first variable gain amplifier and flowing through the resistor 105, and the current amplified by the second variable gain amplifier and flowing through the resistor 105,
Considering each as a vector, these two vectors are 90
Although having a phase difference of degrees, they are combined by the resistor 105 to form one combined vector. Since the magnitudes of the two vectors change oppositely depending on the potential difference between the control terminals 107 and 108, the composite vector moves between the two vectors. Therefore, the phase of the combined vector, that is, the phase of the current flowing through the resistor 105 can be changed by 90 degrees by the potential difference. Since the phase of the current of the resistor 105 changes by 90 degrees, the resistor 105 and the transistors 104 and 11
The phase of the voltage at the connection point with each of the collectors also changes by 90 degrees.

Next, in FIG. 4, the voltage at the connection point between the resistor 105 and the collectors of the transistors 104 and 111 is amplified by the amplifier 112, output to the output terminal 114, and the input interdigital electrode of the surface acoustic wave delay line 115. Entered in 116. One end of the first output interdigital electrode 117 of the surface acoustic wave delay line 115 is connected to the base of the transistor 101, and the other end is grounded. One end of the second output interdigital electrode 118 of the surface acoustic wave delay line 115 is connected to the base of the transistor 109, and the other end is grounded. The acoustic distance between the input interdigital electrode 116 of the surface acoustic wave delay line 115 and the first output interdigital 117, and the acoustic distance between the input interdigital electrode 116 and the second output interdigital 118, Designed to differ by 1/4 wavelength. Accordingly, a signal having a phase difference of 90 degrees is input to each base of the transistors 101 and 109. In addition, transistor 10
A bias voltage is applied to each of the bases 1 and 109 from a bias circuit connected to the power supply terminal 106 and the ground terminal 102 via resistors 119 and 120, respectively.

With the above configuration, a voltage controlled oscillation circuit is configured.
Hereinafter, the operation will be described. Signals having a phase difference of 90 degrees are input to the inputs of the circuits other than the surface acoustic wave delay line 115, that is, to the bases of the transistors 101 and 109 by the surface acoustic wave delay line 115. This signal is amplified and returned to the surface acoustic wave delay line 115. Therefore, the surface acoustic wave delay line 115
Is larger than the absolute value of the loss of the surface acoustic wave delay line 115, and the surface acoustic wave delay line 115
The signal oscillates at a frequency at which the phase of the signal fed back through the other circuit is 0 degrees or an integral multiple of 360 degrees. In the surface acoustic wave delay line 115, since the phase between the input and output changes in the pass frequency band depending on the frequency, the phase of the feedback signal can be changed by the potential difference between the control terminals 107 and 108. For example, the oscillation frequency can be changed.

The voltage-controlled oscillation circuit shown in FIG. 4 described above has a wider frequency variable width and a certain degree of surface acoustic wave delay line design compared to a voltage-controlled oscillation circuit using a crystal resonator or a surface acoustic wave resonator. There are features such as being able to obtain an arbitrary frequency variable width, and being extremely suitable for integrated circuits because a variable capacitance element, an inductance, and a large-capacity capacitor are not required.

By the way, within the pass frequency range of the surface acoustic wave delay line, the amount of change in phase difference between input and output with respect to frequency is 36
It is possible to design so as to be 0 degrees or more by increasing the distance between the input interdigital electrode and the output interdigital electrode. However, it is difficult to design the angle to be less than 360 degrees because the input interdigital electrode and the output interdigital electrode overlap. In the voltage controlled oscillation circuit shown in FIG. 4, the amount of phase change of the feedback signal obtained by varying the amplification of the first and second amplification variable amplifiers by the control voltage is 90%.
Degree, and uses only 1/4 or less of the pass band of the surface acoustic wave delay line. Naturally, the change range of the oscillation frequency is also 1/4 or less of the pass band of the surface acoustic wave delay line. Thus, in the conventional voltage controlled oscillator as shown in FIG.
There is a problem that the performance of the surface acoustic wave delay line cannot be used to the maximum.

(Problems to be Solved by the Invention) According to the present invention, in a voltage controlled oscillator using a surface acoustic wave delay line, the variable range of the oscillation frequency is a fraction of the pass band of the surface acoustic wave delay line, An object of the present invention is to solve the problem that the performance of a surface acoustic wave delay line cannot be used to the maximum.

[Configuration of the invention]

(Means for Solving the Problems) According to the present invention, two signals having different phases obtained by a surface acoustic wave delay line are respectively amplified by variable amplification amplifiers and then added to change the phase of the signals. In a voltage controlled oscillator configured to feed back to the surface acoustic wave delay line, the amplitudes of the two variable gain amplifiers can be varied according to a control voltage, and the phases of output signals thereof can be inverted. .

(Operation) In the above configuration, assuming that the phase difference between two signals obtained by the surface acoustic wave delay line is 90 degrees, the output signals of the two variable gain amplifiers that amplify the signals also have a phase difference of 90 degrees. Have. Assuming that one is a real vector and the other is an imaginary vector, first, in the first range of the variable range of the control voltage, the two amplification variable amplifiers are respectively a positive-phase real number vector and a positive-phase imaginary vector, that is, A vector having a phase of 0 degree and a vector having a phase of 90 degrees are output. Since the absolute values of these two vectors change according to the control voltage, the phase of the combined vector obtained by adding these two signals changes in the range of 0 to 90 degrees according to the control voltage. Next, in the second range of the control voltage variable range, the two amplification degree variable amplifiers output a negative-phase real vector and a positive-phase imaginary vector, that is, a 180-degree vector and a 90-degree vector, respectively. I do. Therefore, the phase of the composite vector is from 90 degrees according to the control voltage.
It changes in the range of 180 degrees. Next, in the third range of the variable range of the control voltage, the two amplification variable amplifiers respectively output a negative-phase real vector and a negative-phase imaginary vector, that is, a 180-degree vector and a 270-degree vector, respectively. . Therefore, the phase of the combined vector changes in a range from 180 degrees to 270 degrees according to the control voltage. Finally, in the fourth range of the variable range of the control voltage, the two amplification degree variable amplifiers output a real vector having a positive phase and an imaginary vector having a negative phase, that is, a vector having a phase of 360 degrees and a vector having a phase of 270 degrees, respectively. . Therefore, the phase of the combined vector changes in a range from 270 degrees to 360 degrees according to the control voltage.
As described above, the composite vector changes in a range from 0 degrees to 360 degrees according to the control voltage. This signal is fed back to the surface acoustic wave delay line. Therefore, the absolute value of the amplification degree of the circuit excluding the surface acoustic wave delay line is greater than the absolute value of the loss of the surface acoustic wave delay line, and the surface acoustic wave delay line is a signal that is fed back through another circuit. Oscillates at a frequency at which the phase of 0 is an integer multiple of 0 or 360 degrees. In the surface acoustic wave delay line, the phase between the input and the output changes depending on the frequency within the pass frequency band, so that the feedback signal, that is, the phase of the composite vector changes, so that the oscillation frequency depends on the control voltage. Change.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention. In FIG. 1, the emitter of the transistor 1 is connected to the ground terminal 2 and the collector is connected to each emitter of the transistors 3 and 4. Transistor 3
Are connected to a power supply terminal 7 via a resistor 5 and the collector of the transistor 4 is connected via a resistor 6 respectively. The above circuit constitutes a first variable amplification degree amplifier. The emitter of the transistor 8 is connected to the ground terminal 2, and the collector is connected to each emitter of the transistors 9 and 10. The collector of the transistor 9 is connected to the power supply terminal 7 via the resistor 5, and the collector of the transistor 10 is connected to the power supply terminal 7 via the resistor 6. The above-described circuit constitutes a second variable amplification degree amplifier. Further, each collector of the transistors 3 and 9 is connected to a differential amplifier 11.
And the collectors of transistors 4 and 10 are connected to the other input. Differential amplifier 11
Is connected to an output terminal 12 and to an input interdigital electrode 14 of a surface acoustic wave delay line 13. One end of the first output interdigital electrode 15 of the surface acoustic wave delay line 13 is connected to the base of the transistor 1, and the other end is grounded. One end of the second output interdigital electrode 16 of the surface acoustic wave delay line 13 is connected to the base of the transistor 8, and the other end is grounded. The acoustic distance between the input interdigital electrode 14 of the surface acoustic wave delay line 13 and the first output interdigital 15, and the acoustic distance between the input interdigital electrode 14 and the second output interdigital 16, Designed to differ by 1/4 wavelength. As a result, signals having a phase difference of 90 degrees are input to the bases of the transistors 1 and 8, respectively. Further, a bias voltage is applied to the bases of the transistors 1 and 8 from the bias circuit 17 connected to the power supply terminal 7 and the ground terminal 2 via the resistors 18 and 19, respectively. Further, the bases of the transistors 3, 4, 9, and 10 are connected to control terminals 20, 21, 22, and 23, respectively.

The above is the circuit configuration of this embodiment. Next, the operation of this embodiment will be described.

First, the operation of the first variable gain amplifier will be described, ignoring the operation of the second variable gain amplifier, for easy understanding of the description. In the circuit shown in FIG. 1, the signal input from the first output interdigital electrode 15 to the base of the transistor 1 is amplified to become the collector current of the transistor 1, and the collector current is passed through the transistor 3 and the transistor 4. Flows. A control voltage is applied to each of the bases of the transistors 3 and 4 from the control terminals 20 and 21. When the control voltages are the same, the transistors 3 and 4
A transistor 1 is connected between each collector and emitter of
1/2 of the collector current flows. Further, the collector current of the transistor 3 flows through the resistor 5, and the collector current of the transistor 4 flows through the resistor 6. Therefore, a current having the same magnitude and the same phase flows through the resistors 5 and 6, so that a potential difference, that is, a differential voltage does not occur between the two inputs of the differential amplifier 11. Next, when the potential of the control terminal 20 rises with respect to the potential of the control terminal 21, the base potential of the transistor 3 rises and the base potential of the transistor 4 falls, so that the collector current of the transistor 3 increases and the transistor 4 Collector current decreases. Therefore, the resistance 5
, The ratio of the collector current of the transistor 1 flowing through the resistor 6 becomes larger than the ratio flowing through the resistor 6, and a differential voltage is generated between the inputs of the differential amplifier 11. Next, the control terminal
When the potential of the control terminal 20 decreases with respect to the potential of 21, the base potential of the transistor 3 decreases and the base potential of the transistor 4 increases, so that the collector current of the transistor 3 decreases and the collector current of the transistor 4 increases. I do. Therefore, the ratio of the collector current of the transistor 1 flowing through the resistor 6 becomes larger than the ratio of flowing through the resistor 5, and a differential voltage is generated between the inputs of the differential amplifier 11. If the phase of the differential voltage generated at this time is 0 degree when the phase of the differential voltage generated when the potential of the control terminal 20 is higher than the potential of the control terminal 21, the current ratio between the resistors 5 and 6 is inverted. Therefore, the phase is 180 degrees. Then, the differential voltage generated between the inputs of the differential amplifier 11 is amplified by the differential amplifier 11 and fed back to the surface acoustic wave delay line. Note that the absolute value of the differential voltage changes according to the potential difference between the control terminal 20 and the control terminal 21.

To summarize the operation of the first variable gain amplifier,
When the potential of the control terminal 20 is higher than the potential of the control terminal 21, a differential voltage having a phase of 0 degree is generated between the inputs of the differential amplifier 11, and as the potential difference between the control terminals 20 and 21 decreases, The absolute value becomes smaller. And control terminals 20 and 21
Becomes the same potential, the differential voltage becomes zero. further,
When the potential of the control terminal 20 becomes lower than the potential of the control terminal 21,
A differential voltage having a phase of 180 degrees is generated, and its absolute value increases as the potential difference between the control terminals 20 and 21 increases.

As described above, the first variable gain amplifier is connected to the control terminal 20.
In accordance with the control voltage applied to and, the amplification degree changes, and the phase of the output signal is inverted.

Similarly, the second variable gain amplifier also changes its gain according to the control voltage applied to the control terminals 22 and 23, and the phase of the output signal is inverted.

Incidentally, the resistors 5 and 6 are shared by the first and second variable gain amplifiers, and currents of both the first and second variable gain amplifiers flow. That is, the output currents of the first and second variable gain amplifiers are added by the resistors 5 and 6. Therefore, the differential voltage generated between the inputs of the differential amplifier 11 is also the sum of the voltages generated by the first and second variable gain amplifiers. Further, signals having phases different from each other by 90 degrees are input to the first and second amplification degree variable amplifiers by the surface acoustic wave delay line 13. Therefore, based on the output signal of the first variable gain amplifier, signals of 90 degrees and 270 degrees are output from the second variable gain amplifier. When the output signal of the first variable gain amplifier and the output signal of the second variable gain amplifier are considered as vectors, respectively, these two vectors are resistors 5 and 6.
To form one combined vector.

Next, in the embodiment of FIG. 1, the operation can be considered in four states according to the control voltage applied to the control terminals 20, 21, 22, and 23.

First, in the first state, the potential of the control terminal 20 is
And the potential of the control terminal 22 is higher than the potential of the control terminal 23. In this case, a signal having a phase of 0 degree is output from the first variable gain amplifier, and a signal having a 90 degree phase is output from the second variable gain amplifier. Therefore, by varying the potential difference between the control terminals 20 and 21 and the potential difference between the control terminals 22 and 23, the phase of the combined vector changes in the range of 0 to 90 degrees.

The second state is a state in which the potential of the control terminal 20 is lower than the potential of the control terminal 21 and the potential of the control terminal 22 is higher than the potential of the control terminal 23. In this case, a signal having a phase of 180 degrees is output from the first variable gain amplifier, and a signal having a phase of 90 degrees is output from the second variable gain amplifier. Therefore,
By varying the potential difference between the control terminals 20 and 21 and the potential difference between the control terminals 22 and 23, the phase of the composite vector changes in a range from 90 degrees to 180 degrees.

The third state is a state in which the potential of the control terminal 20 is lower than the potential of the control terminal 21 and the potential of the control terminal 22 is lower than the potential of the control terminal 23. In this case, a signal having a phase of 180 degrees is output from the first variable gain amplifier, and a signal having a phase of 270 degrees is output from the second variable gain amplifier. Therefore, by varying the potential difference between the control terminals 20 and 21 and the potential difference between the control terminals 22 and 23, the phase of the combined vector changes in a range from 180 degrees to 270 degrees.

Finally, in the fourth state, the potential of the control terminal 20 is
The potential of the control terminal 22 is higher than the potential of
In this state. In this case, a signal having a phase of 0 degree, that is, 360 degrees is output from the first variable amplification degree amplifier, and a signal having a phase of 270 degrees is output from the second variable amplification degree amplifier. Therefore, by varying the potential difference between the control terminals 20 and 21 and the potential difference between the control terminals 22 and 23, the phase of the combined vector changes in a range from 270 degrees to 360 degrees.

As described above, when the four operating states are combined, the control terminals 20, 2
Depending on the control voltage applied to 1, 22, and 23, the phase of the combined vector changes in the range of 0 to 360 degrees.

As described above, in the embodiment of FIG. 1, signals having a phase difference of 90 degrees due to the surface acoustic wave delay line 13 are applied to each input of the first and second variable gain amplifiers, that is, each base of the transistors 1 and 8. This signal is input and amplified respectively, and added, that is, vector-combined by the resistors 5 and 6. This signal is further amplified by the amplifier 11, and the surface acoustic wave delay line
Returned to 13. At this time, the absolute value of the amplification degree of the other circuits except the surface acoustic wave delay line 13 is larger than the absolute value of the loss of the surface acoustic wave delay line 13 and passes through the surface acoustic wave delay line 13 and another circuit. The phase of the signal that is fed back is 0 degrees or 36
Oscillates at a frequency that is an integral multiple of 0 degrees. Control terminal 2
The oscillation frequency changes by changing the phase of the feedback signal in the range of 0 to 360 degrees according to the control voltage applied to 0, 21, 22, and 23.

Assuming that the phase between the input and output of the surface acoustic wave delay line 13 is designed to change 360 degrees with respect to the frequency in the pass frequency band, the frequency variable range of the embodiment of FIG. This is almost the same as the pass frequency band of the wave delay line 13.

As described above, according to the embodiment of FIG. 1, the change range of the oscillation frequency becomes almost the same as the pass band of the surface acoustic wave delay line, and the performance of the surface acoustic wave delay line can be used to the maximum. Therefore, assuming that the same surface acoustic wave delay line as that of the conventional voltage controlled oscillator as shown in FIG. 4 is used, a frequency variable range several times higher can be obtained. Further, since the surface acoustic wave delay line is used, a voltage controlled oscillator having extremely stable and low phase noise can be formed as in the conventional example of FIG. 4, but the frequency variable width is the same as that of the conventional voltage controlled oscillator. In other words, when the pass band of the surface acoustic wave delay line is reduced to a fraction, the amount of phase change with respect to the frequency of the surface acoustic wave delay line becomes several times larger, and the sensitivity to noise decreases. Phase noise can be further reduced. The embodiment shown in FIG. 1 does not require a variable capacitance element, an inductance, a large-capacity capacitor, or the like, and is extremely suitable for integration into an integrated circuit. For example, the embodiment shown in FIG. 1 is composed of two chips: a semiconductor substrate chip in which circuits other than the surface acoustic wave delay line 13 are integrated, and a piezoelectric substrate chip in which the surface acoustic wave delay line 13 is formed. Accordingly, it is possible to configure a very small voltage controlled oscillator.

The invention is not limited to the embodiment of FIG.
Various modifications can be made.

FIG. 2 is a circuit diagram showing another embodiment of the present invention. In this embodiment, the high-frequency circuit portion is entirely configured as a differential circuit. In FIG. 2, transistors 41 and 42
Are connected to a ground terminal 44 via a DC current source 43, and the collector of the transistor 41 is connected to the transistor 45.
The emitter of transistor 46 is connected to each emitter of transistors 47 and 48, and the collector of transistor 42 is connected to each emitter of transistors 47 and 48. The collectors of the transistors 45 and 47 are connected via a resistor 49, and the collectors of the transistors 46 and 48 are connected via a resistor 51 to a power supply terminal 52, respectively. The above circuit constitutes a first variable amplification degree amplifier. The emitters of the transistors 53 and 54 are connected to the ground terminal 44 via a DC current source 55, the collector of the transistor 53 is connected to the emitters of the transistors 56 and 57, and the collector of the transistor 54 is connected to the transistors 58 and 59. Are connected to each emitter. The collectors of the transistors 56 and 58 are connected via a resistor 49, and the collectors of the transistors 57 and 59 are connected via a resistor 51 to a power supply terminal 52, respectively. The above-described circuit constitutes a second variable amplification degree amplifier. In addition, each collector of transistors 45, 47, 56, 58 is connected to one input of a differential amplifier 60, and transistors 46, 48,
Each of the collectors 57 and 59 is connected to the other input. The output of the differential amplifier 60 is connected to the output terminal 61 and to the input interdigital electrode 64 of the surface acoustic wave delay line 63. The first output interdigital electrode 65 of the surface acoustic wave delay line 63 is connected between the bases of the transistors 41 and 42. Also, a surface acoustic wave delay line
A second output interdigital electrode 66 of 63 is connected between the bases of transistors 53 and 54. The acoustic distance between the input interdigital electrode 64 of the surface acoustic wave delay line 63 and the first output interdigital 65, and the acoustic distance between the input interdigital electrode 64 and the second output interdigital 66, Designed to differ by 1/4 wavelength. Accordingly, a signal having a phase difference of 90 degrees is input between the bases of the transistors 41 and 42 and between the bases of the transistors 53 and 54. Transistors 41, 42,
Each base of 53, 54 has a resistor 68, 69, 70, 71 from a bias circuit 67 connected to the power supply terminal 52 and the ground terminal.
, A bias voltage is applied. Further, the bases of the transistors 45 and 48 are connected to the control terminal 72 and the transistor 4
Bases 6 and 47 are connected to control terminal 73, transistors 56 and 59
Are connected to a control terminal 74, and the bases of the transistors 57 and 58 are connected to a control terminal 75, respectively.

The above is the circuit configuration of this embodiment. Next, the operation of this embodiment will be described.

First, the operation of the first variable gain amplifier will be described, ignoring the operation of the second variable gain amplifier, for easy understanding of the description. In the circuit of FIG. 2, a signal input between the bases of the transistors 41 and 42 from the first output interdigital electrode 65 of the surface acoustic wave delay line 63 is amplified by the differential amplification operation of the transistors 41 and 42. , Become the collector currents of the transistors 41 and 42, and the collector currents flow through the transistors 45, 46, 47 and 48, respectively. A control voltage is applied to the bases of the transistors 45 and 48 and the transistors 46 and 47 from control terminals 72 and 73. When the control voltages are the same, the transistors 45 and 46
The collector current of the transistor 41 flows between each collector and the emitter of the transistor 41, and the collector current of the transistor 42 flows between the collectors and the emitters of the transistors 47 and 48.
Flow by each. Then, the current flowing through the transistors 45 and 47 is added by the resistor 49, and similarly, the current flowing through the transistors 46 and 48 is added by the resistor 51. Due to the differential operation between the transistors 41 and 42, the collector current of the transistor 47 has an opposite phase to the collector current of the transistor 45, and the collector current of the transistor 48 has an opposite phase to the collector current of the transistor 46. Therefore, the collector currents of the transistors 45 and 47 flowing through the resistor 49 cancel each other,
Since the collector currents of the transistors 46 and 48 flowing through the resistor 51 also cancel each other, no potential difference, that is, no differential voltage occurs between the two inputs of the differential amplifier 60. Next, when the potential of the control terminal 72 increases with respect to the potential of the control terminal 73, the base potential of the transistors 45 and 48 increases, and the transistors 46 and 47 increase.
, The collector currents of the transistors 45 and 48 increase, and the collector currents of the transistors 46 and 47 decrease. That is, when considering the collector currents of the transistors 45 and 48 as a reference, the positive phase current increases and the negative phase current decreases. Therefore, a differential voltage is generated between the inputs of the differential amplifier 60. Next, when the potential of the control terminal 72 decreases with respect to the potential of the control terminal 73, the base potential of the transistors 45 and 48 decreases, and the base potential of the transistors 46 and 47 increases. Decrease, and the collector currents of the transistors 46 and 47 increase.
Therefore, the current in the positive phase decreases and the current in the opposite phase increases, so that a differential voltage is generated between the inputs of the differential amplifier 60. If the phase of the differential voltage generated when the potential of the control terminal 72 is higher than the potential of the control terminal 73 is 0 degree, the phase of the current of the resistors 49 and 51 is Since it is inverted, the phase is 180 degrees. And the differential amplifier 6
The differential voltage generated between the 0 inputs is amplified by the differential amplifier 60 and fed back to the surface acoustic wave delay line. Note that the absolute value of the differential voltage changes according to the potential difference between the control terminal 72 and the control terminal 73.

To summarize the operation of the first variable gain amplifier,
When the potential of the control terminal 72 is higher than the potential of the control terminal 73, a differential voltage having a phase of 0 degree is generated between the inputs of the differential amplifier 60, and as the potential difference between the control terminals 72 and 73 decreases, The absolute value becomes smaller. And control terminals 72 and 73
Becomes the same potential, the differential voltage becomes zero. further,
When the potential of the control terminal 72 becomes lower than the potential of the control terminal 73,
A differential voltage having a phase of 180 degrees is generated, and its absolute value increases as the potential difference between the control terminals 72 and 73 increases.

As described above, the first variable gain amplifier is connected to the control terminal 72.
The amplification degree changes according to the control voltage applied to and 73, and the phase of the output signal is inverted.

Similarly, the amplification degree of the second variable amplification degree amplifier changes in accordance with the control voltage applied to the control terminals 74 and 75, and the phase of the output signal is inverted.

By the way, the resistors 49 and 51 are shared by the first and second variable gain amplifiers, and the currents of both the first and second variable gain amplifiers flow. That is, the output currents of the first and second variable gain amplifiers are added by the resistors 49 and 51. Therefore, the differential voltage generated between the inputs of the differential amplifier 60 is also the sum of the voltages generated by the first and second amplification variable amplifiers. Further, signals having phases different by 90 degrees are input to the first and second amplification variable amplifiers by the surface acoustic wave delay line 63. Therefore, based on the output signal of the first variable gain amplifier, signals of 90 degrees and 270 degrees are output from the second variable gain amplifier. Then, assuming that the output signal of the first variable gain amplifier and the output signal of the second variable gain amplifier are vectors, respectively, these two vectors are the resistor 49 and
51 to form one combined vector.

And the second embodiment is similar to the embodiment of FIG.
According to the control voltage applied to the control terminals 72, 73, 74, and 75, the operation can be considered in four states. As a result, the combined vector changes in a range from 0 degrees to 360 degrees according to the control voltage.

As described above, in the embodiment of FIG. 2, the surface acoustic wave delay is applied between each input of the first and second variable gain amplifiers, that is, between the bases of the transistors 41 and 42 and between the bases of the transistors 53 and 54. Signals having a phase difference of 90 degrees are input by a line 13, and these signals are respectively amplified and added by resistors 49 and 51, that is, vector-combined. This signal is further amplified by the amplifier 60 and fed back to the surface acoustic wave delay line 63. At this time, the absolute value of the amplification of other circuits except the surface acoustic wave delay line 63 is larger than the loss of the surface acoustic wave delay line 63,
In addition, the signal oscillates at a frequency at which the phase of the signal fed back through the surface acoustic wave delay line 63 and another circuit is an integer multiple of 0 or 360 degrees. Further, the oscillation frequency changes by changing the phase of the feedback signal in the range of 0 to 360 degrees according to the control voltage applied to the control terminals 72, 73, 74, and 75.

In the embodiment shown in FIG. 2, the same effects as those in the embodiment shown in FIG. 1 can be obtained. In addition, in the embodiment of FIG.
Since the high-frequency circuit has a differential amplification configuration, the power supply terminal
No high-frequency current flows through the power supply connected to 52 and the ground terminal 44. Therefore, the circuit of FIG. 2 does not become a noise source for other circuits connected to the power supply. Conversely, even if noise is applied to the connection line of the power supply directly or by electromagnetic induction or the like, the noise can be canceled by the differential operation, and fluctuations in the oscillation frequency and output voltage can be extremely reduced.

FIG. 3 is a circuit diagram showing another embodiment of the present invention. This embodiment corresponds to the DC current sources 43 and 55 of the embodiment of FIG.
Are replaced by variable current sources 80 and 81, respectively, in order to independently control the amplification of the first and second amplification variable amplifiers and the phase of the output signal. Each current value of the variable current sources 80 and 81 is varied by a control voltage or control current applied to control terminals 82 and 83. In FIG. 3, the transistors 41 and 42 operate as a differential amplifier, and the degree of amplification changes depending on the bias current, that is, the current value of the variable current source 80. Therefore, the amplification degree of the first variable amplification degree amplifier is changed by the control signal applied to the control terminal 82. Similarly, the amplification of the second variable amplification amplifier is varied by a control signal applied to the control terminal 83. Incidentally, also in the circuit of FIG. 3, the amplification degree can be varied by the control voltage applied to the control terminals 72, 73, 74 and 75, as in the embodiment of FIG. However, in the embodiment of FIG. 3, the control terminals 72, 73, 7
Reference numerals 4 and 75 are used as digital input terminals for switching the phase of the output signal of the first and second variable gain amplifiers. That is, in the embodiment of FIG. 3, the amplification of the first and second variable amplification amplifiers is controlled by the control terminals 82 and 83, and the phase is controlled by the control terminals 72, 73, 74 and 75.
Other operations are the same as in the second embodiment.

In the embodiment shown in FIG. 3, the same effects as those in the embodiment shown in FIG. 2 can be obtained. In addition, since the amplification degree is controlled by the bias current, the bias current of the amplification degree variable amplifier which does not require the amplification degree can be reduced, and the current consumption is reduced as compared with the embodiment of FIG. Can be reduced.
In addition, the variable range of the oscillating frequency is controlled by the control terminals 72, 73, 74,
Switching can be performed by a digital signal applied to 75.

In all of the above embodiments and modifications, the two signals obtained from the first output interdigital electrode and the second output interdigital electrode of the surface acoustic wave delay line have a phase difference of 90 degrees. The use of this phase difference is the most efficient in terms of circuit operation, but the present invention is not particularly limited to this phase difference and can operate with any phase difference. Therefore, the acoustic distance between the input interdigital electrode of the surface acoustic wave delay line and the first output interdigital electrode and the acoustic distance between the input interdigital electrode and the second interdigital electrode are 1 / It is not limited to only those having four different wavelengths. However, when the phase difference is 0 degrees, the oscillation frequency does not change, and when the phase difference is 180 degrees, an intermediate phase between the two signals cannot be obtained. In each case, the object of the present invention cannot be achieved.

Further, in all of the above embodiments and modifications, it is possible to operate in the above four operation states according to the control voltage, but it is not necessary to operate in all of these states. For example, even if one amplifier does not have a phase inversion function,
By inverting the phase of the output signal of the other amplification degree variable amplifier, a frequency variable width twice that of the conventional voltage controlled oscillator shown in FIG. 4 can be obtained, and the object of the present invention can be achieved.

Further, the surface acoustic wave delay lines 13, 63 and the differential amplifiers 11, 60
Except for the absolute value of the amplification of other circuits, the surface acoustic wave delay line
When the absolute value of the loss of the switches 13 and 63 is larger than the absolute value of the loss, the differential amplifiers 11 and 60 can be omitted.

In addition, the present invention includes other circuits except the surface acoustic wave delay line,
Although it is desirable to carry out the present invention in the form of an integrated circuit, the object of the present invention can be sufficiently achieved by using individual transistors and resistors.

The embodiments of the present invention and the modifications have been described above.
In short, the present invention can be variously modified and implemented without departing from the gist thereof.

〔The invention's effect〕

As described above, according to the present invention, the change range of the oscillation frequency can be made substantially the same as the pass band of the surface acoustic wave delay line, and the performance of the surface acoustic wave delay line can be used to the maximum. Therefore, if the same surface acoustic wave delay line as that of the conventional voltage controlled oscillator is used, a frequency variable range several times as large can be obtained. Also, as in the conventional example, a voltage-controlled oscillator having extremely stable and low phase noise can be formed.However, when the frequency variable width is set to be the same as that of the conventional voltage-controlled oscillator, that is, the pass band of the surface acoustic wave delay line is reduced by several minutes. In the case of 1, the phase noise can be further reduced. Since it does not require a variable capacitance element, an inductance, a large-capacity capacitor, etc., it is extremely suitable for integrated circuits. For example, a semiconductor substrate chip in which other circuits except for a surface acoustic wave delay line are integrated, and a surface acoustic wave It can be composed of two chips, a piezoelectric substrate chip on which a delay line is formed. Therefore, it is possible to configure a very small voltage controlled oscillator.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG.
FIG. 3 is a circuit diagram showing another embodiment of the present invention, and FIG. 4 is a circuit diagram showing a conventional example. 1,3,4,8,9,10 …… Transistor 41,42,45,46,47,48 …… Transistor 53,54,56,57,58,59 …… Transistor 2,44 …… Ground terminal 5 , 6,18,19,49,51,68,69,70,71… Resistor 7,52… Power supply terminal, 11,60… Differential amplifier 12,61… Output terminal 13,63… Elasticity Surface wave delay line 14,64 …… Input interdigital electrode 15,65 …… First output interdigital electrode 16,66 …… Second output interdigital electrode 17,67 …… Bias circuit 20,21,22, 23, 72, 73, 74, 75, 82, 83 Control terminal 43, 55 DC current source, 80, 81 Variable current source

Claims (3)

(57) [Claims] 1. A surface acoustic wave delay line, and two signals that are integrated on a semiconductor substrate and have different phases obtained by the surface acoustic wave delay line are amplified by a variable amplification amplifier and then added, respectively. And a means for feeding back the signal whose phase has been changed to the surface acoustic wave delay line, wherein at least one of the variable gain amplifiers has a phase inversion function. . 2. A voltage controlled oscillator according to claim 1, wherein a phase of an output signal with respect to an input signal of at least one of the variable gain amplifiers is inverted in a change range of a control voltage. 3. The two variable gain amplifiers according to claim 1, having a phase inverting function, and, within a control voltage change range, a phase of an output signal with respect to an input signal of one of the variable gain amplifiers, and The phase of the output signal with respect to the input signal of one of the variable amplification factor amplifiers is a range in which the phase is positive and positive, a range in which the phase is negative and positive, and a range in which the phase is negative and negative. , A range having a positive phase and a negative phase.