JPS60250261A - Speed signal detector - Google Patents

Speed signal detector

Info

Publication number
JPS60250261A
JPS60250261A JP10781184A JP10781184A JPS60250261A JP S60250261 A JPS60250261 A JP S60250261A JP 10781184 A JP10781184 A JP 10781184A JP 10781184 A JP10781184 A JP 10781184A JP S60250261 A JPS60250261 A JP S60250261A
Authority
JP
Japan
Prior art keywords
circuit
rotation
signal
output
speed signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10781184A
Other languages
Japanese (ja)
Inventor
Hisashi Kinoshita
木下 久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10781184A priority Critical patent/JPS60250261A/en
Publication of JPS60250261A publication Critical patent/JPS60250261A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable the outputting of a low ripple speed signal with a better response by converting a constant pulse width signal obtained from two-phase square wave outputs of an encoder into a pulse signal varied in the polarity in the direction of rotation to integrate the output thereof sequentially with first and second integration circuits. CONSTITUTION:Two-phase square waves (a) and (b) varying by 90 deg. in the phase of an encoder connected to a rotor are converted into constant pulse width signals (c) and (d) according to the direction of rotation with a pulse generation circuit 1 and the signals (c) and (d) are inputted into an OR circuit 2 and a direction of rotation deciding circuit 3 while both are inputted into a polarity conversion circuit 6 through power source conversion circuits 4 and 5 to obtain a pulse signal (i) different in the polarity in the direction of rotation. Then, the signal (i) is converted into a speed signal (j) with a first integration circuit 7 to be inputted into the second integration circuit 8, which inputs the signal (i) into a non-inversion terminal of an operational amplifier IC1 through a resistance R1, a capacitor C1 earthed and a resistance R2 and resistances R3 and R4 are connected between an inversion terminal and the earth and outputs to smooth the signal (i).

Description

【発明の詳細な説明】 21\−、゛ 産業上の利用分野 本発明は、工作機械、ロボット等の速度制御を必要とす
る動力源の速度センサとして使用する速度信号検出装置
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION 21\-, Industrial Application Field The present invention relates to a speed signal detection device used as a speed sensor for a power source that requires speed control, such as a machine tool or a robot.

従来例の構成とその問題点 一般に、産業用ロボットなどの機械系の制御を行うサー
ボ系において、前記サーボ系の動作の安定化および応答
性を向上させるためには、速度信号が必要である。そこ
で、従来は速度信号検出装置として直流タコジェネレー
タを設置して速度信号を検出していた。ところが、直流
タコジェネレータには整流ブラシがあるため、保守点検
が必要となり、取扱いが煩雑であった。そこで前記サー
ボ系に使用されている位置検出用のエンコーダの出力信
号から速度信号を検出する速度信号検出装置があり、そ
れを第1図に示す。まだ第1図の速度信号検出装置の出
力波形を第3図に示す。第1図のa、bは前記回転体に
結合したエンコーダの900位相の異なる二相の矩形波
である。二相の矩形波a、bを入力とするパルス発生回
路1にお3べ ゛ いて、まず内蔵するワンショットマルチ回路によって、
入力a、bのエツジを検出し、定パルスl〕の信号に変
換する。次に入力a、bの位相から回転方向を検出し、
一方向回転の場合けCに、逆回転の場合はdに出力パル
スを出す。ここで出力パルスのパルス巾T。は前記回転
体の最高速度の時のエンコーダの出力a、bの周期T1
 に対して。
Conventional Structures and Problems Generally, in a servo system that controls a mechanical system such as an industrial robot, a speed signal is required in order to stabilize the operation of the servo system and improve responsiveness. Therefore, conventionally, a DC tacho generator was installed as a speed signal detection device to detect the speed signal. However, since the DC tachogenerator has a rectifying brush, maintenance and inspection are required and the handling is complicated. Therefore, there is a speed signal detection device that detects a speed signal from the output signal of an encoder for position detection used in the servo system, which is shown in FIG. FIG. 3 shows the output waveform of the speed signal detection device shown in FIG. 1. A and b in FIG. 1 are two-phase rectangular waves having 900 different phases from the encoder coupled to the rotating body. Based on the pulse generation circuit 1 that receives two-phase rectangular waves a and b as input, first, the built-in one-shot multi-circuit generates a
The edges of inputs a and b are detected and converted into a constant pulse l] signal. Next, detect the rotation direction from the phases of inputs a and b,
Output pulses are output to C for unidirectional rotation and to d for reverse rotation. Here, the pulse width T of the output pulse. is the cycle T1 of the encoder outputs a and b at the maximum speed of the rotating body
against.

To<T1/4を満足させる。次にc、dを入力とする
オア回路2によって、回転方向に関係なく回転数に比例
した定パルス巾のパルス信号eに変換する。まだc、d
を入力とする回転方向判別回路3において、Cに出力パ
ルスが出ている場合は出力fをハイレベルに、dに出力
パルスが出ている場合は出力fを0■にする。次に電源
変換回路4および5において、入力e、fのハイレベル
を正電源電圧、壕だ○Vレベルを負電源電圧のレベルに
変換し、それぞれg、hとする。q、hを入力とする三
ステー)IC等で構成する極性変換回路6において、q
をゲート入力とし、hを入力とすることで、回転方向に
よって極性の異なるパルス信号iに変換する。次にiを
入力とする積分回路7によって、平均値が前記回転体の
回転速度に比例した速度信号1を検出する。なお、極性
変換回路6と積分回路子の電源端子は正電源と負電源に
接続されている。
Satisfy To<T1/4. Next, an OR circuit 2 having inputs c and d converts them into a pulse signal e with a constant pulse width proportional to the rotation speed regardless of the rotation direction. Still c, d
In the rotation direction discrimination circuit 3 which receives as input, the output f is set to high level when an output pulse is output to C, and the output f is set to 0■ when an output pulse is output to d. Next, in the power supply conversion circuits 4 and 5, the high level of the inputs e and f is converted to the positive power supply voltage level, and the low level of the inputs f is converted to the level of the negative power supply voltage, and these are designated as g and h, respectively. In the polarity conversion circuit 6 configured with a three-stay IC, etc., which inputs q and h, q
By using the signal as a gate input and h as an input, it is converted into a pulse signal i whose polarity differs depending on the direction of rotation. Next, an integrating circuit 7 to which i is input detects a speed signal 1 whose average value is proportional to the rotational speed of the rotating body. Note that the power terminals of the polarity conversion circuit 6 and the integrating circuit element are connected to a positive power source and a negative power source.

この場合、前記回転体の最低速が遅ければ遅い程、iの
出力パルスの周期Tとパルス巾T。との比率が大きくな
り、速度信号jのリップルを低下させるために、積分回
路7の放電時定数を大きくする必要があり、そのため応
答性が損なわれる欠点があった。まだ応答性を確保する
ために、放電時定数を小さくすると、速度信号iのリッ
プルが大きくなる欠点を有していた。
In this case, the lower the minimum speed of the rotating body, the lower the period T and pulse width T of the output pulse of i. In order to reduce the ripple of the speed signal j, it is necessary to increase the discharge time constant of the integrating circuit 7, which has the drawback of impairing responsiveness. However, if the discharge time constant is made small in order to ensure responsiveness, the ripple in the speed signal i becomes large.

発明の目的 本発明は、上記従来例の欠点に鑑みてなされたもので、
前記回転体の最高速と最低速の比率の大きい速度制御を
行う場合にも、低速においても応答性の早い、低リップ
ルの速度信号を出力する速度信号検出装置を提供するも
のである。
Purpose of the Invention The present invention has been made in view of the drawbacks of the above-mentioned conventional examples.
The present invention provides a speed signal detection device that outputs a speed signal with quick response and low ripple even at low speeds even when performing speed control with a large ratio between the maximum speed and the minimum speed of the rotating body.

発明の構成 6ペー′ この目的を達成するために2本発明は、回転体に結合し
たエンコーダの90°位相の異なる二相の矩形波出力を
入力とする速度信号検出装置において、前記二相の矩形
波のエツジを定パルス1]の信号に変換し、しかも回転
方向によって出力端子を切替えるパルス発生回路と、前
記パルス発生回路の両端子の出力を入力とするオア回路
および回転方向判別回路と、前記二回路の出力をそれぞ
れ゛ 電源変換回路を介して入力とし2回転方向によっ
て極性の異なるパルス信号に変換する極性変換回路と、
得られた出力を積分する第1の積分回路とさらにその出
力を積分する第2の積分回路とを設け、前記エンコーダ
の出力から回転方向によって極性が異なり、かつ回転速
度に比例した低リップルの速度信号を検出するものであ
る。
Arrangement of the Invention Page 6' To achieve this object, the present invention provides a speed signal detection device that receives as input two-phase rectangular wave outputs having 90° different phases from an encoder coupled to a rotating body. a pulse generation circuit that converts the edge of a rectangular wave into a constant pulse 1 signal and switches its output terminal depending on the rotation direction; an OR circuit and a rotation direction determination circuit that receive the outputs of both terminals of the pulse generation circuit; a polarity conversion circuit that receives the outputs of the two circuits as input via a power conversion circuit and converts them into pulse signals with different polarities depending on the two rotational directions;
A first integrator circuit that integrates the obtained output and a second integrator circuit that further integrates the output are provided, and the polarity varies depending on the rotation direction from the output of the encoder and a low ripple speed that is proportional to the rotation speed. It detects signals.

実施例の説明 以下2本発明の実施例を図面の第2図、第3図。Description of examples The following two embodiments of the present invention are shown in FIGS. 2 and 3 of the drawings.

第4図、第6図、および第6図に沿って詳細に説明する
。第2図は本発明の一実施例の速度信号検出装置のブロ
ック図、第3図および第4図は第26ベー、゛ 図の各部出力波形図、第6図および第6図は第2図にお
ける第2の積分回路の他の回路例を示している。なお、
第1図および第3図の従来例と同一符号のものは同一の
ものを示しおシ、説明は省略する。第3図に示すように
、第1の積分回路7の出力jを入力とする第2の積分回
路8において、出力jを抵抗R1を介してオペアンプ■
C1の非反転端子に入力し、前記IC1の非反転端子と
アース間にコンデンサC1と抵抗R2を並列に接続する
。また前記工C1の反転端子とアース間には抵抗R3を
接続し、前記■C1の反転端子と前記■C1の出力端子
間には抵抗R4を接続し、出力信号をkとする。
This will be explained in detail with reference to FIGS. 4, 6, and 6. FIG. 2 is a block diagram of a speed signal detection device according to an embodiment of the present invention, FIGS. 3 and 4 are output waveform diagrams of various parts in FIG. 3 shows another circuit example of the second integrating circuit in FIG. In addition,
Components with the same reference numerals as those in the conventional example shown in FIGS. 1 and 3 indicate the same components, and a description thereof will be omitted. As shown in FIG. 3, in the second integrating circuit 8 which receives the output j of the first integrating circuit 7, the output j is connected to the operational amplifier ■ via a resistor R1.
A capacitor C1 and a resistor R2 are connected in parallel between the non-inverting terminal of IC1 and the ground. A resistor R3 is connected between the inverting terminal of the circuit C1 and the ground, and a resistor R4 is connected between the inverting terminal of the circuit C1 and the output terminal of the circuit C1, and the output signal is k.

第2図の積分回路8において、R1,R2,C1にて積
分し、前記オペアンプIC1によって非反転増巾する。
In the integrating circuit 8 of FIG. 2, integration is performed by R1, R2, and C1, and non-inverting amplification is performed by the operational amplifier IC1.

このようにして、第2の積分回路を追加するととによっ
て、第1の積分回路においてはパルス巾T。のパルス信
号iを積分することでパルス巾を拡大し、さらに第2の
積分回路で平滑化することで、第1および第2の積分回
路のトータ7ベー ルの積分時定数をそれ程」=げることなく、大きな平滑
度が得られる。しだがって第2図に示す速度検出装置に
おいて、応答性を損なわない、低リップルの速度信号が
検出できる。
In this way, by adding the second integrating circuit, the pulse width T is reduced in the first integrating circuit. By integrating the pulse signal i of , the pulse width is expanded, and by further smoothing it in the second integrating circuit, the integration time constant of the total 7 veils of the first and second integrating circuits can be increased by that amount. Great smoothness can be obtained without any problems. Therefore, the speed detection device shown in FIG. 2 can detect a speed signal with low ripple without impairing responsiveness.

丑だ第2図の第2の積分回路8の他の回路例を示す第5
図と第6図について説明する。第5図において、第1の
積分回路の出力jを入力とする第2の積分回路9におい
て、出力jを抵抗R5を介してオペアンプIC2の反転
端子に入力し、前記IC2の反転端子と前記IC2の出
力端子間にコンデンサC2と抵抗R6を並列に接続する
。まだ前記IC2の非反転端子とアース間に抵抗R7を
接続する。出力】を直接積分して出力lとするが、この
場合出力jに対して出力tの符号は反転している。−1
だ第6図において、第1の積分回路の出力jを入力とす
る第2の積分回路10において。
Figure 5 shows another circuit example of the second integrating circuit 8 in Figure 2.
The figure and FIG. 6 will be explained. In FIG. 5, in a second integrating circuit 9 that receives the output j of the first integrating circuit, the output j is inputted to the inverting terminal of the operational amplifier IC2 via a resistor R5, and the inverting terminal of the IC2 and the IC2 are connected to each other. A capacitor C2 and a resistor R6 are connected in parallel between the output terminals of. A resistor R7 is still connected between the non-inverting terminal of IC2 and ground. The output t is directly integrated to obtain the output l, but in this case, the sign of the output t is inverted with respect to the output j. -1
In FIG. 6, the second integrating circuit 10 receives the output j of the first integrating circuit.

出力jを抵抗R8を介してオペアンプIC3の非反転端
子の入力とし、前記IC3の非反転端子とアース間に抵
抗R9を接続し、前記IC30反転端子とアース間に抵
抗R1oを接続し、前記IC3の反転端子と前記IC3
の出力端子間にコンデンサC3と抵抗R11を並列に接
続する。この場合も同様に積分17て出力mが得られる
The output j is input to the non-inverting terminal of the operational amplifier IC3 via a resistor R8, a resistor R9 is connected between the non-inverting terminal of the IC3 and the ground, a resistor R1o is connected between the inverting terminal of the IC30 and the ground, and the IC3 and the inverted terminal of IC3
A capacitor C3 and a resistor R11 are connected in parallel between the output terminals of the . In this case as well, the output m is obtained by integrating 17.

発明の効果 以」二のように本発明に」:れば、回転体に結合したエ
ンコーダの二相出力を入力と1−で回転方向によって極
性が異なり、かつ回転速度に比例した低リップルの速度
信号検出することができる。
Effects of the Invention According to the present invention, the two-phase output of an encoder connected to a rotating body is input and the polarity differs depending on the direction of rotation, and the speed has a low ripple proportional to the rotation speed. Signal can be detected.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の速度信号検出装置のブロック図、第2図
は本発明の一実施例における速度信号検出装置のブロッ
ク図、第3図および第4図は第1図および第2図の各部
出力波形図、第5図および第6図は第2図の第2積分回
路の他の実施例を示す回路図である。 1・・・・・・パルス発生回路、2・・・・・・オア回
路、3・・・・回転方向判別回路、4,5・・・・・・
電源変換回路、6・・・・・極性変換回路、7,8,9
.10・・・・・・積分回路。
FIG. 1 is a block diagram of a conventional speed signal detection device, FIG. 2 is a block diagram of a speed signal detection device according to an embodiment of the present invention, and FIGS. 3 and 4 are respective parts of FIGS. 1 and 2. The output waveform diagrams of FIGS. 5 and 6 are circuit diagrams showing other embodiments of the second integrating circuit of FIG. 2. 1... Pulse generation circuit, 2... OR circuit, 3... Rotation direction discrimination circuit, 4, 5...
Power conversion circuit, 6...Polarity conversion circuit, 7, 8, 9
.. 10...Integrator circuit.

Claims (1)

【特許請求の範囲】[Claims] 回転体に結合したエンコーダの90°位相の異なる二相
の矩形波出力を入力とする速度信号検出装置において、
前記二相の矩形波のエツジを定パルスl]の信号に変換
し、しかも回転方向によって出力端子を切替えるパルス
発生回路と、前記パルス発生回路の両端子の出力を入力
とするオア回路および回転方向判別回路と、前記二回路
の出力をそれぞれ電源変換回路を介して入力とし2回転
方向によって極性の異々るパルス信号に変換する極性変
換回路と、得られた出力を積分する第1の積分回路とさ
らにその出力を積分する第2の積分回路とを設け、前記
エンコーダの出力から回転方向によって極性が異なり、
かつ回転速度に比例した低リップルの速度信号を検出す
る速度信号検出装置・
In a speed signal detection device that receives two-phase rectangular wave outputs with 90° different phases from an encoder coupled to a rotating body,
a pulse generating circuit that converts the edges of the two-phase rectangular wave into a signal of a constant pulse 1 and that switches the output terminal depending on the direction of rotation; an OR circuit that receives the outputs of both terminals of the pulse generating circuit; and the direction of rotation. a discrimination circuit; a polarity conversion circuit that inputs the outputs of the two circuits through power conversion circuits and converts them into pulse signals with different polarities depending on the two rotational directions; and a first integration circuit that integrates the obtained outputs. and a second integrating circuit for integrating the output thereof, the output of the encoder has a polarity that differs depending on the direction of rotation,
A speed signal detection device/device that detects a low ripple speed signal proportional to the rotation speed.
JP10781184A 1984-05-28 1984-05-28 Speed signal detector Pending JPS60250261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10781184A JPS60250261A (en) 1984-05-28 1984-05-28 Speed signal detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10781184A JPS60250261A (en) 1984-05-28 1984-05-28 Speed signal detector

Publications (1)

Publication Number Publication Date
JPS60250261A true JPS60250261A (en) 1985-12-10

Family

ID=14468633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10781184A Pending JPS60250261A (en) 1984-05-28 1984-05-28 Speed signal detector

Country Status (1)

Country Link
JP (1) JPS60250261A (en)

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