JPS60235596A - Binary-coded video signal output circuit - Google Patents

Binary-coded video signal output circuit

Info

Publication number
JPS60235596A
JPS60235596A JP59093480A JP9348084A JPS60235596A JP S60235596 A JPS60235596 A JP S60235596A JP 59093480 A JP59093480 A JP 59093480A JP 9348084 A JP9348084 A JP 9348084A JP S60235596 A JPS60235596 A JP S60235596A
Authority
JP
Japan
Prior art keywords
video
voltage
circuit
video signal
peak voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59093480A
Other languages
Japanese (ja)
Other versions
JPH0331315B2 (en
Inventor
Masatoshi Kimura
正俊 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59093480A priority Critical patent/JPS60235596A/en
Publication of JPS60235596A publication Critical patent/JPS60235596A/en
Publication of JPH0331315B2 publication Critical patent/JPH0331315B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a video image same in shape as of an object by driving a constant current circuit with a peak voltage of a video signal, using a potential difference between the peak voltage and a prescribed voltage generated across a variable resistor inserted in series with the constant current circuit as a threshold voltage so as to move vertically equivalently the threshold voltage against the amplitude fluctuation of the video signal. CONSTITUTION:A peak voltage detecting circuit 13 detects and hold the peak voltage Vp of a video amplified signal being an output of a video amplifier 1. The video signal 2 is amplified into a desired amplitude by the video amplifier 1, a video amplified signal 3 is obtained, which is fed to one input of a video comprator 5. Further, a threshold voltage 14 fed to the other input of the comparator 5 is a potential Ex which is obtained by applying the peak voltage Vp obtained from the detection circuit 13 to a variable threshold value generating circuit 15 and subtracting a voltage Et=RXI formed from a resistance value R of the variable resistor 7 of the circuit 15 and a constant current I of the constant current circuit 12 from the peak voltage Vp. Thus, the threshold voltage 14 is moved vertically equivalently against the amplitude fluction of the video amplified signal 3.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、ビデオ信号をある閾値電圧で2値化する2
値化ビデオ信号出力回路に関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a two-dimensional system that binarizes a video signal at a certain threshold voltage.
The present invention relates to a digitized video signal output circuit.

〔従来技術〕[Prior art]

第1図は従来の2値化ビデオ信号出力回路のブロック図
である。第1図において、2ばビデオ信号、lはビデオ
増幅器、3はビデオ増幅信号、5はビデオ比較器、7は
可変抵抗、4は闇値電圧(Ef)、5は2値化ビデオ信
号出力である。
FIG. 1 is a block diagram of a conventional binary video signal output circuit. In Fig. 1, 2 is a video signal, l is a video amplifier, 3 is a video amplified signal, 5 is a video comparator, 7 is a variable resistor, 4 is a dark value voltage (Ef), and 5 is a binary video signal output. be.

次に動作について説明する。Next, the operation will be explained.

ビデオ信号人力2は、ビデオ増幅器」により所望の電圧
まで増幅され、ビデオ増幅信号3となり、ビデオ比較器
5の一方の入力端子に印加される。
The video signal input 2 is amplified to a desired voltage by a video amplifier to become a video amplified signal 3, which is applied to one input terminal of a video comparator 5.

ビデオ比較器5の他方の入力端子には、電圧Eを可変抵
抗7により分圧した闇値電圧(Ef)4が印加され、こ
の閾値電圧4を越えるビデオ増幅信号3に対し2値化ビ
デオ信号出力6が得られる。
A dark value voltage (Ef) 4 obtained by dividing the voltage E by a variable resistor 7 is applied to the other input terminal of the video comparator 5. Output 6 is obtained.

この様子を第2図に示す。本例は工業用テレビジョン(
ITV)カメラ等がらのビデオ信号2が入力される場合
を示すものである。第2図において、ビデオ増幅信号3
はOVを基準とした闇値電圧4で比較され、該電圧4を
越える該増幅信号3に対し2値化ビデオ信号出力6が出
方されることが分かる。なお16は同期信号である。
This situation is shown in FIG. This example is an industrial television (
This shows a case where a video signal 2 from a camera (ITV), etc. is input. In FIG. 2, the video amplified signal 3
is compared with the dark value voltage 4 with OV as a reference, and it can be seen that a binarized video signal output 6 is output for the amplified signal 3 exceeding the voltage 4. Note that 16 is a synchronization signal.

以上のように構成された従来の2値化ビデオ信号出力回
路において、例えば第4図に示すように、被写体18が
ハロゲンランプ19のようにその照度が変動する光源に
より照明されている場合、ITVカメラ17からの被写
体18のビデオ信号2はハロゲンランプ19の照度の変
化によりその振幅が変動し、その結果、第6図に示すよ
うに、ビデオ増幅信号3の振幅は照度の強い場合(信号
3a)と弱い場合(信号3b)とでは変化する。そのた
め、2値化ビデオ信号出力6 (照度が強い場合の信号
出力を6a、弱い場合の信号出力を6bで示す)のパル
ス幅は上記両凄輻信号3a、3bの振幅に応じてYa、
Ybと変動し、これを例えば第5図のモニタテレビ20
に写すと、ハロゲンランプ19の照度の変化に対し、当
然ながら被写体18の映像10は、その幅Sが変動する
In the conventional binary video signal output circuit configured as described above, when the subject 18 is illuminated by a light source whose illuminance varies, such as a halogen lamp 19, as shown in FIG. The amplitude of the video signal 2 of the subject 18 from the camera 17 fluctuates due to changes in the illuminance of the halogen lamp 19, and as a result, as shown in FIG. ) and the weak case (signal 3b). Therefore, the pulse width of the binarized video signal output 6 (the signal output when the illuminance is strong is shown as 6a, and the signal output when it is weak is shown as 6b) is Ya,
For example, the monitor television 20 in FIG.
, the width S of the image 10 of the subject 18 naturally changes as the illuminance of the halogen lamp 19 changes.

ここで従来の可変抵抗7に代えて例えばD/Aコンバー
タを使用し、照度の変化に対し闇値電圧4を上下すれば
、はぼ被写体18と同じ形状の映像が得られるが、一般
的に制御が難しく、また、高価なものとなるという欠点
があった。
If, for example, a D/A converter is used in place of the conventional variable resistor 7, and the dark value voltage 4 is increased or decreased according to changes in illuminance, an image having the same shape as the subject 18 can be obtained, but generally speaking It has the drawbacks of being difficult to control and expensive.

〔発明の概要〕[Summary of the invention]

この発明は、上記のような従来のものの欠点を除去する
ためになされたもので、ビデオ信号のピーク電圧で定電
流回路を駆動し、該ピーク電圧と該定電流回路に直列に
挿入した可変抵抗に発生する一定電圧との電位差を闇値
電圧とすることにより、ビデオ信号の振幅変動に対し等
価的に闇値電圧を上下せしめることができ、被写体と同
じ形状の映像が得られる安価な2値化ビデオ信号出力回
路を提供することを目的としている。
This invention was made to eliminate the drawbacks of the conventional ones as described above, and it drives a constant current circuit with the peak voltage of a video signal, and connects a variable resistor inserted in series with the peak voltage to the constant current circuit. By using the dark value voltage as the potential difference between a constant voltage generated in The purpose of the present invention is to provide a digital video signal output circuit.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明の実施例を図について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第7図は本発明の一実施例による2値化ビデオ信号出力
回路のブロック図である。第7図において、第1図と同
一符号は同−又は相当部分を示し、8は第1のバッファ
回路、9はクランプダイオード、10は保持コンデンサ
であり、ピーク電圧検出回路13がこれら8,9.10
で構成されており、該回路13はビデオ増幅器1の出力
であるビデオ増幅信号3のピーク電圧Vpを検出・保持
する。11は第2のバッファ回路、12は定電流回路で
あり、該バッフプ回路11.定電流回路12及び可変抵
抗7は上記ピーク電圧検出回路13の出力とアース間に
直列に接続され、可変闇値発生回路15がこれら7,1
1.12で構成されており、該回路15は上記検出回路
13に保持されたピーク電圧Vpにて駆動され、ピーク
電圧Vpから可変抵抗7の抵抗値Rと定電流Iにより発
生する一定電圧Etだけ低下した電圧を可変闇値電圧(
Ex)14としてビデオ比較器5に加えるものである。
FIG. 7 is a block diagram of a binary video signal output circuit according to an embodiment of the present invention. In FIG. 7, the same reference numerals as in FIG. 1 indicate the same or equivalent parts, 8 is a first buffer circuit, 9 is a clamp diode, and 10 is a holding capacitor. .10
The circuit 13 detects and holds the peak voltage Vp of the video amplified signal 3 which is the output of the video amplifier 1. 11 is a second buffer circuit, 12 is a constant current circuit, and the buffer circuit 11. A constant current circuit 12 and a variable resistor 7 are connected in series between the output of the peak voltage detection circuit 13 and the ground, and a variable dark value generating circuit 15 connects these 7, 1.
1.12, the circuit 15 is driven by the peak voltage Vp held in the detection circuit 13, and from the peak voltage Vp a constant voltage Et generated by the resistance value R of the variable resistor 7 and the constant current I. The voltage decreased by the variable dark value voltage (
Ex) 14 is added to the video comparator 5.

また、第3図は上記可変閾値発生回路の発生する可変闇
値電圧を示す。
Further, FIG. 3 shows the variable dark value voltage generated by the variable threshold value generating circuit.

第3図において、第2図及び第7図と同一符号は同−又
は相当部分を示し、Wl、W2は2値化ビデオ信号出力
6のパルス幅である。
In FIG. 3, the same symbols as in FIGS. 2 and 7 indicate the same or equivalent parts, and Wl and W2 are the pulse widths of the binary video signal output 6.

次に動作について説明する。ビデオ信号2はビデオ増幅
器1にて所望の振幅に増幅されてビデオ増幅信号3が得
られ、該ビデオ増幅信号3はビデオ比較器5の一方の入
力に加えられる。また該比較器5の他方の入力に加えら
れる闇値電圧14は、上記ビデオ増幅信号3をピーク電
圧検出回路13に加え、該検出回路13から得られるピ
ーク電圧Vpを可変闇値発生回路15に加え、該ピーク
電圧Vpから該回路15の可変抵抗7の抵抗値Rと定電
流回路12の定電流■により発生する電圧Et=Rxl
をひくことにより得られた電位Exである。こうするこ
とにより、ビデオ増幅信号3の振幅の変動に対し等価的
に閾値電圧14を上下させることができる。
Next, the operation will be explained. Video signal 2 is amplified to a desired amplitude by video amplifier 1 to obtain video amplified signal 3, which is applied to one input of video comparator 5. The dark value voltage 14 applied to the other input of the comparator 5 is obtained by applying the video amplified signal 3 to the peak voltage detection circuit 13 and applying the peak voltage Vp obtained from the detection circuit 13 to the variable dark value generation circuit 15. In addition, the voltage Et=Rxl generated from the peak voltage Vp by the resistance value R of the variable resistor 7 of the circuit 15 and the constant current ■ of the constant current circuit 12
is the potential Ex obtained by subtracting . By doing so, the threshold voltage 14 can be raised or lowered equivalently to fluctuations in the amplitude of the video amplified signal 3.

第3図において、図で示すように、ピーク電圧Vpの変
化に対し、電圧Etは一定のため等価的に闇値電圧14
が上下して、2値化ビデオ信号出力6のパルス幅Wl、
W2が変動しないことが分かる。
In FIG. 3, as shown in the figure, the voltage Et is constant with respect to the change in the peak voltage Vp, so the dark value voltage 14
goes up and down, the pulse width Wl of the binarized video signal output 6,
It can be seen that W2 does not change.

このように本実施例回路では、ビデオ増幅信号3のピー
ク電圧Vpで定電流回路12を駆動し、該電圧Vpより
可変抵抗7に発生する一定電圧Etだけ低下した電圧E
xを閾値電圧14としたので、ビデオ信号2の振幅変動
に対し等価的に闇値電圧14を上下でき、その結果第6
図に示した従る。
In this way, in this embodiment circuit, the constant current circuit 12 is driven by the peak voltage Vp of the video amplified signal 3, and the voltage E is lowered by the constant voltage Et generated in the variable resistor 7 than the voltage Vp.
Since x is the threshold voltage 14, the dark value voltage 14 can be raised or lowered equivalently with respect to the amplitude fluctuation of the video signal 2, and as a result, the 6th
Follow the diagram shown.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明によれば、ビデオ信号のピーク電
圧を検出し、該ピーク電圧より一定電圧だけ低下した可
変閾値電圧によりビデオ信号を2値化するようにしたの
で、簡単かつ安価な回路構成で被写体の幅の変動のない
2値化ビデオ信号を出力できる効果がある。
As described above, according to the present invention, the peak voltage of a video signal is detected, and the video signal is binarized using a variable threshold voltage that is lower than the peak voltage by a fixed voltage, so that a simple and inexpensive circuit can be used. This configuration has the effect of outputting a binary video signal with no variation in the width of the subject.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の2値化ビデオ信号出力回路のフロック図
、第2図は従来の閾値電圧を示す図、第3図は本発明の
実施例回路による閾値電圧を示す図、第4図はITVカ
メラを示す図、第5図はモニタテレビ映像を示す図、第
6図は2値化ビデオ信号の変動波形図、第7図は本発明
の一実施例による2値化ビデオ信号出力回路のブロック
図である。 ■・・・ビデオ増幅器、2・・・ビデオ信号入力(ビデ
オ信号)、3・・・ビデオ増幅信号(ビデオ増幅器の出
力)、5・・・ビデオ比較器、6・・・2値化ビデオ信
号出力、7・・・可変抵抗、12・・・定電流回路、1
3・・・ピーク電圧検出回路、14・・・闇値電圧(可
変闇値電圧)、15・・・可変閾値発生回路。 なお図中、同一符号は同−又は相当部分を示す。 代理人 大岩増雄 第1図 第2図 時間− 第3図 時間− 第4図 第5図 第6図
FIG. 1 is a block diagram of a conventional binary video signal output circuit, FIG. 2 is a diagram showing a conventional threshold voltage, FIG. 3 is a diagram showing a threshold voltage according to an embodiment of the present invention, and FIG. FIG. 5 is a diagram showing an ITV camera, FIG. 5 is a diagram showing a monitor TV image, FIG. 6 is a fluctuation waveform diagram of a binary video signal, and FIG. 7 is a diagram of a binary video signal output circuit according to an embodiment of the present invention. It is a block diagram. ■...Video amplifier, 2...Video signal input (video signal), 3...Video amplification signal (video amplifier output), 5...Video comparator, 6...Binarized video signal Output, 7... Variable resistance, 12... Constant current circuit, 1
3...Peak voltage detection circuit, 14...Dark value voltage (variable dark value voltage), 15...Variable threshold generation circuit. In the drawings, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa Figure 1 Figure 2 Time - Figure 3 Time - Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】[Claims] (1) ビデオ信号を増幅するビデオ増幅器と、該ビデ
オ増幅器の出力のピーク電圧を検出・保持するピーク電
圧検出回路と、該回路の出力とアース間に直列に接続さ
れた可変抵抗と定電流回路とからなり上記ピーク電圧か
ら一定電圧低下した可変閾値を発生する可変閾値発生回
路と、上記ビデオ増幅器の出力を上記可変閾値と比較し
2値化ビデオ信号を出力するビデオ比較器とを備えたこ
とを特徴とする2値化ビデオ信号出力回路。
(1) A video amplifier that amplifies the video signal, a peak voltage detection circuit that detects and holds the peak voltage of the output of the video amplifier, and a variable resistor and constant current circuit that are connected in series between the output of the circuit and ground. a variable threshold generation circuit that generates a variable threshold that is a constant voltage drop from the peak voltage; and a video comparator that compares the output of the video amplifier with the variable threshold and outputs a binary video signal. A binary video signal output circuit characterized by:
JP59093480A 1984-05-08 1984-05-08 Binary-coded video signal output circuit Granted JPS60235596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59093480A JPS60235596A (en) 1984-05-08 1984-05-08 Binary-coded video signal output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59093480A JPS60235596A (en) 1984-05-08 1984-05-08 Binary-coded video signal output circuit

Publications (2)

Publication Number Publication Date
JPS60235596A true JPS60235596A (en) 1985-11-22
JPH0331315B2 JPH0331315B2 (en) 1991-05-02

Family

ID=14083504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59093480A Granted JPS60235596A (en) 1984-05-08 1984-05-08 Binary-coded video signal output circuit

Country Status (1)

Country Link
JP (1) JPS60235596A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107947782A (en) * 2017-11-28 2018-04-20 南京优倍电气有限公司 A kind of circuit for improving optocoupler transmission characteristic

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5470719A (en) * 1977-11-16 1979-06-06 Fuji Electric Co Ltd Binary coding circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5470719A (en) * 1977-11-16 1979-06-06 Fuji Electric Co Ltd Binary coding circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107947782A (en) * 2017-11-28 2018-04-20 南京优倍电气有限公司 A kind of circuit for improving optocoupler transmission characteristic

Also Published As

Publication number Publication date
JPH0331315B2 (en) 1991-05-02

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