JPS60231242A - Development supporting device of microprocessor - Google Patents

Abstract

PURPOSE:To obtain a microprocessor development supporting device having high operabilty by connecting a debugging console built in a CPU to a system to be debugged through an address bus line. CONSTITUTION:A debugging console 11 is constituted of a CPU111 which is central unit of the device, a ROM112 for storing a debug program, a RAM113 for storing/reading data required at the execution of debugging, an I/O register 114 required for the information exchange with a CPU in the system 12 to be debugged. The debugging console 11 is electrically connected to the system 12 to be debugged through an address bus line 120, a READ/WRITE control line and an interruption signal line. Consequently, a conventional ICE (In Circuit Emulator) can be omitted and the microprocessor development supporting device characterized by low cost and high operability can be obtained.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a microprocessor development support device.

[Technical background of the invention and its problems]

In recent years, the market for microcomputer-applied products has expanded,
Along with this. Demand for microcomputer development tools is also increasing. Currently, there are many development tools on the market, both large and small, but all of them have the following problems.

Many of the problems are due to the connection method between the conventional microcomputer development tools and the developed system, as shown in Figure 1.
This is due to the fact that it is an E (In C1 circuit emulator) system. The connection method of this development tool will be briefly explained using FIG. First, remove the microprocessor of the system under development 3 from the socket, and
Connect CE2 to this socket. The ICE has a function of emulating the microprocessor of the system under development 3 and an interface function with the development tool body I. The development tool body 1 has man-machine interface functions such as a keyboard and display device,
An operator or a program on a development tool can
,' and has the ability to control the system being developed.

The problems of this ICE connection system are listed below.

(1) A socket must be mounted in the microprocessor mounting position of the system under development to which the development tool is connected. In the future, microprocessors will continue to be highly functional and densely packed, and the conventional DIP (Dual Input Packer)
ge ) mounting, LCC (Leadless (::hip Carrier
) or PGA (Pin Grid Array) implementation, which increases the cost required for these IC sockets and may also affect product prices.

(2) Since the development tool and the system under development are connected via a microprocessor socket, the reliability of contact is low. In particular, when an LCC or PGA socket with many input/output pins is used, the structure of the connector becomes complicated and the reliability of contact decreases.

(In the 311CB connection method, the system under development and the ICE
Because the cable length between the two is limited, it may not be possible to connect the circuit board of the system under development to the development tool while it is mounted on the system. In the ICE method, all microprocessor signal lines including clock signals on the system under development must be connected to the ICE, and the cable length from the microprocessor socket to the ICE is 10 MHz.
For microprocessors that use forward and backward clocks, the limit is around 30 clocks. With this cable length, it is quite difficult to mount the circuit board of the system under development into the system and connect it to the development system. For this purpose, take out the circuit board of the system under development from the housing,
It was often connected to development tools.

(In the 411CE method, in order to emulate the microprocessor of the system under development on the ICFI side, it is necessary to change the 71-ware (ICE) of the development tool every time the microprocessor of the system under development changes. Cost cannot be ignored either.

(5) In the ICE method, since the ICE side needs to have a function to emulate the microprocessor of the system being developed, the amount of hardware required cannot be ignored, and the hardware of the ICE and the development tool itself cannot be ignored. is large and inconvenient to install and carry.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned drawbacks,
It is an object of the present invention to provide a microprocessor development support device equipped with a small, low-cost, and highly operable microprocessor seven-pronged tool connection in 9-7 ace.

[Summary of the invention]

In order to achieve the above object, the present invention connects a human powered device such as a keyboard and a display device such as a lamp, and connects a designing/sizing console with a built-in microprocessor via an address/data bus possessed by the microprocessor. The configuration is such that it connects to the target device/link system. In the above connection configuration (G), the program for realizing the debug function is stored in the debug console's built-in ROM, and the various information required by the debug program (also stored in the debug console's built-in RAM and debugged) The developed microprocessor built into the bug system reads the above program and sends the information obtained by executing it to the denomination console.The microprocessor built in the denomination console scans the keyboard data. program debugging is performed based on information obtained from the microprocessor being developed.

This makes it possible to provide a microprocessor development support system that is small, inexpensive, and highly operable.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail using FIG. FIG. 2 is a block diagram showing the internal configuration of a debug console that functions as a microprocessor development tool.

In the figure, ``left'' is a debug console that is a microprocessor development tool. This debug console ↓J is connected to the system to be debugged 12 (the system to be debugged in which the micro-terocessor to be developed is mounted) via a dedicated debug console interface.

The debug console 1J is a microprocessor 111
The core consists of ROM1xz, RAMrJg, and various registers I (rods 114, 115, 116, and 117. R, OMzr2 houses a program code that implements debugging functions, and the microcontroller of the system to be debugged 12). It is B-EAD and executed by a processor (not shown).RAMzzJ is a READ/WRITE memory that stores data necessary for the debug program to realize the depack function.The data is REA by the microprocessor of bug system 12
D/WRITE is performed.

1114 is an input/output register. Input/output register 11
4 is microflosser 1 with built-in debug console
11 and a microprocessor in the system being debugged. 115 is a status register. The status register 115 stores various states of the debug consoles 1 to 1. For example, when there are multiple interrupt factors from the debug console 1 to the debugged system I2, it stores which interrupt has occurred. . The contents of status register 115 can be read from the microprocessor of debugged system 12. 116 is an address register. The address register 116 is a register that obtains and latches address information from the address data bus 120 on which address signals and data signals are multiplexed. The address information obtained via address register 116 is supplied to decoder 11B and one input terminal of comparator Z19. The signal decoded by the decoder 11B is used to control the memory in the debug console II, R for input/output, EAD/WR, and ITE. Address information obtained via the address match register 117 is supplied to the other input terminal of the comparator 119. The address match register 117 is a register used to detect the timing when a target program accesses a specific address of a memory or an input/output device. A memory or input/output address is set in this register 117. Also, comparison er Z I
Reference numeral 9 is provided to detect a match between memory or input/output addresses, and the address value and the contents of the address information propagated on the internal address bus 124 are compared. This comparator 11
The output of 9 passes through the control circuit I2I as one of the interrupt factors and functions as an interrupt signal.

The control circuit 121 consists of a control section provided for READ/Wf'LIT the built-in memory and input/output devices built into the debug console, and a circuit section for generating an interrupt signal to be supplied to the system 12 to be debugged. When the microprocessor on the system to be debugged I2 receives this interrupt signal, it changes to a debug mode and transfers control to a debug processing program that provides various debug functions.

Also, memory READ/WRITE is sent from the debugged system I2 to the main debugging console 11.

Alternatively, multiple control signals for input/output READ/WRITE are provided.

122 is a keyboard unit, and 123 is a display device. The keyboard unit I22 is provided for inputting decommands, and the display device 12B is provided for displaying necessary information during debugging operations. The basic specifications of the debug console 11 are as follows.

The program to realize the debug function is run on the microprocessor on the system to be depacked Z2, and the debug program is stored in the ROM1I2 built into the debug console X1, and various information necessary for the debug program is stored in the debug console console! ” is stored in the built-in I'LAM 113. This is as described above.

On the other hand, the debug console has a built-in microprocessor I
II performs various controls within the debug console U.

For example, this includes keyboard input processing such as scanning of the keyboard unit 122 and display control of the display unit 123. The following debug functions can be provided by the debug console-11.

(1) READ/WR of memory and input/output devices
,ITE.

(2) R of the register built into the microprocessor
EAD/WRI TE.

(31 single instruction steps.

(4) Setting breakpoints.

(5) Detection of address match The following is a detailed explanation of the operation of the embodiment of the present invention. Here, to make it easier to understand the operation, we will explain the memory RBAD
The operation when executing % is described below.

First, the microprocessor 111 in the debug console 11 scans the keyboard unit 122 and tests whether the operator has pressed a key. When the operator inputs a debug command (memory R, EAD) and a memory address to be R, FiAD from the keyboard unit 122, the microprocessor III built in the debug console zz displays the input information on the display device 123 and displays the input information. de/(lag system 1
The information is sent to the second microprocessor through the input/output register 114. When sending information from the microprocessor 111 built in the Depack Console II to the microprocessor of the debugged system 12, the microprocessor 111 built in the debug console 11 sends an interrupt signal to the microprocessor of the debugged system 12. done by.

This interrupt signal is generated and output from the control circuit 1211.

When the microprocessor of the system to be debugged I2 receives an interrupt signal from the debugging console L, first,
READL the status register 115 and check what the interrupt factor is. In this case, information indicating the interrupt factor indicating that it is a keyboard input is set. If the interrupt factor is a keyboard input, the microprocessor of the system 11 to be depacked receives the input/output register 114 from READ and the keyboard input data from the debug console.

executes the command (memory lJR, EAD) sent from the debug console 11. Depacked.

TEHA'7 executed by the system I2 microprocessor
/) - The program is stored in R6'MZ12 built into the debug console z4. After the microprocessor of the system to be debugged 12 executes the above command, it sends the necessary data via the input/output register 114 to the microprocessor IIZ with a built-in debug console.

Microprocessor II with built-in debug console II
I displays this data (memory R・EAD data) on the display device 123 and finishes one operation of the memo IJl(・EAD command.

〔Effect of the invention〕

As explained above, according to the present invention, the following effects can be obtained.

(1) By using a standard microprocessor bus instead of a microprocessor socket as the debug console interface, it is possible to support the development of microprocessors based on the Averge 61 ICr.

(2) By using the microprocessor in the system to be debugged without placing an emulator of the microprocessor to be debugged in the debug console, the amount of hardware in the debug console can be reduced. Therefore, the debug console can be made low-cost and compact.

(3) Since there is no need to connect high-speed signal lines such as microprocessor clock signals to the debug console, the connection cable can be longer than the ICE connection method. With the 7'lS, the circuit board to be debugged can be easily debugged in a system-mounted state.

(By sowing the 41 debug program into the R, OM built in the debug console, it is possible to easily handle changes in the specifications of the debug program and handle various microprocessors by converting the 11 OM.

(5) By using a dedicated microprocessor to control the debug console (keyboard input, display), the hardware of the debug console can be made more compact.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a conventional connection form between a microcomputer development tool and a system to be developed, and FIG. 2 is a block diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 11... Debug console, 12... System to be debugged, III... Microprocessor, 112.
113...Memory unit (R4OM/RAM), x
r 4...Input/output register, 115...Status register, 116...Address register, 117.
...Address match register, 118...Decoder,
119... Comparator, 121... Control circuit, I22.
...Keyboard unit, 123...Display device.

Claims (1)

[Claims] The microprocessor under development is a debug console that is connected via an address command data multiplexing interface, and this debug console is controlled by the built-in microprocessor and controls peripheral input/output devices for data input and display. In addition, it has a memory unit in which the microprocessor development support program and data required by this progera 11 are stored, and an interrupt signal generation circuit that notifies the microprocessor to be developed of the occurrence of a happy event. When the liquid distribution development microprocessor receives the interrupt signal output by the interrupt signal generation circuit, it obtains a microprocessor support program from the memory unit to process the interrupt signal, and
The microprocessor is characterized in that the data is executed based on the content and necessary data is sent to the debugging console, and the debugging console that receives this data displays the data via an input/output device using a built-in microprocessor and performs debugging. Processor development support equipment.