JPS60226191A - Semiconductor laser element - Google Patents

Semiconductor laser element

Info

Publication number
JPS60226191A
JPS60226191A JP8460084A JP8460084A JPS60226191A JP S60226191 A JPS60226191 A JP S60226191A JP 8460084 A JP8460084 A JP 8460084A JP 8460084 A JP8460084 A JP 8460084A JP S60226191 A JPS60226191 A JP S60226191A
Authority
JP
Japan
Prior art keywords
layer
semiconductor laser
groove
deltaalpha
outside
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8460084A
Other languages
Japanese (ja)
Other versions
JPH0256836B2 (en
Inventor
Saburo Yamamoto
三郎 山本
Hiroshi Hayashi
寛 林
Taiji Morimoto
泰司 森本
Morichika Yano
矢野 盛規
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP8460084A priority Critical patent/JPS60226191A/en
Publication of JPS60226191A publication Critical patent/JPS60226191A/en
Publication of JPH0256836B2 publication Critical patent/JPH0256836B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/24Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a grooved structure, e.g. V-grooved, crescent active layer in groove, VSIS laser

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To obtain a semiconductor laser element which has an advantage of having no low Ith, height no and astigmatism, by a method wherein effective refractive index difference DELTAn and loss difference DELTAalpha at the inside and outside of a base plate groove are controlled independently. CONSTITUTION:At the outside of V type groove 19, the light strength distribution becomes non-contrastive vertically as if pushed in the direction of an n-clad layer 15 by the presence of a layer 20 (low refraction ratio) having larger AlAs molar ratio than a p-clad layer 13, and the effective refraction ratio is lowered. As a result, a refraction ratio guide wave route is formed on a groove 19. The light absorbing condition to an electric current inhibition layer 12 at the outside of the groove 19 can be changed by the width of the layer 20 and AlAs molar ratio (z). Accordingly, DELTAn and DELTAalpha can be controlled independently, and it will be possible to make large DELTAn and small DELTAalpha.

Description

【発明の詳細な説明】 く技術分野〉 本発明は、発振横モードの制御された半導体レーザ素子
に関し、特に基板上に屈折率の制御された中間層を介設
した半導体レーザの素子構造及び製造方法に関するもの
である。
Detailed Description of the Invention Technical Field The present invention relates to a semiconductor laser device with a controlled transverse mode of oscillation, and in particular to the device structure and manufacturing of a semiconductor laser in which an intermediate layer with a controlled refractive index is interposed on a substrate. It is about the method.

〈従来技術〉 屈折率導波形半導体レーザの一例として基板に溝加工し
て電流通路を形成した光及びキャリア閉じ込め構造を有
する内部ストライプ型のvSIS(V−channel
ed 3ubstrate Inner 5tripe
)レーザが知られている。この半導体レーザの詳細は電
子通信学会技術報告ED81−42.31頁(1981
年、7月)に詳述されている。VSIS半導体レーザ素
子の1例を第1図に断面図で示す。
<Prior art> As an example of an index-guided semiconductor laser, an internal stripe-type vSIS (V-channel
ed 3ubstrate Inner 5tripe
) laser is known. Details of this semiconductor laser can be found in IEICE technical report ED81-42.31 (1981).
(July, 2013). An example of a VSIS semiconductor laser device is shown in cross-section in FIG.

また活性層に平行方向の屈折率(n)分布と損失(り)
分布についても同時に示している。1はp−GaAs基
板、2はn−GaAs電流阻止層、3はp GaAnA
s クラッド層、4はGaAnAs 活性層、5はn 
−GaAs基板 クラッド層、6はn−GaAsキャッ
プ層、7はn側電極、8はp側電極である。
Also, the refractive index (n) distribution and loss (ri) in the direction parallel to the active layer.
The distribution is also shown at the same time. 1 is a p-GaAs substrate, 2 is an n-GaAs current blocking layer, 3 is a p-GaAnA
s cladding layer, 4 is GaAnAs active layer, 5 is n
-GaAs substrate cladding layer, 6 is an n-GaAs cap layer, 7 is an n-side electrode, and 8 is a p-side electrode.

尚、第1図の断面図には活性層に垂直方向の光強度分布
が示されている。活性層で発生した光はn−GaAs電
流阻止層2に吸収されて、基板1の7字溝の内側と外側
に実効屈折率差Δnと損失差Δαを生じさせる。Δnは
光の閉じ込めに寄与し、Δαは高次モードの発生を抑制
する。とのΔnとΔαは活性層4の厚さとp−クラッド
層3の溝外側での厚さとを変化させることにより制御す
ることかできる。
Note that the cross-sectional view of FIG. 1 shows the light intensity distribution in the direction perpendicular to the active layer. The light generated in the active layer is absorbed by the n-GaAs current blocking layer 2, producing an effective refractive index difference Δn and a loss difference Δα between the inside and outside of the 7-shaped groove of the substrate 1. Δn contributes to light confinement, and Δα suppresses the generation of higher-order modes. Δn and Δα can be controlled by changing the thickness of the active layer 4 and the thickness of the p-cladding layer 3 outside the groove.

しかしながら、Δnを太き(しようとすると同時にΔα
も太き(なり、各々を独立に制御することはできない。
However, when trying to thicken Δn, at the same time Δα
They are also thick (and cannot be controlled independently.

従って、従来のVSIS半導体レーザてはΔαは500
1’以下にすることはできず、閾値電流Ith の上昇
、微分量子効率η。の低下及び非点収差の存在を余儀な
(させられていた。
Therefore, in the conventional VSIS semiconductor laser, Δα is 500
1' or less, the threshold current Ith increases, and the differential quantum efficiency η. In this case, the lens was forced to suffer from a decrease in image quality and the presence of astigmatism.

〈発明の目的〉 本発明は、基板溝の内側と外側との実効屈折率差Δnと
損失差Δαを独立に制御することにより、低1th 、
高η。及び非点収差がないといった利点を有する半導体
レーザ素子を提供することを目的とするものである。
<Object of the Invention> The present invention achieves low 1th,
High η. It is an object of the present invention to provide a semiconductor laser device having the advantages of having no astigmatism and no astigmatism.

〈実施例〉 本発明の半導体レーザ素子の1実施例について第2図を
参照しながら説明する。本実施例のレーザ素子構造はG
aAs−GaAs基板系のダブルへテロ接合構造を有す
るVSISレーザである。11はp GaAs基板、1
2はn ’ GaAs電流阻止層。
<Example> An example of the semiconductor laser device of the present invention will be described with reference to FIG. The laser element structure of this example is G
This is a VSIS laser with a double heterojunction structure based on an aAs-GaAs substrate. 11 is a p GaAs substrate, 1
2 is an n' GaAs current blocking layer.

13はp’ −G a 、、 A[、As クラッド層
、14はpG a 1.、A I! x A s活性層
、15はn−Ga11 A%As クラッド層、16は
n GaAsキャップ層。
13 is p'-Ga,, A[, As cladding layer, 14 is pG a 1. , AI! xAs active layer, 15 an n-Ga11A%As cladding layer, and 16 an nGaAs cap layer.

17はn側電極、18はp側電極、19は幅Wの■字形
溝である。また、20はp又はn−Ga、□Aj?2A
sの中間層である。各層のAj?A sモル比は0≦x
<y<z<1に設定する。V字溝19の外側てはp−ク
ラッド層13よりA4Asモル比の大きい(屈折率の低
い)層20の存在によって光強度分布はn−クラッド層
15方向へ押しやられたような上下非対称形となり、実
効屈折率が低下する。その結果、溝19上に屈折率導波
路が形成される。また、溝19の外側での電流阻止層1
2への光吸収状態は、層20の厚さ及びAβAsモル比
zlcよって変化させることができる。従ってΔnとΔ
αか独立に制御でき、大きさΔnと小さなΔαを作り込
むことが可能となる。Δαの大きさは高次モードの発生
ず抑制する為に必要な100〜3001程度であれば充
分である。
17 is an n-side electrode, 18 is a p-side electrode, and 19 is a ■-shaped groove having a width W. Also, 20 is p or n-Ga, □Aj? 2A
This is the middle layer of s. Aj of each layer? A s molar ratio is 0≦x
Set <y<z<1. On the outside of the V-shaped groove 19, due to the presence of the layer 20 having a higher A4As molar ratio (lower refractive index) than the p-cladding layer 13, the light intensity distribution becomes vertically asymmetrical as if pushed in the direction of the n-cladding layer 15. , the effective refractive index decreases. As a result, a refractive index waveguide is formed on the groove 19. In addition, the current blocking layer 1 outside the groove 19
The state of light absorption into the layer 20 can be changed by the thickness of the layer 20 and the AβAs molar ratio zlc. Therefore Δn and Δ
α can be controlled independently, making it possible to create a size Δn and a small Δα. It is sufficient that the magnitude of Δα is about 100 to 3001, which is necessary to suppress the generation of higher-order modes.

一般に、液相エピタキシャル(LPE)成長法を用いた
場合、一度空気中にさらしたG a A 13 A s
上にはその表面に形成された酸化嘆のために連続してエ
ピタキシャル層が成長しにくい。しかし、それは下地の
GaAA’As の面積が広い場合であり、10μm幅
以下のストライプ状G a A ll A s 上にG
aAJ?As 層を液相エピタキシャル成長する場合に
は上述の問題はな(連続して成長させることができる。
Generally, when liquid phase epitaxial (LPE) growth is used, G a A 13 A s once exposed to air
It is difficult to continuously grow an epitaxial layer thereon due to oxidation formed on the surface. However, this is the case when the underlying GaAA'As has a large area, and G
aAJ? When the As layer is grown by liquid phase epitaxial growth, the above-mentioned problem does not arise (it can be grown continuously).

従って、電流阻止層I2とp−クラッド層13の中間に
挿入される層20の幅を10μm以下とし、連続成長を
可能としている。
Therefore, the width of the layer 20 inserted between the current blocking layer I2 and the p-cladding layer 13 is set to 10 μm or less to enable continuous growth.

さらに層20は溝19のメルトバックによる変形を防ぐ
ためのメルトバック防止層としても働く。
Furthermore, the layer 20 also serves as a meltback prevention layer to prevent the grooves 19 from deforming due to meltback.

一般に、溝の肩がG a A sの場合にはメルトバッ
クしやす(、GaAnAs の場合はメルトバックしに
くいからである。
Generally, if the groove shoulders are made of GaAs, meltback is likely to occur (and if the shoulders are made of GaAnAs, meltback is difficult to occur).

次に、第2図に示す半導体レーザ素子の製作方法を第3
図に示す工程図を用いて説明する。ます、第3図(Al
に示すようtlcP−GaAs基板(ZnドーIO−一
ロー−1へ1.−+、 止層(Teドープ、3X]018Ql+−3)12及び
n−G a o6A6 o4As 中間層(Teドープ
、1×1018ff ”) 20を重畳して各々0.5
 μm 、 0.3μmの厚さに、液相エピタキシャル
成長させる。
Next, the method for manufacturing the semiconductor laser device shown in FIG.
This will be explained using the process diagram shown in the figure. Figure 3 (Al
As shown in tlcP-GaAs substrate (Zn-doped IO-1 row-1 to 1.-+, stop layer (Te doped, 3 1018ff”) 20 are superimposed and each is 0.5
Liquid phase epitaxial growth is performed to a thickness of 0.3 μm.

次に、第3図(B)に示すように中間層20をホトリン
グラフィ技術とケミカル・エツチングによって加工し、
幅W=8μmのストライプ状に残存させる。次に、第3
図(C1l’n示すようにストライプ状の中間層20の
中央部に幅w=4μm、深さ121LmのV字溝19を
上述のホトリングラフィ技術とケミカルエツチングを利
用した加工法により形成スる。V字溝19の形成によっ
て、この部分に電流阻止層12の除去された電流通路が
開通され、ストライプ構造が得られる。この基板ll上
に再び液相エピタキシャル成長法により、第2図に示す
ようなpcaO,7A4o、3 As クラッド層13
゜p Ga□、g5A%o5AS活性層14 + n 
G ao、7 A go3As クラッド層15 、n
−GaAsキ’ryプ層16層上6ぞれ0.2μm、0
.08μm、1μm、2μmの厚六r浦銚需且吉斗 が
ゴjしへ子0塙△刑のレーぜ発振用動作部を形成する。
Next, as shown in FIG. 3(B), the intermediate layer 20 is processed by photolithography technology and chemical etching.
It is left in a stripe shape with a width W=8 μm. Next, the third
As shown in FIG. By forming the V-shaped groove 19, a current path is opened in this part where the current blocking layer 12 is removed, and a stripe structure is obtained.A stripe structure is obtained by forming the V-shaped groove 19 again by liquid phase epitaxial growth on this substrate 11, as shown in FIG. pcaO,7A4o,3As cladding layer 13
゜p Ga□, g5A%o5AS active layer 14 + n
Gao, 7 A go3As cladding layer 15, n
- GaAs cap layer 16 upper layer 6 each 0.2 μm, 0
.. Thicknesses of 0.8 μm, 1 μm, and 2 μm form the laser oscillation operating portion of the thickness of 0.08 μm, 1 μm, and 2 μm.

この場合の各層のAjl’Asモル比はX二0.05 
、、Y =0.3 、 z =0.4である。
In this case, the molar ratio of Ajl'As in each layer is X20.05
, , Y = 0.3, z = 0.4.

成長前に露出しているn −Gao6 A6o4 As
層20の面積は狭いので成長の際この上に被覆されるG
a溶液の濡れに問題はなく、ピンホール等の欠陥のない
良好なエピタキシャル成長層が得られる。
n-Gao6 A6o4 As exposed before growth
Since the area of the layer 20 is small, the G coated on it during growth is
There is no problem in wetting the a solution, and a good epitaxial growth layer without defects such as pinholes can be obtained.

基板裏面をランピングすることによりウェハーの厚さを
約100μmとした後、n GaAsキャップ層16表
面にはn側電極17としてAu−Ge−N i を、ま
たp−GaAs基板11裏面にはp側電極18としてA
u−Znを蒸着し、450℃に加熱して合理化する。そ
の後、共振器長が250μmになるように璧開して素子
化を完了させる。この素子を銅ヒートシンク上にインジ
ウム金属を介してn側電極17がヒートシンクに接する
ようにマウントし、半導体レーザとする。
After ramping the back surface of the substrate to a thickness of about 100 μm, Au-Ge-N i was applied as an n-side electrode 17 on the surface of the n-GaAs cap layer 16, and a p-side electrode was applied on the back surface of the p-GaAs substrate 11. A as electrode 18
Deposit u-Zn and heat to 450°C for rationalization. Thereafter, the device is completed by opening it so that the resonator length becomes 250 μm. This element is mounted on a copper heat sink with indium metal interposed therebetween so that the n-side electrode 17 is in contact with the heat sink to form a semiconductor laser.

このようにして得られた半導体レーザのZn。Zn of the semiconductor laser thus obtained.

Δαは計算によるとそれぞれΔn=6XIo−3゜Δα
−150ff’となる。また、この半導体レーザは閾値
電流I t h = 25 m A +波長820nm
で発振し、外部微分量子効率は共振器の片面でηゎ一3
0%の高い値を呈する。また、光出力30mWまで安定
な基本横モードで発振しビームウェストも端面に一致し
ていた。
According to the calculation, Δα is Δn=6XIo−3゜Δα, respectively.
-150ff'. In addition, this semiconductor laser has a threshold current I th = 25 mA + a wavelength of 820 nm.
The external differential quantum efficiency is ηゎ-3 on one side of the resonator.
It exhibits a high value of 0%. In addition, the beam oscillated in a stable fundamental transverse mode up to an optical output of 30 mW, and the beam waist coincided with the end face.

第4図は本発明の他の実施例を示す高光出力用半導体レ
ーザの断面図である。前実施例と異なる点は、基板21
上にあらかじめエツチングにより高さH=3μm 2幅
10μmの台形状のメサ31を形成している点である。
FIG. 4 is a sectional view of a high optical output semiconductor laser showing another embodiment of the present invention. The difference from the previous embodiment is that the substrate 21
A trapezoidal mesa 31 having a height H of 3 μm and a width of 10 μm is formed on the top by etching in advance.

この基板21上に、MO−CVD法によりn−GaAs
電流阻止層22゜p−G ”l−z Aj?□As中間
層30を積層した。MO−CVD法の特徴はエビタキソ
ヤル層が基板21上のメサ31の形状に従って均一な厚
さに成長することである。以後の工程は前実施例と同様
であるが、本実施例では活性層24の平坦領域での厚さ
が容易に薄く製作できるところに利点がある。
On this substrate 21, n-GaAs is deposited by MO-CVD method.
A current blocking layer 22゜p-G"l-z Aj?□As intermediate layer 30 is laminated. The feature of the MO-CVD method is that the Ebitaki soyal layer grows to a uniform thickness according to the shape of the mesa 31 on the substrate 21. The subsequent steps are similar to those in the previous embodiment, but this embodiment has an advantage in that the thickness of the active layer 24 in the flat region can be easily made thin.

半導体レーザの高光出力化のためには活性層厚を、0.
05μm程度まで薄くする方が効果的である。
In order to increase the optical output of a semiconductor laser, the active layer thickness should be reduced to 0.
It is more effective to reduce the thickness to about 0.05 μm.

しかし、従来はこのような薄層を均一に成長するには困
難を伴なっていた。従って、本実施例では液相エピタキ
シャル(LPE)法による活性層成長中に基板21上の
メサ31の両側EAs原子が多く引きよせられるのて、
メサ31上の平坦な活性層厚は容易に0.05μm程度
まで薄くできる。
However, in the past, it has been difficult to grow such thin layers uniformly. Therefore, in this embodiment, many EAs atoms on both sides of the mesa 31 on the substrate 21 are attracted during active layer growth by liquid phase epitaxial (LPE) method.
The thickness of the flat active layer on the mesa 31 can be easily reduced to about 0.05 μm.

本実施例の半導体レーザは50 mWまで安定な基本横
モードで発振した。またその他の特性は前実施例と同一
であった。
The semiconductor laser of this example oscillated in a stable fundamental transverse mode up to 50 mW. Further, other characteristics were the same as those of the previous example.

尚、中間層20.80の導電型をp型とすれは、電流波
がりのためにIth が数mA上昇するか、活性層内の
キャリア分布が均一となるのてレーザ光の可干渉性が良
好となる利点がある。
Note that if the conductivity type of the intermediate layer 20.80 is p-type, Ith will increase by several mA due to current waves, or the carrier distribution in the active layer will become uniform, resulting in poor coherence of laser light. It has the advantage of being good.

本発明の半導体レーザは上述したG a A s −G
aAj?As系に限定されず、InP−InGaAsP
系等のその他のへテロ接合レーザに適用できる。この場
合、中間層の屈折率がクラッド層のそれより小さくなる
ように選定することが必要である。
The semiconductor laser of the present invention has the above-mentioned GaAs-G
aAj? Not limited to As-based, but also InP-InGaAsP
It can be applied to other heterojunction lasers such as In this case, it is necessary to select the intermediate layer so that its refractive index is smaller than that of the cladding layer.

〈発明の効果〉 以上述べたように、本発明の半導体レーザは作り込みの
屈折率分布Δnと損失分布Δαがそれぞ−−1−1++
 、、y41#、−L l/、VQ 轟+y a+ 伽
−Ae 飴 2 日n< r++41’1層のA#As
モル比2とその厚さを変えることにより大きなZnと同
時に小さなΔαを実現することができるので、低1th
、高η。、無非点収差及び安定な基本横モードをもつ半
導体レーザが製作される。
<Effects of the Invention> As described above, the semiconductor laser of the present invention has a built-in refractive index distribution Δn and a loss distribution Δα of -1-1++, respectively.
,,y41#,-L l/,VQ Todoroki+y a+ 佽-Ae candy 2 days n<r++41'1 layer A#As
By changing the molar ratio 2 and its thickness, it is possible to achieve large Zn and small Δα at the same time.
, high η. , a semiconductor laser with astigmatism and a stable fundamental transverse mode is fabricated.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のVSISレーサを示す説明図である。 第2図は本発明の1実施例を示す半導体レーザ素子の断
面図である。 第3図R)(13+fc)は第2図に示す半導体レーザ
素子の製作工程を示す工程図である。 第4図は本発明の他の実施例も示す半導体レーザの断面
図である。 1 、11 、21・−P GaAs基板、2,12゜
22−n−GaAs電流阻止層、3,13.23−P 
−Ga AlAsクラッド層、4,14.24・・−G
a AI As活性層、5,1.5.25・=n−Ga
AA’As クラッド層、6,16.26−n−G・a
 A 、’sキaeツブ層、7,17.27−n側電極
、8.18.28・・・P側電極、9,19.29・・
・7字形溝、20.30−n又はp−Ga A6 As
中間層、31・・・メサ。
FIG. 1 is an explanatory diagram showing a conventional VSIS laser. FIG. 2 is a sectional view of a semiconductor laser device showing one embodiment of the present invention. FIG. 3R) (13+fc) is a process diagram showing the manufacturing process of the semiconductor laser device shown in FIG. FIG. 4 is a sectional view of a semiconductor laser also showing another embodiment of the present invention. 1,11,21・-P GaAs substrate, 2,12゜22-n-GaAs current blocking layer, 3,13.23-P
-Ga AlAs cladding layer, 4, 14.24...-G
a AI As active layer, 5,1.5.25・=n-Ga
AA'As cladding layer, 6,16.26-n-G・a
A,'s key layer, 7, 17.27-n side electrode, 8.18.28...P side electrode, 9, 19.29...
・7-shaped groove, 20.30-n or p-Ga A6 As
Middle class, 31...Mesa.

Claims (1)

【特許請求の範囲】[Claims] 1 基板上に形成されたストライプ溝を電流通路として
レーザ発振用多層結晶層を積層した半導体レーザ素子に
於いて、前記多層結晶層の基板側に隣設しかつ前記スト
ライプ溝の両性側位置に屈折率が小なる中間層を挿入し
、前記多層結晶層内の活性層に実効屈折率の分布を付与
したことを特徴とする半導体レーザ素子。
1. In a semiconductor laser device in which a multilayer crystal layer for laser oscillation is laminated using a stripe groove formed on a substrate as a current path, there is a refraction layer adjacent to the substrate side of the multilayer crystal layer and refracted at positions on both sides of the stripe groove. 1. A semiconductor laser device characterized in that an intermediate layer having a low index is inserted to impart an effective refractive index distribution to an active layer within the multilayer crystal layer.
JP8460084A 1984-04-25 1984-04-25 Semiconductor laser element Granted JPS60226191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8460084A JPS60226191A (en) 1984-04-25 1984-04-25 Semiconductor laser element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8460084A JPS60226191A (en) 1984-04-25 1984-04-25 Semiconductor laser element

Publications (2)

Publication Number Publication Date
JPS60226191A true JPS60226191A (en) 1985-11-11
JPH0256836B2 JPH0256836B2 (en) 1990-12-03

Family

ID=13835173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8460084A Granted JPS60226191A (en) 1984-04-25 1984-04-25 Semiconductor laser element

Country Status (1)

Country Link
JP (1) JPS60226191A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179789A (en) * 1986-02-03 1987-08-06 Matsushita Electric Ind Co Ltd Semiconductor laser device
JPS62185389A (en) * 1986-02-12 1987-08-13 Matsushita Electric Ind Co Ltd Semiconductor laser device
JPS62296583A (en) * 1986-06-17 1987-12-23 Matsushita Electric Ind Co Ltd Semiconductor laser device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56135994A (en) * 1980-03-28 1981-10-23 Fujitsu Ltd Semiconductor light emitting device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56135994A (en) * 1980-03-28 1981-10-23 Fujitsu Ltd Semiconductor light emitting device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179789A (en) * 1986-02-03 1987-08-06 Matsushita Electric Ind Co Ltd Semiconductor laser device
JPS62185389A (en) * 1986-02-12 1987-08-13 Matsushita Electric Ind Co Ltd Semiconductor laser device
JPS62296583A (en) * 1986-06-17 1987-12-23 Matsushita Electric Ind Co Ltd Semiconductor laser device

Also Published As

Publication number Publication date
JPH0256836B2 (en) 1990-12-03

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