JPS60223317A - Filter integrated circuit - Google Patents

Filter integrated circuit

Info

Publication number
JPS60223317A
JPS60223317A JP7855484A JP7855484A JPS60223317A JP S60223317 A JPS60223317 A JP S60223317A JP 7855484 A JP7855484 A JP 7855484A JP 7855484 A JP7855484 A JP 7855484A JP S60223317 A JPS60223317 A JP S60223317A
Authority
JP
Japan
Prior art keywords
integrated
circuit
frequency
integrated circuit
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7855484A
Other languages
Japanese (ja)
Inventor
Yoshinori Okada
義憲 岡田
Kuniaki Miura
三浦 邦昭
Isao Fukushima
福島 勇夫
Masahiro Sasaki
佐々木 昌弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Image Information Systems Inc
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Video Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Video Engineering Co Ltd filed Critical Hitachi Ltd
Priority to JP7855484A priority Critical patent/JPS60223317A/en
Publication of JPS60223317A publication Critical patent/JPS60223317A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • H03H11/12Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1213Frequency selective two-port networks using amplifiers with feedback using transistor amplifiers

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  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To attain miniaturization and light weight of an electronic circuit by combining a Twin-T circuit where the product between integrated circuit capacitance and integrated circuit resistance decides a trap frequency and an RC circuit where the product decides the cut-off frequency and using a variable capacitor as the integrated circuit capacitance. CONSTITUTION:In selecting resistors R1, R2, R3 of the Twin-T trap circuit 3 and variable capacitors C1, C2, C3 as R1=R2=2R3identicalR and C1=C2=C3/2identicalC, the trap frequency fT is expressed in Equation I. The cut-off frequency fc is expressed in Equation II in the positive feedback 2nd order LPF circuit 4. Thus, a signal outputted to an output pin 7 is the sum of response characteristics illustrated in Curves 8, 9 and a steep frequency characteristic is realized as shown in Curve 10. In changing a variable power supply V2 provided externally to the IC, since the n-channel potential of the variable capacitors C1-C6 is changed altogether via amplifiers K1, K2, a voltage VR across the variable capacitors C1-C6 is changed at the same time in the same rate.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、シリコンウェハ上などに形成するモノリシッ
クIC内にフィルタを集積化する場合に適したフィルタ
集積回路に関するものである0 〔発明の背景〕 従来、電子回路では、所望の信号を得るため、低域、高
域、帯域通過フィルタ(以降LPF、HPF 、 BP
F と略す)や位相等化器として、インダクタンスL、
容量C1抵抗Rで構成されたフィルタが用いられていた
。このため、電子回路の集積化(モノリシックIC化、
以降IC化と略す)が進む中で、これらのフィルタ類が
コスト低減。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a filter integrated circuit suitable for integrating a filter into a monolithic IC formed on a silicon wafer or the like. [Background of the Invention] Conventionally, in electronic circuits, in order to obtain a desired signal, low-pass, high-pass, and bandpass filters (hereinafter referred to as LPF, HPF, BP) are used.
(abbreviated as F) and phase equalizer, inductance L,
A filter consisting of a capacitor C1 and a resistor R was used. For this reason, integration of electronic circuits (monolithic IC,
As the use of IC (hereinafter abbreviated as "IC") progresses, the cost of these filters is decreasing.

電子回路の小型・軽量化を阻む大きな要因となっていた
。特に機動性を重視するポータプル機器においては、小
型・軽量化が重要で、フィルタ類のIC化が望まれてい
た。
This was a major factor preventing electronic circuits from becoming smaller and lighter. Particularly in portable equipment where mobility is important, compactness and weight reduction are important, and IC-based filters have been desired.

例えば、磁気記録再生装置においては、記録時に入力さ
れた複合映像信号からLPFで輝度信号(0〜3Ml1
z)を抜き取シ、上記輝度信号をFM変調している。か
つ再生時には、上記FM変調波がFM復調される際に生
じる輝度信号帯域外の不要信号を除去するため、上記L
PFを共用しておシ、上記LPFの所望特性は第1図に
示すようにかなシ急峻で高精度な周波数特性を必要とし
ていた。
For example, in a magnetic recording/reproducing device, a luminance signal (0 to 3 Ml1
z) is extracted and the luminance signal is subjected to FM modulation. Furthermore, during reproduction, in order to remove unnecessary signals outside the luminance signal band that occur when the FM modulated wave is FM demodulated,
In order to share the PF, the desired characteristics of the LPF described above required a sharp and highly accurate frequency characteristic as shown in FIG.

これに対して、ICでは、集積化素子の絶対値精度は悪
く(通常20〜3o % ) 、集積化抵抗。
On the other hand, in ICs, the absolute value accuracy of integrated elements is poor (usually 20-3o%), and integrated resistors.

集積化容量を用いて精度を要する所望のフィルタ特性を
得ることが困難であるという欠点があった。このため、
上記LPFとしては、従来、第2図に示すようにトラン
ス結合されたインダクタンスL、 、 L、 、 L、
 、 Lい容量C,、C,、C,、C,からなる高次の
ブロックフィルタ(1,2はブロック範囲を示す)が用
いられている。しかし急峻な周波数特性を得るため高次
なフィルタであシ、しかも高精度を必要とするため上記
インダクタンスL1〜L4の複雑な調整を行なっておシ
、コスト高を招くとともlこ、小型・軽量化を困難にし
ていた。
There has been a drawback in that it is difficult to obtain desired filter characteristics that require precision using integrated capacitors. For this reason,
Conventionally, the above-mentioned LPF includes transformer-coupled inductances L, , L, , L, as shown in FIG.
, A high-order block filter (1 and 2 indicate the block range) consisting of small capacitances C, ,C, ,C, ,C, is used. However, in order to obtain steep frequency characteristics, a high-order filter is required, and in addition, high precision is required, which requires complicated adjustment of the inductances L1 to L4, resulting in high costs and small size. This made it difficult to reduce weight.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記した従来技術の欠点をなくシ、高
精度で急峻な周波数特性をもつフィルタを集積化素子(
IC化容量、 IC化抵抗)で構成でき、集積化素子の
ばらつきを簡単に吸収して性能も確保できるフィルタ集
積回路を提供するiこある。
An object of the present invention is to eliminate the drawbacks of the prior art described above, and to integrate a filter with high precision and steep frequency characteristics into an integrated element (
An object of the present invention is to provide a filter integrated circuit that can be configured with IC capacitors and IC resistors, easily absorb variations in integrated elements, and ensure performance.

〔発明の概要〕[Summary of the invention]

上記した目的を達成するため、IC化容量とIC化抵抗
との積の値がトラップ周波数(?L払11周波数)を決
定するTυLn −T回路、及びIC化容量とIC化抵
抗の積がしゃ断層波数を決定するRC回路を組み合わせ
たフィルタ集積回路を構成シ、シかも上記IC化容量と
してバリキャップを用い、上記バリキャップの両端印加
電圧を同時ζζ調整しIC化容量及びIC化抵抗のばら
つきを吸収するものである。
In order to achieve the above-mentioned purpose, we developed a TυLn-T circuit in which the value of the product of the IC capacitor and the IC resistor determines the trap frequency (?L 11 frequency), and a TυLn-T circuit in which the product of the IC capacitance and the IC resistor determines the trap frequency (? A filter integrated circuit combining an RC circuit that determines the fault wave number may be constructed.A varicap is used as the IC capacitance, and the voltage applied to both ends of the varicap is simultaneously adjusted to eliminate variations in the IC capacitance and IC resistance. It is something that absorbs.

〔発明の実施例〕[Embodiments of the invention]

以下本発明な一実施例によシ説明する。第3図は本発明
の一実施例を示す図で、第4図は第3図に示した実施例
の動作を説明する図である。
An embodiment of the present invention will be explained below. FIG. 3 is a diagram showing an embodiment of the present invention, and FIG. 4 is a diagram explaining the operation of the embodiment shown in FIG.

第3図において、3はT−L−−T型トラップ回路、4
は正帰還型2次LPF回路である。Q、 、 Q、はト
ランジスタを示し、該トランジスタQ、 、 Q、は定
電流理工1.抵抗几と共に高入力′インピーダンス(ト
ランジスタQ、のペース)で低出力インピーダンス(ト
ランジスタQ、のコレクタ)を実現するバック1回路を
構成している。Q、 、 Q、はトランジスタを示し、
該トランジスタQ、、Q、は定電流源■3.抵抗ルと共
に上記と同様なバッフ1回路を構成している。K、 、
 K、は同一の差動増幅器で、トランジスタQs 、定
電流源1.はエミフオロを構成している。C,−C,は
PNジャンクションからなる集積化容量(バリキャップ
)を示し、該バリキャップは両端の印加電圧VRによシ
値が変化するものである。バリキャップとして例えばト
ランジスタのベース・エミッタ容量を用いたJLog 
C7= K−α1af(φ+■j)但し CI:ペース・エミッタ間接合容量 C,2(0) :バイアス00時のベース・エミッタ接
合容量 Vj:エミッタ中ペース電圧 (ダイオード逆バイアス電圧) φ:ビルトイン電圧 α:電圧依存係数 K : ’#(C,=(01φα〕 と表わされ、第5図のような特性が得られる。
In FIG. 3, 3 is a T-L--T type trap circuit, 4
is a positive feedback type secondary LPF circuit. Q, , Q, indicate transistors, and the transistors Q, , Q, are constant current Riko 1. Together with the resistor, it forms a back 1 circuit that achieves a high input impedance (the pace of the transistor Q) and a low output impedance (the collector of the transistor Q). Q, , Q, represent transistors;
The transistors Q, ,Q, are constant current sources.■3. Together with the resistor, it constitutes a buffer 1 circuit similar to the above. K, ,
K, are the same differential amplifiers, transistor Qs, constant current source 1. constitutes Emifluoro. C and -C indicate integrated capacitors (varicaps) consisting of PN junctions, and the values of the varicaps change depending on the voltage VR applied to both ends. JLog using, for example, the base-emitter capacitance of a transistor as a varicap
C7= K-α1af (φ+■j) where CI: Pace-emitter junction capacitance C, 2 (0): Base-emitter junction capacitance at bias 00 Vj: Emitter medium pace voltage (diode reverse bias voltage) φ: Built-in Voltage α: voltage dependence coefficient K: '#(C,=(01φα)), and the characteristics shown in FIG. 5 are obtained.

また■、は安定化電源、V2はIC外部の可変電源であ
る。ICsの入力ピン6に入力された信号は、上記第3
図に示す回路において、’l’yA?L−T型トラップ
回路3、上記正帰還型2次フィルタ回路4を通って出力
ピン7に出力される。
In addition, ``■'' is a stabilized power supply, and V2 is a variable power supply external to the IC. The signal input to the input pin 6 of the ICs is the third
In the circuit shown in the figure, 'l'yA? The signal is outputted to the output pin 7 through the L-T type trap circuit 3 and the positive feedback type secondary filter circuit 4.

ここでTurirn −T型トラップ回路3の抵抗R1
Here, the resistance R1 of Turirn-T type trap circuit 3
.

R,、&及びバリキャップC,,C,、C,をそれぞれ
R1= R1= 2’BsミR 3 c、 = c、 =7=C と選ぶと、そのトラップ周波数frは fT−2,。□ ・・・・・・・・・・・・・・・■で
表わされ、第4図の曲線8で示した周波数特性を有する
If R, , & and varicap C,,C,,C, are respectively chosen as R1=R1=2'BsmiR3c,=c,=7=C, then the trap frequency fr is fT-2,. It is represented by □ ・・・・・・・・・・・・■ and has the frequency characteristic shown by curve 8 in FIG.

また正帰還型2次LPF回路4では、しゃ断層波数fc
は と表わされ、第4図の曲線9で示した周波数特性を有す
る。したがって出力ピン7に出力される信号は、第4図
の曲線8と9で示されたレスポンスの和とな如、第4図
の曲線10で示すように急峻な周波数特性を実現できる
In addition, in the positive feedback type secondary LPF circuit 4, the cutoff layer wave number fc
It has a frequency characteristic shown by curve 9 in FIG. Therefore, the signal output to the output pin 7 can realize a steep frequency characteristic as shown by curve 10 in FIG. 4, which is the sum of the responses shown by curves 8 and 9 in FIG.

またIC内では集積化素子間の比精度は十分高くとれる
ので、 R5 6 とおけば、しゃ断層波数は jc =□ ・・・・・・・・・・■ 2πCRbさ− と表わされる。
Furthermore, since the relative accuracy between integrated elements within the IC can be maintained sufficiently high, if R5 6 is set, the cutoff layer wave number can be expressed as jc =□ 2πCRbsa-.

したがって集積化素子(C9几)がばらついても、トラ
ップ周波数fT 、 Lや断層波数fcは上記■、■式
から知れるように同一比率でばらつくので、第4図の曲
線11 、12で示すように所望特性10が周波数シフ
トしただけの特性となる。
Therefore, even if the integrated elements (C9) vary, the trap frequencies fT, L and the fault wave number fc will vary at the same ratio, as can be seen from the above equations ① and ②, so as shown by curves 11 and 12 in Fig. 4. The desired characteristic 10 becomes a characteristic simply shifted in frequency.

そこでIC外部の可変電源V雪を変化させれば、増幅器
に、 、 K、を介して、バリキャップC,−C,のル
側電位を共に変化させることができるので、バリキャッ
プC,−C,の両端電圧VRが同時に同一比率で変化で
きる。したがって集積化抵抗Rと集積化容量Cの積で決
定されるしゃ断層波数とトラップ周波数を所望値に調整
でき、所望特性(第4図の曲線10)を得ることができ
る。
Therefore, by changing the variable power supply V outside the IC, it is possible to change both the side potentials of the varicaps C and -C to the amplifier via , K. , can change at the same rate at the same time. Therefore, the cut-off wave number and trap frequency determined by the product of integrated resistor R and integrated capacitor C can be adjusted to desired values, and desired characteristics (curve 10 in FIG. 4) can be obtained.

また安定化電源vlの電圧は抵抗R1、トランジスタQ
、 、Q、を介して、バリキャップC8のベースに印加
され、次に抵抗R,を介してツクリキャツプCsのベー
スに、さらに抵抗R,を介してバリキャップC!のベー
スに印加される。
In addition, the voltage of the stabilized power supply vl is determined by the resistor R1 and the transistor Q.
, ,Q, to the base of the varicap C8, then through the resistor R, to the base of the cap Cs, and then through the resistor R, to the varicap C! is applied to the base of

さらに上記電圧はトランジスタQs 、 Qa 、抵抗
ルを介して、バリキャップC1のベースに1次に抵抗R
−を介してバリキャップC6のベースtこ供給される。
Furthermore, the above voltage is applied to the base of the varicap C1 through the transistors Qs, Qa and the resistor R to the primary resistor R.
- is supplied to the base of the varicap C6.

ここで同−IC内のトランジスタにおいてはベース・エ
ミッタ間電圧をほとんど同じにできる。したがって各々
のバリキャップvRは1トランジスタの直流増幅率を’
FE %増幅器に1゜K、の出力電圧なVx+ 、 V
K2とすればVu(cs)=Vx+ (Vl、’、’、
X(Rt+R++Rs)) ・=■VR(C4)−■に
2 (v、−ゑf×(几7十几1+R1+R番)ト・・
・・・■・・・■ と表わされ、’FBが十分大きいとき上記■■式の右辺
の”FEを含む項が無視され、■に1と■に2もほぼ同
一となり、各バリキャップをこ同一のvRが印加され、
外部可変電源■、によ’) Vic+ + VK2が変
化されて同時に調整することができる。
Here, the base-emitter voltages of the transistors within the same IC can be made almost the same. Therefore, each varicap vR has the DC amplification factor of one transistor.
FE % amplifier has an output voltage of 1°K, Vx+, V
If K2, Vu(cs)=Vx+ (Vl,',',
X(Rt+R++Rs)) ・=■VR(C4)−■に2 (v,−ゑf×(几7十几1+R1+R)ト・・
...■...■ When 'FB is sufficiently large, the term including "FE" on the right side of the above formula is ignored, and 1 for ■ and 2 for ■ become almost the same, and each varicap The same vR is applied,
External variable power supply ■, Vic+ + VK2 can be changed and adjusted at the same time.

第6図は本発明の他の実施例を示す図で、第7図は第6
図の動作を説明する図であシ、第6図と同一あるいは同
様の部分にも同一符号を付しである。斯る実施例ではト
ランジスタQ+++Q+2は差動増幅器を構成しておシ
、トランジスタQ11゜Qa2の両ベース直流電圧はほ
とんど同一となる。
FIG. 6 is a diagram showing another embodiment of the present invention, and FIG. 7 is a diagram showing another embodiment of the present invention.
This is a diagram for explaining the operation of the figure, and the same or similar parts as in FIG. 6 are denoted by the same reference numerals. In this embodiment, the transistors Q+++Q+2 constitute a differential amplifier, and the DC voltages at both bases of the transistors Q11 and Qa2 are almost the same.

そこで今トランジスタQ、のベース電圧な■αとすれば Vi(cl)=Vx+−(Va+シ;x(Rn+Rn 
) ) ・・・・・・■VR(03) =Vx+ ’V
α ・・・・・・・・■と表わされる。
So now, if the base voltage of transistor Q is α, then Vi (cl) = Vx + - (Va + Si;
) ) ・・・・・・■VR(03) =Vx+ 'V
It is expressed as α......■.

ところで第3図の実施例では、’FEが十分大きくなく
 JFEを含む項が無視できなくなると、VRはバリキ
ャップCIとC,で最も差が大きくなシそこれiこ対し
て、第6図の実施例では、上記0〜0式よシ、今几+z
=Ra+R*と設定すれば、VRはバリキャップC3と
C4で最も差が大きくなる3図の実施例よIf) JF
EによるV、の誤差を低減できるという効果がある。
By the way, in the example shown in FIG. 3, when 'FE is not large enough and the term including JFE cannot be ignored, VR has the largest difference between varicap CI and C. In the example above, the above 0 to 0 formula is
If you set =Ra+R*, the difference in VR will be the largest between Varicap C3 and C4 (see the example in Figure 3) If) JF
This has the effect of reducing the error of V due to E.

またバリキャップの容量値は温度上昇とともに第7図に
示すように増加する。このためしや断層波数fc及びト
ラップ周波数fTが若干変動し、所望フィルタ特性に温
度特性を有することとなる。これに対して、第6図の実
施例では、トランジスタQ+6のベース・エミッタ間電
圧VBEの温度特性(約−2m V/’C)を利用し、
各バリキャップのベース側の電圧に約+2mV/’cの
温度特性をもたせ、かつ各バリキャップのエミッタ側に
は、例えば増幅器に、 、 K、の利得を2として、約
+2 mV/℃X 2 =約+4mV/’Cの温度特性
をもたせている。而して各バリキャップの印加電圧V。
Further, the capacitance value of the varicap increases as the temperature rises, as shown in FIG. As a result, the tomographic wave number fc and the trap frequency fT will vary slightly, and the desired filter characteristics will have temperature characteristics. On the other hand, in the embodiment shown in FIG.
The voltage on the base side of each varicap has a temperature characteristic of about +2 mV/'c, and the emitter side of each varicap has a temperature characteristic of about +2 mV/'c x 2, for example, using an amplifier with a gain of 2, K. It has a temperature characteristic of approximately +4 mV/'C. Therefore, the applied voltage V of each varicap.

に、(約+4mV/℃)−(約+2mV/℃)=約+2
mV7″Cの温度特性をもたせ、各バリキャップの容量
値の温特変動を低減している。つtb、第7図ζこ示す
ように、温度25℃のときのVR’ (VR’ = V
R十0.7V)がVmとすると、容量値はC?Lであシ
、VR’ = V mのままであれば、温度が上昇し1
00℃になれば容量値はCmに変化してしまう。これに
対して温度上昇とともにVR′をVnに変化させて、容
量値をC?Lのままにできるものである◇なおバリキャ
ップの容量値の温度特性を最も解消させるには、第7図
に示すようにVRとしての温度特性をもたせればよく、
第6図の実施例によシ上記容量の温度特性を大幅に低減
できることがわかる。
, (approximately +4mV/℃) - (approximately +2mV/℃) = approximately +2
It has a temperature characteristic of mV7''C and reduces the temperature characteristic fluctuation of the capacitance value of each varicap. As shown in Figure 7, VR'(VR' = V
If R10.7V) is Vm, then the capacitance value is C? If L is used and VR' = V m remains, the temperature will rise and 1
When the temperature reaches 00°C, the capacitance value changes to Cm. On the other hand, as the temperature rises, VR' is changed to Vn, and the capacitance value is changed to C? ◇In order to best eliminate the temperature characteristics of the capacitance value of the varicap, it is sufficient to provide the temperature characteristics as a VR as shown in Fig. 7.
It can be seen that the embodiment shown in FIG. 6 can significantly reduce the temperature characteristics of the capacitor.

ところで集積化抵抗の抵抗値の温度特性は一般に+15
0OFPM/℃程度ある。そこで第6図の点線13で示
した部分を第8図ζこ示すようにすれば、バリキャップ
の印加電圧VRは+4mV/℃となシ、バリキャップの
容量値は温度上昇とともに低下することとなる。したが
って上記集積化抵抗の温特を補償するように動作するこ
ととなシ、シゃ断層波数fc及びトラップ周波数frを
決定するCとRの積の温度特性を最も低減することがで
き、所望フィルタ特性の温度特性を大幅に低減できる。
By the way, the temperature characteristic of the resistance value of integrated resistors is generally +15
It is about 0OFPM/℃. Therefore, if the part indicated by the dotted line 13 in FIG. 6 is changed to the part shown in FIG. Become. Therefore, by operating to compensate for the temperature characteristics of the integrated resistor, the temperature characteristics of the product of C and R that determine the cut-off layer wave number fc and the trap frequency fr can be reduced to the maximum, and the desired filter The temperature characteristics of the characteristics can be significantly reduced.

以上T、A、、 −T型トラップ回路と正帰還2次フィ
ルタ回路を各々1段ずつ用いた場合をと9上げ本発明を
説明したが、これらの組合せを−かえても、またHPF
を含んだ構成であっても、実施例で示したと同様の効果
が得られることは明白である。
The present invention has been described above using one stage each of T, A, -T type trap circuits and positive feedback secondary filter circuits, but even if these combinations are changed, the HPF
It is clear that the same effects as shown in the embodiments can be obtained even with a configuration including the above.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、簡単な回路構成
で、急峻な周波数特性をもつフィルタ回路を集積化でき
、簡単な調整で高精度な性能を実現できるという効果が
ある。これによシミ子回路の小型・軽量化に大きく寄与
し、ひいてはその電子回路を使用したv’ritなどの
小型・軽量化に寄与することができる。
As described above, according to the present invention, a filter circuit having a steep frequency characteristic can be integrated with a simple circuit configuration, and highly accurate performance can be achieved with simple adjustment. This greatly contributes to the miniaturization and weight reduction of the simulator circuit, and can further contribute to the miniaturization and weight reduction of v'rit and the like using the electronic circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来外付はフィルタの特性を示す図、第2図は
従来の外付フィルタの回路図、第3図は本発明の一実施
例を示す回路図、第4図、第5図、第7図は本発明の詳
細な説明する図、第6図、第8図は本発明の他の実施例
を示す図である。 3・・・TyA−−’l’型トラップ回路、4・・・正
帰還型2次フィルタ回路、 5・・・集積範囲、 6・・・久方ビン、7・・・出力
ヒン、1o・・・所望フィルタ特性、11 、12・・
・バラツキ大のときのフィルタ特性。 傾人弁稈士高橋明夫 ¥1 1 ffi 第 2 図 第4 図 庸5叉奴<MHz) 第 S 図 (pfよビ′ルトイン電圧) 第 8 口
Fig. 1 is a diagram showing the characteristics of a conventional external filter, Fig. 2 is a circuit diagram of a conventional external filter, Fig. 3 is a circuit diagram showing an embodiment of the present invention, Figs. 4 and 5. , FIG. 7 is a diagram explaining the present invention in detail, and FIGS. 6 and 8 are diagrams showing other embodiments of the present invention. 3...TyA--'l' type trap circuit, 4...Positive feedback type secondary filter circuit, 5...Integration range, 6...Kukata bin, 7...Output pin, 1o. ... Desired filter characteristics, 11, 12...
・Filter characteristics when there is large variation. Akio Takahashi ¥1 1 ffi Figure 2 Figure 4 Figure 5 <MHz) Figure S (pf = built-in voltage) Figure 8

Claims (1)

【特許請求の範囲】 1)周波数特性を有する回路を集積化した集積回路lこ
おいて、集積化抵抗と両端の印加電圧により容量値が変
化する集積化容量を用いて、上記集積化抵抗と上記集積
化容量との積の値がトラップ周波数を決定するT−m−
1回路と、上記集積化抵抗と上記集積化容量との積がし
ゃ断周波数を決定する正帰還型フィルタ回路を同一集積
回路内に少なくとも1個ずつ組合せて急峻な周波数特性
を構成し、かつ集積回路の外部端子に印加された電圧に
よ多周波数特性を決定させるすべての上記集積化容量の
値を同時に同一比率で変化させ、上記トラップ周波数及
び上記しゃ断周波数を上記外部印加電圧によシ調整する
ことを特徴とするフィルタ集積回路。 2)上記集積化容量の両端印加電圧lこ温度特性をもた
せ、上記集積化抵抗と上記集積化容量との積の値がもつ
温度特性を低減させることを特徴とする特許請求の範囲
第1項記載のフィルタ集積回路。
[Claims] 1) In an integrated circuit in which circuits having frequency characteristics are integrated, an integrated resistor and an integrated capacitor whose capacitance value changes depending on an applied voltage across the integrated resistor and the integrated resistor are used. The value of the product with the above integrated capacitance determines the trap frequency Tm-
1 circuit and at least one positive feedback filter circuit whose cutoff frequency is determined by the product of the integrated resistor and the integrated capacitor are combined in the same integrated circuit to form a steep frequency characteristic, and the integrated circuit The values of all the integrated capacitors whose multi-frequency characteristics are determined by the voltage applied to the external terminal of the converter are simultaneously changed at the same ratio, and the trap frequency and the cutoff frequency are adjusted by the externally applied voltage. A filter integrated circuit featuring: 2) The voltage applied across the integrated capacitor has a temperature characteristic of 1, thereby reducing the temperature characteristic of the product of the integrated resistor and the integrated capacitor. The filter integrated circuit described.
JP7855484A 1984-04-20 1984-04-20 Filter integrated circuit Pending JPS60223317A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7855484A JPS60223317A (en) 1984-04-20 1984-04-20 Filter integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7855484A JPS60223317A (en) 1984-04-20 1984-04-20 Filter integrated circuit

Publications (1)

Publication Number Publication Date
JPS60223317A true JPS60223317A (en) 1985-11-07

Family

ID=13665132

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7855484A Pending JPS60223317A (en) 1984-04-20 1984-04-20 Filter integrated circuit

Country Status (1)

Country Link
JP (1) JPS60223317A (en)

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