JP3161233B2 - Filter circuit - Google Patents

Filter circuit

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Publication number
JP3161233B2
JP3161233B2 JP16928694A JP16928694A JP3161233B2 JP 3161233 B2 JP3161233 B2 JP 3161233B2 JP 16928694 A JP16928694 A JP 16928694A JP 16928694 A JP16928694 A JP 16928694A JP 3161233 B2 JP3161233 B2 JP 3161233B2
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JP
Japan
Prior art keywords
emitter
transistor
base
ground
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP16928694A
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Japanese (ja)
Other versions
JPH0832407A (en
Inventor
吉夫 東田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP16928694A priority Critical patent/JP3161233B2/en
Publication of JPH0832407A publication Critical patent/JPH0832407A/en
Application granted granted Critical
Publication of JP3161233B2 publication Critical patent/JP3161233B2/en
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Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、ＬＳＩ化が容易な半導
体素子を用いて構成したフィルタ回路に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter circuit formed by using a semiconductor device which can be easily formed into an LSI.

【０００２】[0002]

【従来の技術】図４は従来のフィルタ回路であり、ベー
スが第１の抵抗Ｒ1を介して入力端子１と第１の容量Ｃ1
の一端に、エミッタが第１の電流源Ｉ1を介して接地と
第２の抵抗Ｒ2の一端に、コレクタが電源端にそれぞれ
接続された一導電型のエミッタホロワ用の第１のトラン
ジスタＱ1と、ベースが第１の抵抗Ｒ1の他端と第２の容
量Ｃ2を介して接地に、エミッタが第２の電流源Ｉ2を介
して電源端と前記第１の容量Ｃ1の他端に、コレクタが
接地にそれぞれ接続された逆導電型のエミッタホロワ用
の第２のトランジスタＱ2を備え、第２のトランジスタ
のエミッタを出力端子２とした構成からなる。2. Description of the Related Art FIG. 4 shows a conventional filter circuit in which a base is connected to an input terminal 1 and a first capacitor C 1 via a first resistor R 1.
, A first transistor Q 1 for an emitter follower of one conductivity type having an emitter connected to ground via a first current source I 1 and one end of a second resistor R 2 , and a collector connected to a power supply end, respectively. When, base to ground through a first resistor and the other end and a second capacitance C 2 of R 1, the emitter and the second said power supply terminal via a current source I 2 of the first other capacitance C 1 At the end, a second transistor Q 2 for an emitter follower of the opposite conductivity type, the collector of which is connected to the ground, is provided, and the emitter of the second transistor is used as the output terminal 2.

【０００３】以上のように構成されたフィルタ回路につ
いて、以下にその動作を説明する。まず電源端子３に直
流電圧ＶCCが加えられており、入力端子１には、トラン
ジスタＱ1，Ｑ2が動作可能な直流バイアス電圧Ｖ1が加
えられているとする。次にトランジスタＱ1，Ｑ2の浮遊
容量と抵抗Ｒ1，Ｒ2の浮遊容量が十分に小さいとする。
入力端子１から出力端子２までの伝達関数は、トランジ
スタＱ1のエミッタ抵抗値とトランジスタＱ2のエミッタ
抵抗値が、抵抗Ｒ1，Ｒ2のいずれの抵抗値よりも十分に
小さいとすると、二次のロウパスフィルタの関数とな
る。The operation of the filter circuit configured as described above will be described below. First, it is assumed that a DC voltage V CC is applied to the power supply terminal 3 and a DC bias voltage V 1 at which the transistors Q 1 and Q 2 can operate is applied to the input terminal 1. Next, it is assumed that the floating capacitances of the transistors Q 1 and Q 2 and the floating capacitances of the resistors R 1 and R 2 are sufficiently small.
The transfer function from the input terminal 1 to the output terminal 2, the emitter resistance value of the emitter resistance of the transistor Q 2 of the transistor Q 1 is, the resistance R 1, and sufficiently smaller than any of the resistance value of R 2, two This is a function of the following low-pass filter.

【０００４】[0004]

【発明が解決しようとする課題】しかしながら、上記の
従来例の解決すべき課題としては、トランジスタＱ1，
Ｑ2のエミッタ抵抗値が、抵抗Ｒ1，Ｒ2の抵抗値に対し
て無視できなくなると、ある周波数より高い周波数が入
力端子１から入力されたとき、出力端子２には抵抗Ｒ1
の抵抗値とトランジスタＱ2のエミッタ抵抗値の抵抗分
割で入力端子１から入力される信号が一定レベル出力さ
れ、図３のａの特性になり、高周波数の信号を減衰する
ことが困難であった。という欠点を有していた。However, the problem to be solved in the above-mentioned conventional example is that the transistors Q 1 ,
Emitter resistance value Q 2 'is, resistors R 1, if can not be ignored with respect to the resistance value of R 2, when the frequency higher than a frequency is inputted from the input terminal 1, the output terminal 2 resistor R 1
The output of the resistance value and the transistor Q 2 of the signal input from the input terminal 1 by the resistance division of the emitter resistance value is constant level, the characteristics of a in FIG. 3, it is difficult to attenuate the high frequency signal Was. Had the disadvantage that

【０００５】本発明は上記課題を解決するもので、以下
を目的とする。 （１）高周波数の信号が入力端子から入力されても、出
力端子には高周波数の入力信号を減衰できるフィルタ回
路を提供する。 （２）高周波数の信号が入力端子から入力されても、出
力端子での入力信号の減衰レベルを二次のロウパスフィ
ルタの特性に保つことが可能なフィルタ回路を提供す
る。The present invention has been made to solve the above problems, and has the following objects. (1) To provide a filter circuit capable of attenuating a high-frequency input signal at an output terminal even when a high-frequency signal is input from an input terminal. (2) To provide a filter circuit capable of maintaining an attenuation level of an input signal at an output terminal at a characteristic of a secondary low-pass filter even when a high-frequency signal is input from an input terminal.

【０００６】[0006]

【課題を解決するための手段】この高周波数の入力信号
を減衰する目的を達成するために、本発明のフィルタ回
路は、ベースが第１の抵抗を介して入力端子と第１の容
量の一端に、エミッタが第１の電流源を介して接地と第
１の抵抗の一端に、コレクタが電源端にそれぞれ接続さ
れた一導電型のエミッタホロワ用の第１のトランジスタ
と、ベースが第１の抵抗の他端と第２の容量を介して接
地に、エミッタが第２の電流源を介して電源端と第１の
容量の他端に、コレクタが接地にそれぞれ接続された逆
導電型のエミッタホロワ用の第２のトランジスタと、ベ
ースが第２のトランジスタのベースに、エミッタが第３
の電流源を介して電源端に、コレクタが接地にそれぞれ
接続された逆導電型のエミッタホロワ用の第３のトラン
ジスタを備え、第３のトランジスタのエミッタを出力端
子とした構成を有している。In order to achieve the purpose of attenuating the high frequency input signal, a filter circuit according to the present invention comprises a base having a first resistor connected to an input terminal and one end of a first capacitor. A first transistor for an emitter follower of one conductivity type, the emitter of which is connected to the ground and one end of the first resistor via the first current source, the collector of which is connected to the power supply end, and the base of which is connected to the first resistor. For the opposite conductivity type emitter follower, the other end of which is connected to the ground via the second capacitor, the emitter is connected to the power supply end and the other end of the first capacitor via the second current source, and the collector is connected to the ground. A second transistor having a base connected to the base of the second transistor and an emitter connected to the third transistor
A third transistor for an emitter follower of the opposite conductivity type, the collector of which is connected to the ground, is provided at the power supply terminal via the current source described above, and the emitter of the third transistor is used as an output terminal.

【０００７】また高周波数の入力信号を減衰するレベル
が二次のロウパスフィルタの特性を保つ目的を達成する
ために、本発明のフィルタ回路は、ベースが第１の抵抗
を介して入力端子と第１の容量の一端に、エミッタが第
１の電流源を介して接地と第１の抵抗の一端に、コレク
タが電源端にそれぞれ接続された一導電型のエミッタホ
ロワ用の第１のトランジスタと、ベースが第１の抵抗の
他端と第２の容量を介して接地に、エミッタが第２の電
流源を介して電源端と第１の容量の他端に、コレクタが
接地にそれぞれ接続された逆導電型のエミッタホロワ用
の第２のトランジスタと、ベースが第２のトランジスタ
のベースに、エミッタが第３の電流源を介して電源端
に、コレクタが接地にそれぞれ接続された逆導電型のエ
ミッタホロワ用の第３のトランジスタと、ベースが第３
のトランジスタのエミッタに、エミッタが第４の電流源
を介して接地に、コレクタが電源端にそれぞれ接続され
た一導電型のエミッタホロワ用の第４のトランジスタを
備え、第４のトランジスタのエミッタを出力端子とした
構成を有している。In order to achieve the purpose of maintaining the characteristics of the secondary low-pass filter at the level at which the high frequency input signal is attenuated, the filter circuit of the present invention has a base connected to the input terminal via the first resistor. A first transistor for an emitter follower of one conductivity type, the emitter being connected to one end of the first capacitor, the emitter being connected to ground via the first current source and one end of the first resistor, and the collector being connected to the power supply end, respectively; The base is connected to the ground via the other end of the first resistor and the second capacitor, the emitter is connected to the power supply end and the other end of the first capacitor via the second current source, and the collector is connected to the ground. A second transistor for a reverse conductivity type emitter follower, a reverse conductivity type emitter follower having a base connected to the base of the second transistor, an emitter connected to a power supply terminal via a third current source, and a collector connected to the ground, respectively; For the first And of the transistor, the base is the third
A fourth transistor for an emitter follower of one conductivity type, the emitter of which is connected to the ground via a fourth current source, and the collector of which is connected to the power supply terminal. It has a configuration as a terminal.

【０００８】[0008]

【作用】この構成によって、高周波数の信号が入力端子
から入力されても出力端子には高周波数の入力信号を減
衰することが可能になる。With this configuration, even if a high-frequency signal is input from the input terminal, the output terminal can attenuate the high-frequency input signal.

【０００９】また、高周波数の信号が入力端子から入力
されても出力端子での入力信号の減衰レベルを二次のロ
ウパスフィルタの特性に保つことが可能になる。Further, even if a high-frequency signal is input from the input terminal, the attenuation level of the input signal at the output terminal can be maintained at the characteristic of the secondary low-pass filter.

【００１０】[0010]

【実施例】以下本発明の実施例について、図面を参照し
ながら説明する。Embodiments of the present invention will be described below with reference to the drawings.

【００１１】［実施例１］図１は、本発明の第１の実施
例におけるフィルタ回路の基本的な構成を示す図であ
る。図１の回路は、ベースが第１の抵抗を介して入力端
子と第１の容量の一端に、エミッタが第１の電流源を介
して接地と第１の抵抗の一端に、コレクタが電源端にそ
れぞれ接続された一導電型のエミッタホロワ用の第１の
トランジスタ（たとえばＮＰＮ型）と、ベースが第１の
抵抗の他端と第２の容量を介して接地に、エミッタが第
２の電流源を介して電源端と第１の容量の他端に、コレ
クタが接地にそれぞれ接続された逆導電型のエミッタホ
ロワ用の第２のトランジスタ（たとえばＰＮＰ型）と、
ベースが第２のトランジスタのベースに、エミッタが第
３の電流源を介して電源端に、コレクタが接地にそれぞ
れ接続された逆導電型のエミッタホロワ用の第３のトラ
ンジスタを備え、第３のトランジスタのエミッタを出力
端子とした構成を有している。[First Embodiment] FIG. 1 is a diagram showing a basic configuration of a filter circuit according to a first embodiment of the present invention. In the circuit of FIG. 1, the base is connected to the input terminal and one end of the first capacitor via the first resistor, the emitter is connected to the ground and one end of the first resistor via the first current source, and the collector is connected to the power supply terminal. A first transistor (e.g., NPN type) for an emitter follower of one conductivity type, respectively, a base connected to ground via the other end of the first resistor and a second capacitor, and an emitter connected to a second current source. A second transistor (e.g., a PNP type) for an emitter follower of an opposite conductivity type, the collector of which is connected to the ground, and the other end of the first capacitor via a power supply end and the other end of the first capacitor, respectively.
A third transistor for an emitter-follower of a reverse conductivity type, wherein the base is connected to the base of the second transistor, the emitter is connected to the power supply terminal via a third current source, and the collector is connected to the ground; Are used as output terminals.

【００１２】まず、電源端子３に直流電圧ＶCCが印加さ
れており、入力端子１には、トランジスタＱ1，Ｑ2，Ｑ
3が動作可能な直流バイアス電圧Ｖ1が加えられていると
する。ここで、トランジスタＱ1，Ｑ2，Ｑ3の浮遊容量
と抵抗Ｒ1，Ｒ2の浮遊容量とが十分に小さいとすると、
トランジスタＱ2のエミッタでの入力周波数に対する入
出力特性は、従来例で説明したように図３のａの特性に
なる。ここで、トランジスタＱ2のベースでの入出力特
性は、入力周波数が高周波数になってもトランジスタＱ
1のエミッタ抵抗値と抵抗Ｒ2の抵抗値と容量Ｃ2の容量
値で減衰して、図３のｂの特性になる。First, a DC voltage V CC is applied to a power supply terminal 3 and transistors Q 1 , Q 2 , Q
3, the DC bias voltages V 1 operable are added. Here, assuming that the stray capacitances of the transistors Q 1 , Q 2 , Q 3 and the stray capacitances of the resistors R 1 , R 2 are sufficiently small,
Output characteristics with respect to the input frequency at the emitter of the transistor Q 2 is made to the characteristics of a in FIG. 3 as described in the conventional example. Here, the input-output characteristic at the base of the transistor Q 2 is, even if the input frequency becomes high frequencies the transistor Q
Attenuated by the resistance value of the resistor R 2 and the emitter resistance value of 1 and the capacitance value of the capacitor C 2, made on the characteristics of b in FIG.

【００１３】したがって、トランジスタＱ2のベースの
信号をエミッタホロワ用のトランジスタＱ3で伝達させ
て、トランジスタＱ3のエミッタを出力端子とすること
で、入力周波数が高周波数になっても出力端子での減衰
を確保できる。[0013] Thus, by transmitting the base signal of the transistor Q 2 with transistor Q 3 for emitter follower, by the output terminal of the emitter of the transistor Q 3, the input frequency at even when the high frequency output terminal Attenuation can be secured.

【００１４】［実施例２］図２は本発明の第２の実施例
におけるフィルタ回路の基本的な構成を示す図である。
図２の回路は、ベースが第１の抵抗を介して入力端子と
第１の容量の一端に、エミッタが第１の電流源を介して
接地と第１の抵抗の一端に、コレクタが電源端にそれぞ
れ接続された一導電型のエミッタホロワ用の第１のトラ
ンジスタと、ベースが第１の抵抗の他端と第２の容量を
介して接地に、エミッタが第２の電流源を介して電源端
と第１の容量の他端に、コレクタが接地にそれぞれ接続
された逆導電型のエミッタホロワ用の第２のトランジス
タと、ベースが第２のトランジスタのベースに、エミッ
タが第３の電流源を介して電源端に、コレクタが接地に
それぞれ接続された逆導電型のエミッタホロワ用の第３
のトランジスタと、ベースが第３のトランジスタのエミ
ッタに、エミッタが第４の電流源を介して接地に、コレ
クタが電源端にそれぞれ接続された一導電型のエミッタ
ホロワ用の第４のトランジスタを備え、第４のトランジ
スタのエミッタを出力端子とした構成を有している。[Embodiment 2] FIG. 2 is a diagram showing a basic configuration of a filter circuit according to a second embodiment of the present invention.
In the circuit of FIG. 2, the base is connected to the input terminal and one end of the first capacitor via the first resistor, the emitter is connected to ground and one end of the first resistor via the first current source, and the collector is connected to the power supply terminal. A first transistor for an emitter follower of one conductivity type respectively connected to the ground, a base connected to ground via the other end of the first resistor and a second capacitor, and an emitter connected to a power supply terminal via a second current source. And the other end of the first capacitor, a second transistor for an emitter follower of the opposite conductivity type having a collector connected to the ground, a base connected to the base of the second transistor, and an emitter connected via a third current source. And a third terminal for a reverse conductive type emitter follower having a collector connected to the ground.
And a fourth transistor for an emitter follower of one conductivity type, the base of which is connected to the emitter of the third transistor, the emitter of which is connected to the ground via the fourth current source, and the collector of which is connected to the power supply end, respectively. It has a configuration in which the emitter of the fourth transistor is used as an output terminal.

【００１５】まず電源端子３に直流電圧ＶCCが加えられ
ており、入力端子１には、トランジスタＱ1，Ｑ2，
Ｑ3，Ｑ4が動作可能な直流バイアス電圧Ｖ1が加えられ
ているとする。ここで、トランジスタＱ1，Ｑ2，Ｑ3，
Ｑ4の浮遊容量と抵抗Ｒ1，Ｒ2の浮遊容量が十分に小さ
いとする。First, a DC voltage V CC is applied to a power supply terminal 3, and transistors Q 1 , Q 2 ,
Q 3, Q 4 is the DC bias voltages V 1 operable to that applied. Here, transistors Q 1 , Q 2 , Q 3 ,
Stray capacitance and the stray capacitance of the resistor R 1, R 2 of Q 4 is sufficiently small.

【００１６】ここで、トランジスタＱ1のエミッタ抵抗
をｒenとすると、次式（１）で示される。[0016] In this case, if the emitter resistance of the transistor Q 1 and r en, represented by the following formula (1).

【００１７】 ｒen＝ｋ・Ｔ／ｑ・Ｉ1 ………（１） ただし、ｋ：ボルツマン定数 Ｔ：絶対温度 ｑ：電子の電荷 Ｉ1；電流源Ｉ1の電流値 また、電流源Ｉ2，Ｉ3の電流値がそれぞれＩ0で等しい
とすると、トランジスタＱ2，Ｑ3のエミッタ抵抗は等し
くなり、これをｒepとすると、次式（２）で示される。R en = k · T / q · I 1 (1) where k: Boltzmann's constant T: absolute temperature q: electron charge I 1 ; current value of current source I 1 and current source I Assuming that the current values of 2 and I 3 are equal to each other at I 0 , the emitter resistances of the transistors Q 2 and Q 3 are equal. If this is set to rep , it is expressed by the following equation (2).

【００１８】 ｒep＝ｋ・Ｔ／ｑ・Ｉ0 …………（２） ただし、Ｉ0 ；電流源Ｉ2，Ｉ3の電流値 次に、入力端子１からトランジスタＱ2のベースまで伝
達関数をＨ1（Ｓ）とすると、次式（３）で示される。R ep = k · T / q · I 0 (2) where I 0 ; the current value of the current sources I 2 and I 3 Next, the signal is transmitted from the input terminal 1 to the base of the transistor Q 2. Assuming that the function is H 1 (S), it is expressed by the following equation (3).

【００１９】 Ｈ1（Ｓ）＝（１＋Ｃ1・ｒep・Ｓ）／〔Ｃ1・Ｃ2・（Ｒ1＋ｒep） ×（Ｒ2＋ｒen）・Ｓ2＋｛Ｃ1・ｒep＋Ｃ2・（Ｒ2＋ｒen）｝ ×Ｓ＋１〕 …………（３） ただし、Ｃ1：容量Ｃ1の容量値 Ｃ2：容量Ｃ2の容量値 Ｒ1：抵抗Ｒ1の抵抗値 Ｒ2：抵抗Ｒ2の抵抗値 ｒep：トランジスタＱ2のエミッタ抵抗値 ｒen：トランジスタＱ1のエミッタ抵抗値 また、電流源Ｉ2，Ｉ3の電流値が等しく、容量Ｃ1，Ｃ2
の容量値が等しいとすると、トランジスタＱ3のベース
から出力端子２まで伝達関数をＨ2（Ｓ）は式（４）で
示される。[0019] H 1 (S) = (1 + C 1 · r ep · S) / [C 1 · C 2 · (R 1 + r ep) × (R 2 + r en) · S 2 + {C 1 · r ep + C 2 · (R 2 + r en )｝ × S + 1] (3) where C 1 : capacitance value of capacitance C 1 C 2 : capacitance value of capacitance C 2 R 1 : resistance value of resistance R 1 R 2 : resistance r ep of the resistor R 2: emitter resistance of the transistor Q 2 r en: emitter resistance of the transistor Q 1 also equal the current value of the current source I 2, I 3, capacitor C 1, C 2
If the capacitance value is equal to, H 2 the transfer function from the base of the transistor Q 3 to the output terminal 2 (S) is represented by the formula (4).

【００２０】 Ｈ1（Ｓ）＝１／（１＋Ｃ1・ｒep・Ｓ） …………（４） ただし、Ｃ1：容量Ｃ3の容量値 ｒep：トランジスタＱ3のエミッタ抵抗値 したがって、入力端子１から出力端子２まで伝達関数を
Ｈ（Ｓ）は式（５）で示される。H 1 (S) = 1 / (1 + C 1 · rep · S) (4) where C 1 is the capacitance value of the capacitor C 3 rep is the emitter resistance value of the transistor Q 3 . The transfer function H (S) from the input terminal 1 to the output terminal 2 is represented by equation (5).

【００２１】 Ｈ（Ｓ）＝Ｈ1（Ｓ）・Ｈ2（Ｓ） ＝１／〔Ｃ1・Ｃ2・（Ｒ1＋ｒep）・（Ｒ2＋ｒen）・Ｓ2 ＋｛Ｃ1・ｒep＋Ｃ2・（Ｒ2＋ｒen）｝・Ｓ＋１］ …（５） 式（５）の一例を示すと、図３のｂの特性になる。[0021] H (S) = H 1 ( S) · H 2 (S) = 1 / [C 1 · C 2 · (R 1 + r ep) · (R 2 + r en) · S 2 + {C 1 · r ep + C 2 · (R 2 + r en )｝ · S + 1] (5) An example of the equation (5) has a characteristic shown in FIG.

【００２２】以上より、図２のフィルタ回路の周波数特
性は、高帯域まで安定な二次のロウパス特性を得ること
が可能である。As described above, the frequency characteristic of the filter circuit shown in FIG. 2 can obtain a stable secondary low-pass characteristic up to a high band.

【００２３】また、電流源Ｉ1，Ｉ2，Ｉ3の電流値の電
流値を可変することでｒen，ｒepが変化するので、図２
の回路は周波数特性の可変が可能となる。Further, the current sources I 1, I 2, r by varying the current value of the current value of I 3 en, since r ep changes, 2
In this circuit, the frequency characteristics can be varied.

【００２４】また、ｒen，ｒepは電流源Ｉ1，Ｉ2，Ｉ3
の電流値で決定されるので、容量Ｃ1，Ｃ2，Ｃ3の容量
値の温度変化が小さいとすると、電流値の温度変化を抵
抗Ｒ1，Ｒ2の温度変化と一定の関係を持たせれば、周波
数特性の温度変化を小さくできる。[0024] In addition, r en, r ep current source I 1, I 2, I 3
Since the temperature change of the capacitance values of the capacitors C 1 , C 2 , and C 3 is small, the temperature change of the current value has a certain relationship with the temperature change of the resistors R 1 and R 2. By doing so, the temperature change of the frequency characteristic can be reduced.

【００２５】なお、コンデンサＣ2，Ｃ3を接続する電位
点は、接地もしくは電源端どちらでもよい。The potential point connecting the capacitors C 2 and C 3 may be either the ground or the power supply end.

【００２６】[0026]

【発明の効果】本発明は、ＮＰＮ型とＰＮＰ型のエミッ
タホロワと容量と抵抗を基本にした簡単な構成で信頼性
の高いフィルタ回路を実現している。The present invention realizes a highly reliable filter circuit with a simple configuration based on NPN-type and PNP-type emitter followers, capacitance and resistance.

【００２７】また、ＮＰＮ型とＰＮＰ型のエミッタホロ
ワに接続された電流源の電流値を変化させることで、容
易に周波数特性を可変できる。Further, the frequency characteristics can be easily varied by changing the current value of the current sources connected to the NPN type and PNP type emitter followers.

【００２８】また、電流源の電流値に温度特性を持たせ
れば、周波数特性の温度変化を小さくできる。Further, if the current value of the current source has a temperature characteristic, the temperature change of the frequency characteristic can be reduced.

【００２９】また、ＮＰＮ型とＰＮＰ型のエミッタホロ
ワと容量と抵抗を基本にしてフィルタ回路を構成してい
るので、ダイナミックレンジが広くできて、低電源電圧
での動作が可能である。Further, since the filter circuit is constructed based on the NPN type and PNP type emitter followers, the capacitance and the resistance, the dynamic range can be widened and the operation at a low power supply voltage is possible.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の実施例１におけるフィルタ回路の構成
を示す回路図FIG. 1 is a circuit diagram showing a configuration of a filter circuit according to a first embodiment of the present invention.

【図２】本発明の実施例２におけるフィルタ回路の構成
を示す回路図FIG. 2 is a circuit diagram illustrating a configuration of a filter circuit according to a second embodiment of the present invention.

【図３】本発明の実施例におけるフィルタ回路と従来の
フィルタ回路の周波数特性を示す図FIG. 3 is a diagram illustrating frequency characteristics of a filter circuit according to an embodiment of the present invention and a conventional filter circuit.

【図４】従来のフィルタ回路の回路図FIG. 4 is a circuit diagram of a conventional filter circuit.

【符号の説明】[Explanation of symbols]

１ 入力端子 ２ 出力端子 ３ 電源端子 ４ 二次ロウパス回路 ５ 一次ロウパス回路 ６ バッファ回路 Ｑ1〜Ｑ4 トランジスタ Ｃ1〜Ｃ3 容量 Ｉ1〜Ｉ4 電流源 Ｒ1，Ｒ2 抵抗1 input terminal 2 output terminal 3 power terminal 4 secondary lowpass circuit 5 primary low pass circuit 6 buffer circuit Q 1 to Q 4 transistor C 1 -C 3 volume I 1 ~I 4 current sources R 1, R 2 resistor

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H03H 11/04 H03H 11/54 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H03H 11/04 H03H 11/54

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 ベースが第１の抵抗を介して入力端子と
第１の容量の一端に、エミッタが第１の電流源を介して
接地と第１の抵抗の一端に、コレクタが電源端にそれぞ
れ接続された一導電型のエミッタホロワ用の第１のトラ
ンジスタと、ベースが前記第１の抵抗の他端と第２の容
量を介して接地に、エミッタが第２の電流源を介して電
源端と前記第１の容量の他端に、コレクタが接地にそれ
ぞれ接続された逆導電型のエミッタホロワ用の第２のト
ランジスタと、ベースが前記第２のトランジスタのベー
スに、エミッタが第３の電流源を介して電源端に、コレ
クタが接地にそれぞれ接続された逆導電型のエミッタホ
ロワ用の第３のトランジスタを備え、前記第３のトラン
ジスタのエミッタを出力端子としたことを特徴とするフ
ィルタ回路。1. A base is connected to an input terminal and one end of a first capacitor via a first resistor, an emitter is connected to ground and one end of a first resistor via a first current source, and a collector is connected to a power supply end. A first transistor for an emitter follower of one conductivity type connected to each other, a base connected to ground via the other end of the first resistor and a second capacitor, and an emitter connected to a power supply terminal via a second current source. And the other end of the first capacitor, a second transistor for an emitter follower of the opposite conductivity type, the collector of which is connected to ground, a base connected to the base of the second transistor, and an emitter connected to a third current source. A third transistor for an emitter follower of the opposite conductivity type, the collector of which is connected to the ground via a power supply terminal, and an emitter of the third transistor serving as an output terminal. 【請求項２】 ベースが第１の抵抗を介して入力端子と
第１の容量の一端に、エミッタが第１の電流源を介して
接地と第１の抵抗の一端に、コレクタが電源端にそれぞ
れ接続された一導電型のエミッタホロワ用の第１のトラ
ンジスタと、ベースが前記第１の抵抗の他端と第２の容
量を介して接地に、エミッタが第２の電流源を介して電
源端と前記第１の容量の他端に、コレクタが接地にそれ
ぞれ接続された逆導電型のエミッタホロワ用の第２のト
ランジスタと、ベースが前記第２のトランジスタのベー
スに、エミッタが第３の電流源を介して電源端に、コレ
クタが接地にそれぞれ接続された逆導電型のエミッタホ
ロワ用の第３のトランジスタと、ベースが前記第３のト
ランジスタのエミッタに、エミッタが第４の電流源を介
して接地に、コレクタが電源端にそれぞれ接続された一
導電型のエミッタホロワ用の第４のトランジスタを備
え、前記第４のトランジスタのエミッタを出力端子とし
たことを特徴とする請求項１記載のフィルタ回路。2. A base is connected to an input terminal and one end of a first capacitor via a first resistor, an emitter is connected to ground and one end of the first resistor via a first current source, and a collector is connected to a power supply end. A first transistor for an emitter follower of one conductivity type connected to each other, a base connected to ground via the other end of the first resistor and a second capacitor, and an emitter connected to a power supply terminal via a second current source. And the other end of the first capacitor, a second transistor for an emitter follower of the opposite conductivity type, the collector of which is connected to ground, a base connected to the base of the second transistor, and an emitter connected to a third current source. And a third transistor for an emitter follower of the opposite conductivity type, the collector of which is connected to the ground, a base connected to the emitter of the third transistor, and an emitter connected to the ground via a fourth current source. To collect 2. The filter circuit according to claim 1, further comprising a fourth transistor for emitter follower of one conductivity type connected to a power supply terminal, wherein an emitter of said fourth transistor is used as an output terminal.
JP16928694A 1994-07-21 1994-07-21 Filter circuit Expired - Fee Related JP3161233B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16928694A JP3161233B2 (en) 1994-07-21 1994-07-21 Filter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16928694A JP3161233B2 (en) 1994-07-21 1994-07-21 Filter circuit

Publications (2)

Publication Number Publication Date
JPH0832407A JPH0832407A (en) 1996-02-02
JP3161233B2 true JP3161233B2 (en) 2001-04-25

Family

ID=15883707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16928694A Expired - Fee Related JP3161233B2 (en) 1994-07-21 1994-07-21 Filter circuit

Country Status (1)

Country Link
JP (1) JP3161233B2 (en)

Also Published As

Publication number Publication date
JPH0832407A (en) 1996-02-02

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