JPS60223175A - Superconductive switching device - Google Patents

Abstract

PURPOSE:To make a superconductive switching circuit with remarkable circuit gain by means of producing a superconductive three terminal switching device of voltage-driven type as to input signal with remarkable current gain by a method wherein the current of Cooper coupling flowing from superconductive electrode to a semiconductor is controlled by electric signals transmitted to other electrode provided on the semiconductor. CONSTITUTION:A p type buried electrode 104 and an n type channel layer 101 come into contact with each other through the intermediary of a p-n junction 110. A depletion layer 111 is diffused in the n type channel layer 101 by the p-n junction 110 and the thickness of depletion layer 111 is fluctuated by the voltage impressed on the p type buried electrode 104, i.e. if e.g. an inverse bias voltage impressed on the p-n junction 110 is boosted, the thickness of depletion layer 111 is increased. Therefore, the thickness of active n type channel layer 101, apparent image and constant conduction resistance RN are increased resultantly decreasing the maximum superconductive current flowing between superconductive electrode 102 and 103. Through these procedures, the maximum superconductive current to be flown in the superconductive electrodes 102, 103 may be controlled by any voltage impressed on the p type buried electrode 104.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a superconducting switching device, and particularly to a three-terminal superconducting switching device that uses a control electrode to control a superconducting current flowing at an interface between a semiconductor and a superconducting metal.

[Background of the invention]

Superconducting switching devices are well known in the art and include Josephson devices, Quitron devices (Q
uiteron) etc. The Josephson device consists of two devices separated by a very thin tunnel barrier.
A zero-voltage current flows between two superconductors, and the device can be switched from a superconducting state to a voltage state by increasing the current through the device or by applying a magnetic field to the device. However, this device has a drawback in that the circuit gain is small, about 2, and it is not possible to ensure sufficient operational margin for the entire circuit.

On the other hand, the Titron device is a three-terminal switching device that has a control electrode consisting of three superconductors separated by two very thin tunnel barriers, and a large amount of quasiparticles are injected into the middle superconductor. , which reduces the gap energy of the superconductor and changes the current flowing through the device. This device is disclosed in detail in Japanese Patent Laid-Open No. 12575/1983. However, this device has the disadvantage that the relaxation time of quasiparticles in the superconductor is slow, making it slow as a switching device.

A hybrid Josephson field effect transistor (hereinafter referred to as JOFET) has been proposed as another switching device. T, D, C1 for JOFET
ark et al. J, Appl, Phys, 51(5)2
736-2743. A JOFET has a structure in which a semiconductor (normal conductor) and a superconductor are joined. Electron pairs, or Cooper pairs, in the superconductor seep into the semiconductor to a depth corresponding to the coherence distance. The principle of the JOFET is to move the Cooper pair seeping into the semiconductor in the in-plane direction of the semiconductor. In this JOFET, the current gain cannot exceed 1 because the Cooper pair is supplied from the gate electrode. Therefore, the disadvantage is that the circuit gain is small. As described above, the reality is that conventional switching devices as described above are still unsatisfactory in terms of circuit gain and speed.

[Purpose of the invention]

An object of the present invention is to provide a voltage-driven superconducting three-terminal switching device with a large current gain with respect to an input signal, thereby making it possible to obtain a high-speed superconducting switching circuit with a large circuit gain.

[Summary of the invention]

To achieve this object, the present invention provides a superconducting electrode provided on a semiconductor, and the flow of Cooper pairs injected into the semiconductor from the superconducting electrode is controlled by an electric signal applied to another electrode provided on the semiconductor. It is characterized by More specifically, the thickness of the depletion layer in the channel layer of the semiconductor is controlled by the voltage applied to this control electrode, the number of Cooper pairs seeped into the semiconductor is controlled, and the maximum superconducting current flowing through the channel layer is controlled. It is something.

[Embodiments of the invention]

FIG. 1 shows a first embodiment of the present invention. Impurity 10”a
A P-type buried electrode 104 is formed on a silicon substrate 100 of n-', and an impurity (arsenic or phosphorus) is added to
11'~1020an-' introduced to depth 0.1~0.1
An N-type channel layer 101 with five capes is formed. This P-type buried electrode 104 and N-type channel layer 101 are connected to the PN junction 1
Contact is made through 10. At the end of the N-type channel layer 101, a first. Second superconducting electrode 1
02.103 is provided and the electrode and the N-type channel layer 101
First and second signals 120 and 130 are provided between the two. Note that two superconducting electrodes 102. = 103, the interval is narrow < (0, 3ttm), and the two electrodes are weakly coupled in a superconducting state. Moreover, this first and second joining 1
20.130 constitutes a Schottky barrier, and the thickness of this Schottky barrier is very thin, allowing electrons to pass through it due to tunneling. The P-type buried electrode 104 is connected to the gate terminal 107 and is connected to the first and second superconducting electrodes 1.
02 and 103 are source terminal 1o5 and drain terminal 1, respectively.
Connected to 06.

The operation of the switching device shown in FIG. 1 having such a configuration will be explained using FIG. 2. N-type channel layer 10
A Cooper pair 200 is supplied to the first superconducting electrode 102 via a first Schottky junction 120. Similarly, a Cooper pair 180 is connected to the N-type channel layer 101 from the second superconducting electrode 103 via the second Schottky junction 130.
is supplied. As mentioned above, the distance between the two superconducting electrodes is very narrow, for example, 0.3 mm, and since the two superconducting electrodes are weakly coupled, a superconducting current flows between them. The maximum superconducting current that can flow between the two electrodes is expressed by equation (1).

Im”4πΔ/2eRN・= (1) Here, Δ is the gap energy (mV) of the superconducting metal of the superconducting electrodes 102 and 103, and RN is the N-type channel layer 1
01 normal conductor resistance (Ω). This normal conductive resistance RN
is controlled by the voltage applied to the P-type buried electrode 104. As described above, the P-type buried electrode 104 and the N-type channel layer 101 are in contact via the PN junction 110.

A depletion layer 111 is spread in the N type channel layer 101 due to the PN junction 110, and the thickness of this depletion layer 111 is P
It changes depending on the voltage applied to the embedded electrode 104. That is, for example, when the reverse bias voltage applied to the PN junction 110 is increased, the thickness of the depletion layer factory increases. Therefore, the effective thickness of the N-type channel layer 101 is
The normal conductivity resistance RN of the shaped channel layer 101 increases. For this reason.

As is clear from equation (1), two superconducting electrodes 102
．． The maximum superconducting current flowing between 103 and 103 decreases.

From the above explanation, it is clear that the maximum superconducting current that can flow through the two superconducting electrodes 102 and 103 can be controlled by the voltage applied to the P-type buried electrode 104.

According to this embodiment, the P-type buried electrode 104 which is the gate
is separated from the N-type channel layer 101 by a PN junction 110. Therefore, the P-type buried electrode 104 which is the gate
No signal current flows through the input signal, and the device shown in FIG. 1 is a voltage driven device with respect to the input signal. Although the embodiment shown in FIG. 1 is a combination of a P-type buried electrode and an N-type channel layer, it goes without saying that the present invention can also be practiced with a combination of an N-type buried electrode and a P-type channel layer.

FIG. 3 shows a second embodiment of the invention. Similar to the first embodiment, a P-type buried electrode 104 and an N-type channel layer 101 are formed on a silicon substrate 100.

The buried electrode 104 and the N type channel layer 101 have a P shape.
They are in contact via an N junction 110. N-type channel layer 1
The surface of 01 has a thickness of 0.2 to 1 formed by vapor deposition.
A p superconducting electrode 220 is in contact with the Schottky barrier 221 . Both ends of the N-type channel layer 101 are connected to first and second electrodes 202, 203 and an impurity 10'''-1.
Ohmic contact is made through N-type contact layers 212 and 213 of 0"an-". Each electrode has an insulating layer 211 (
For example, a silicon substrate 10
0, separated so as not to contact the channel layer 101; P-type buried electrode 104 is connected to gate terminal 107, and first and second electrodes 202 and 203 are connected to source terminal 105 and drain terminal 106, respectively.

The operation of the switching device shown in FIG. 3 will be explained with reference to FIG. 4. A Cooper pair 200 seeps into the 6N type channel layer 101 from the superconducting electrode 220 via the Schottky barrier 221. The Cooper pair 200 extends into the semiconductor to a depth corresponding to the coherent distance (1~o, t, m), and this Cooper pair 200 moves laterally in the semiconductor, creating a superconducting current between the two electrodes 202, 203. flows. The maximum superconducting current flowing through this N-type channel layer 101 is the above (
1) It is expressed by the formula. The normal conductivity resistance RN of the N-type channel layer 101 can be controlled by the voltage applied to the P-type buried layer 104. The principle of operation is similar to that described in the first embodiment.

The operation of the embodiment shown in FIG. 3 will be explained from the energy band structure using FIGS. 5 and 6. 5 and 6 are diagrams showing the energy band structure at the AA' position in FIG. 4. In FIG. 5, when no voltage is applied to the P-type buried electrode 104,
FIG. 6 shows a case where a voltage is applied to the P-type buried electrode 104 so that the PN junction 110 is reverse biased. When the voltage shown in FIG. 5 is not applied, the superconducting electrode 220
．． The Fermi levels EF of the N-type channel layer 101 and the P-type buried electrode 104 match. N-type channel layer 1011
Since it is doped with a high concentration impurity such as ClO "an-", the Fermi level of the N-type channel layer 101 is 100 to 200 mV higher than the lower end of the conductive pair.

The thickness of the Schmitt key barrier 221 is extremely thin, 10 to 20 mm, and electrons can freely pass through it. Therefore, the Cooper pair 200 of the superconducting electrode 220 is connected to the Schottky barrier 2
21 and seeps into the N-type channel layer 101. The N-type channel layer 101 has a Schottky barrier 221 and a PN
The junction 110 creates an energy valley. The Cooper pair 200 seeping into the N-type channel layer 101 is accumulated in this energy valley. This accumulated Cooper pair moves laterally in the semiconductor and becomes a superconducting current.

On the other hand, as shown in FIG. 6, when a reverse bias voltage is applied to the P-type buried electrode 104, the thickness of the depletion layer of the PN junction 110 increases, and the valley of energy in which the RP pair is accumulated becomes smaller. Therefore, the amount of accumulated Cooper pairs decreases, and the maximum superconducting current decreases. As explained above, the voltage applied to the P-type buried electrode 104 causes the two electrodes 202 to
．． It is clear that the maximum superconducting current that can flow through 203 can be controlled.

According to this embodiment, the P-type buried electrode 104 which is the gate
is separated from the N-type channel layer 101 by a PN junction 110. Therefore, no signal current flows through the P-type buried electrode 104, which is the gate, and it is clear that the device shown in FIG. 3 is a device driven by a voltage with respect to an input signal.

Although the embodiment shown in FIG. 3 is a combination of a P-type buried electrode and an N-type channel layer, it goes without saying that the present invention can also be practiced with a combination of an N-type buried electrode and a P-type channel layer.

Furthermore, in the above embodiment, by changing the potential of the superconducting electrode 220, the amount of Cooper pairs seeping into the N-type channel layer 101 changes. Therefore, it is clear that the superconducting electrode 220 can be used as an offset electrode of a switching device.

Furthermore, although silicon was used as the substrate in the above two embodiments, germanium, gallium-arsenide, indium-antimony, indium-arsenic, etc. may also be used, and compounds or simple substances of lead, niobium, and indium may be used as the material for the superconducting electrode. Needless to say, it can be used.

Also, the voltage applied to the gate or source/drain is, for example, 0 to 10 mV, and the current flowing is, for example, gate width 10 tl! In the case of n, it is 100 μA.

Next, the reason why the voltage gain is improved in the present invention will be explained. According to the prior art, C 1ark's proposal is fed to the del, and this fed Cooper pair moves within the channel. In addition, looking at this operation from a circuit perspective, it is as follows.

That is, when the input signal voltage changes, a corresponding input signal current flows into the channel, which flows into the drain electrode. In other words, the same amount of current as the input signal is obtained as the output current. This means that the input impedance of the circuit is small. It is clear that this circuit does not provide any circuit gain, especially current gain. On the other hand, in the device according to the present invention, the Cooper pair is supplied from an electrode, which is a gate electrode. The gate electrode and the channel are insulated, for example, by a PN junction. Therefore, even if the input signal voltage changes, no current flows into the gate electrode. From a circuit perspective, the device according to the present invention has an insulated gate electrode, and is a high input impedance device in which no input current flows even when the input voltage changes. Therefore, in a circuit using the device of the present invention, the current gain can be particularly increased, and the voltage gain can also be increased.

By the way, the superconducting switching device according to the present invention can be used in combination with other superconducting switching devices, such as Quitron and Josephson devices, and superconducting wiring (including superconducting transmission lines). Superconducting wiring is essential for high-speed circuits with small signal voltage amplitudes because there is no voltage drop due to the current flowing through the wiring. This is something that conventional semiconductor technology, typified by silicon semiconductors, does not have. Josephson devices are the fastest switching devices.

The superconducting switching element according to the present invention can be operated in combination with a Josephson element, and the performance of the Josephson element can be brought out even more. FIG. 7 shows an example in which a superconducting switching element according to the present invention and a Josephson element are used together. Regarding Josephson elements, see Anacker et al. “Josephson Comp
uter Technology”IBM R&D V
O1124 No. 2 (1980). The example shown in FIG. 7 has a configuration in which a low current source 920 is connected to a circuit in which a Josephson device 900 and a superconducting switching device 910 according to the present invention are connected in parallel. The Josephson element is in a voltage state.

The Josephson device operates in a so-called latching mode, in which it does not transition to a superconducting state unless the current flowing through it falls below a certain amount. Conventionally, in order to transition a Josephson element that is in a voltage state to a superconducting state, the power supply voltage is reduced.
A so-called AC power supply circuit was proposed. In this type of circuit, the frequency of the AC power source is the clock frequency.

With high-frequency AC power supplies, there is a lot of cross-stroke noise between circuits, so there is a limit to high-speed operation. In the circuit shown in FIG. 7, a switching circuit driven by a DC power supply is based on the principle of switching superconducting switching circuits according to the present invention connected in parallel to transition the Josephson element 900 from a voltage state to a superconducting state. It is.

The operation of the circuit shown in FIG. 7 will be explained below. When Josephson element 900 is in a superconducting state, low current source 92
All zero current flows into Josephson element 900. In this state, a current is applied to the input line 901 of the Josephson element 900, causing the Josephson element to transition to a voltage state. If the voltage at the input terminal 911 of the superconducting switching device 910 according to the present invention is increased while the Josephson device is in a voltage state, current flows into the superconducting switching device 910, the current flowing through the Josephson device 900 decreases, and the Josephson device The Son element 900 transitions to a superconducting state.

The circuit shown in FIG. 7 is driven by a DC power supply and does not use an AC power supply, which was a problem with the conventional Josephson technology, so it is possible to operate the system at high speed. From the example shown in FIG. 7, it is clear that the superconducting device according to the present invention and the Josephson element can be combined to form a circuit, and that the performance of the Josephson element can be fully brought out.

〔Effect of the invention〕

As explained above, the present invention provides a superconducting electrode on a semiconductor, and controls the flow of electron pairs injected from the superconducting electrode into the semiconductor by an electric signal applied to another electrode provided on the semiconductor. Accordingly, a switching device driven by a voltage with respect to an input signal can be realized. For this reason.

The present invention has made it possible to obtain a high-speed superconducting switching circuit with a large circuit gain. Furthermore, if the superconducting switching device of the present invention is used, superconducting wiring is also possible, so the resistance component of the wiring can be ignored, and high-speed digital circuits made with Josephson junction elements can be mixed on the same chip. I can do it. Therefore, it is also possible to configure an ultra-high speed computer system using the present superconducting switching device. Thus, the reduction of the present invention is significant.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention, and FIG. 2 is a diagram showing a first embodiment of the present invention.
FIG. 3 is a diagram showing the second embodiment of the present invention, FIG. 4 is an explanatory diagram of the operation of the second embodiment, and FIGS. 5 and 6 are diagrams showing the second embodiment. FIG. 7 is a diagram showing the energy band structure of the example device, and is a circuit diagram showing an example in which a superconducting switching element and a Josephson element according to the present invention are used in combination. 100... Semiconductor substrate 101... Channel layer 10
2.103,220...Superconducting electrode 104...Buried electrode 120, 130.221...Schottky barrier 11
0...PN junction 111...Depletion layer 180.200
・L-Pa pair 202.2o3 River electrode 211... Insulating film 212, 213... Contact layer 900... Josephson device 910... Superconducting switching device 920...
Low current source representative patent attorney Junnosuke Nakamura 2 Fig. t3 Fig. Y4 Fig. A2 U.5 Fig. A -------, 6j O Fig. 6 Off view

Claims (5)

[Claims] (1) Superconducting switching characterized in that a superconducting electrode is provided on a semiconductor, and the flow of electron pairs injected from the superconducting electrode into the semiconductor is controlled by an electric signal applied to a control electrode provided on the semiconductor. device. (2) The superconducting switching device according to claim 1, wherein the superconducting electrode and the control electrode are separated. (3) The control electrode and the semiconductor channel layer are PN.
2. The superconducting switching device according to claim 1, wherein the superconducting switching device is in contact via a junction. (4) The superconducting switching device according to claim 1, wherein the control electrode is buried under the channel layer of the semiconductor. (5) The semiconductor is provided with the control electrode and a channel layer, and the superconducting electrode and an electrode different from the control electrode and the superconducting electrode are provided on the surface of the channel layer with an insulating layer interposed therebetween. A superconducting switching device according to claim 1, characterized in that: