JPS60220867A - Voltage setting circuit - Google Patents

Voltage setting circuit

Info

Publication number
JPS60220867A
JPS60220867A JP59076860A JP7686084A JPS60220867A JP S60220867 A JPS60220867 A JP S60220867A JP 59076860 A JP59076860 A JP 59076860A JP 7686084 A JP7686084 A JP 7686084A JP S60220867 A JPS60220867 A JP S60220867A
Authority
JP
Japan
Prior art keywords
voltage
output
attenuator
reference voltage
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59076860A
Other languages
Japanese (ja)
Other versions
JPH0623798B2 (en
Inventor
Shuichi Inoue
修一 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59076860A priority Critical patent/JPH0623798B2/en
Publication of JPS60220867A publication Critical patent/JPS60220867A/en
Publication of JPH0623798B2 publication Critical patent/JPH0623798B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Tests Of Electronic Circuits (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To supply a high-precision testing voltage by attenuating a control input to a value equivalent to the voltage variation, and synthesizing the result with an output reference voltage and outputting the synthesized voltage. CONSTITUTION:A control input code from a microcomputer, etc., is supplied to a D/A converter 1, whose conversion output is compressed by a resistance attenuator 2 and supplied to the minus terminal of an operational amplifier 3, which is synthesized with the output reference voltage supplied to its plus terminal and outputs the synthesized voltage. An attenuator 2 compresses the output full- scale voltage of the converter 1 to the value corresponding to voltage variation required for final output. Consequently, the center value of the output reference voltage of the amplifier 3 is set with high precision.

Description

【発明の詳細な説明】 +al 発明の技術分野 本発明は、自動試験器等における電源電圧および試験用
電圧の設定回路に関する。
DETAILED DESCRIPTION OF THE INVENTION +al Technical Field of the Invention The present invention relates to a circuit for setting a power supply voltage and a test voltage in an automatic tester or the like.

(b) 技術の背景 電子部品の出荷および評価のための試験に使用する試験
器は、ディジタル回路用については自動化が進んでいる
が、これに比ベアナログ回路用については、自動化が遅
れている。例えば、リニアIC用の自動試験器の開発は
、ディジタルIC用に比べて遅れており、手動で行って
いる場合が多いのが現状である。そのひとつの原因は、
自動試験のために必要な電源電圧及び入力信号電圧を、
高精度に設定して供給する回路を、比較的低いコストで
得ることが困難であったからである。
(b) Background of the Technology Testing equipment used for testing for shipping and evaluation of electronic components has been automated for digital circuits, but automation for analog circuits has lagged behind. For example, the development of automatic testers for linear ICs has lagged behind that for digital ICs, and is currently often performed manually. One of the reasons is
The power supply voltage and input signal voltage required for automatic testing are
This is because it has been difficult to obtain a circuit that can be set and supplied with high precision at a relatively low cost.

(0) 従来技術と問題点 リニアIC等を自動試験するために、電源電圧及び入力
信号電圧を高精度に設定し、供給するための方法として
、従来は、ディジタル/アナログ変換器(以下DACと
略称す)によって負荷の電源を直接制御する方法をとっ
ていた。
(0) Prior art and problems Conventionally, a digital/analog converter (hereinafter referred to as DAC) has been used as a method for setting and supplying power supply voltage and input signal voltage with high precision in order to automatically test linear ICs, etc. The method used was to directly control the power supply of the load using

この従来の方法によっては、DACの精度が、直ちに供
給する電圧の設定精度になるため、極めて精度の高いD
ACが必要であった。例えば、必要とする試験用の電圧
設定値の変動ステップとして5mV の精度が必要であ
り、DACのフルスケール電圧がIOVであるとすると
、 10V15+sV = ’l” であるから、11ビツトという高精度のDACが必要と
なり、′非常に高価なものとなる。
With this conventional method, the accuracy of the DAC immediately becomes the setting accuracy of the voltage to be supplied, so an extremely accurate DAC can be used.
AC was required. For example, if an accuracy of 5 mV is required for the fluctuation step of the voltage setting value for the required test, and the full-scale voltage of the DAC is IOV, then 10V15+sV = 'l', so a high precision of 11 bits is required. A DAC is required and is very expensive.

(d) 発明の目的 本発明は、従来技術の問題点を除去し、高精度に試験用
の電圧を供給する電源電圧設定回路を得ることを目的と
している。
(d) Purpose of the Invention The object of the present invention is to eliminate the problems of the prior art and provide a power supply voltage setting circuit that supplies a test voltage with high accuracy.

(al 発明の構成 ・ 上記目的は、ディジタル/アナログ変換器の出力フルス
ケール電圧を、最終出力において必要とする電圧変動分
に相当する値まで減衰させ、出方基準電圧と合成して出
力するよう構成した本発明によって達成される。
(al Structure of the invention) The above object is to attenuate the output full-scale voltage of the digital/analog converter to a value corresponding to the voltage fluctuation required in the final output, and to combine it with the output reference voltage and output it. This is achieved by the configured present invention.

即ち、DACの出力フルスケール電圧を、最終出力にお
いて必要とする電圧変動分に相当するよう減衰すること
によって、必要とする電圧変動範囲を満足しながら、電
圧変動のステップ幅を圧縮して小さくし、高い精度を得
ると共に、出力基準電圧と合成することによって、必要
な基準電圧中心値を与えるものである。
In other words, by attenuating the output full-scale voltage of the DAC to correspond to the voltage fluctuation required in the final output, the step width of the voltage fluctuation can be compressed and made smaller while satisfying the required voltage fluctuation range. In addition to obtaining high accuracy, the necessary reference voltage center value is provided by combining with the output reference voltage.

(f) 発明の実施例 以下本発明の一実施例について説明する。第1図は本発
明による電圧設定回路の構成ブロック図を示す。1は0
^C,2は抵抗減衰器、3は演算増幅器を示し、RA、
RB、R1は抵抗器、Vinは口ACの入力コード信号
、VDはDACの出力電圧、Vrefは出力基準電圧、
Vou tは最終出力電圧を示す。
(f) Example of the Invention An example of the present invention will be described below. FIG. 1 shows a block diagram of a voltage setting circuit according to the present invention. 1 is 0
^C, 2 is a resistive attenuator, 3 is an operational amplifier, RA,
RB and R1 are resistors, Vin is the AC input code signal, VD is the DAC output voltage, Vref is the output reference voltage,
Vout indicates the final output voltage.

自動試験器において必要な電源電圧及び入力信号電圧を
、自動的に高精度に設定するため、マイクロコンピュー
タなどから、制御入力コードVinがDAC1に加えら
れる。DAC1の出力アナログ電圧VDは、抵抗減衰器
2に加えられて減衰(圧縮)され、その出力は演算増幅
器3の一端子に加えられる。演算増幅器3の子端子には
出力基準電圧が加えられ、演算増幅器3の出力電圧Vo
u tが目的とする最終出力電圧となる。
In order to automatically and accurately set the power supply voltage and input signal voltage required in the automatic tester, a control input code Vin is applied to the DAC 1 from a microcomputer or the like. The output analog voltage VD of the DAC 1 is applied to a resistive attenuator 2 to be attenuated (compressed), and its output is applied to one terminal of an operational amplifier 3. An output reference voltage is applied to the child terminal of the operational amplifier 3, and the output voltage Vo of the operational amplifier 3 is
ut becomes the desired final output voltage.

第2図は、第1図に示した抵抗減衰器2の等価回路を示
す。図において2は抵抗減衰器、2゛は抵抗減衰器2の
等価回路を示す。等価回路2における抵抗Rおよび電圧
VD’は次の式で表すことができる。
FIG. 2 shows an equivalent circuit of the resistive attenuator 2 shown in FIG. In the figure, 2 shows a resistance attenuator, and 2' shows an equivalent circuit of the resistance attenuator 2. The resistance R and voltage VD' in the equivalent circuit 2 can be expressed by the following equation.

R=RA−RB/ (RA + RB ) ・・−・・
−・−−一−−−・−・−・−(1)VD’ = (R
B/ (RA + RB ) ) VD =−−−−−
−−(21Rは演算増幅器側からみた抵抗減衰器のイン
ビダンスを示し、vOo はDACの出力電圧VDの減
衰器によって減衰された値を示す。
R=RA-RB/ (RA + RB) ・・・・
−・−−1−−−・−・−・−(1) VD' = (R
B/ (RA + RB) ) VD =------
--(21R indicates the impedance of the resistive attenuator seen from the operational amplifier side, and vOo indicates the value attenuated by the attenuator of the DAC output voltage VD.

再び第1図に戻り、(11,(21式の結果を導入して
、演算増幅器3の入力と出力の関係をめると次のように
なる。
Returning to FIG. 1 again, by introducing the results of equations (11 and (21) and finding the relationship between the input and output of the operational amplifier 3, we get the following.

Vout= (1+R1/R) Vref −(R1/
R) VD’−一−−−−−・・・−・・−−−−−・
・(3)(3)式の右辺の第1項は、出力電圧Vou 
tの基準となる電圧値を示し、第2項は電圧の変動分を
示すものである。第1項の(1+R1/R)は演算増幅
器の電圧利得であって、これをkとすると、第1項はに
・Vref と表すことができ、Vref !!して印
加する電圧およびKによって決定する。第2項の電圧変
動分は、0^Cの出力電圧VOおよび抵抗減衰器の抵抗
RA、RBによって決定する。
Vout= (1+R1/R) Vref −(R1/
R) VD'-1---------------------
・(3) The first term on the right side of equation (3) is the output voltage Vou
It shows the voltage value that is the reference for t, and the second term shows the variation in voltage. The first term (1+R1/R) is the voltage gain of the operational amplifier, and if this is k, the first term can be expressed as Vref ! ! It is determined by the voltage and K applied. The voltage variation in the second term is determined by the output voltage VO of 0^C and the resistances RA and RB of the resistance attenuator.

第3図は本発明に関わる電圧設定回路の出力電圧Vou
 tと、基準電圧および電圧変動範囲の関係を示す図で
ある。必要とする基準電圧および電圧変動範囲を満足す
るよう、 Vrefを印加し、減衰器の減衰比を調整す
る。これによってDACの入力Vinは、出力電圧 V
ou tの変動分ΔVou t のみを制御することに
なり、入力nビットのDACを使用した場合の変動ステ
ップ幅は、ΔVout/ 2”となり、高精度の制御が
可能である。例えば、ΔVout= 1.OV + n
 = 8ビツトとすると、Vou tの絶対値とは関係
なく、変動ステップ幅は、 1、OV / 2”= 4mV という高精度の値となる。
Figure 3 shows the output voltage Vou of the voltage setting circuit related to the present invention.
FIG. 3 is a diagram showing the relationship between t, a reference voltage, and a voltage fluctuation range. Apply Vref and adjust the attenuation ratio of the attenuator to satisfy the required reference voltage and voltage variation range. As a result, the input Vin of the DAC becomes the output voltage V
Only the variation ΔVout of out is controlled, and the variation step width when using a DAC with n input bits is ΔVout/2", allowing highly accurate control. For example, ΔVout=1 .OV+n
= 8 bits, the variation step width becomes a highly accurate value of 1.OV/2''=4 mV, regardless of the absolute value of Vout.

(gl 発明の詳細 な説明したように、本発明による電圧設定回路において
は、DACは出力電圧の変動分のみを制御するものであ
るから、比較的精度の低いDACを使用して極めて高精
度の電圧設定が可能であり、従って比較的低いコストで
、リニアIC等の自動試験器を実現させるのに大いに効
果がある。
(gl As described in detail about the invention, in the voltage setting circuit according to the present invention, the DAC controls only the variation of the output voltage, so a relatively low precision DAC is used to achieve extremely high precision. The voltage can be set, and therefore it is very effective in realizing an automatic tester for linear ICs and the like at a relatively low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による電圧設定回路の構成ブロック図、
第2図は抵抗減衰器の等価回路図、第3図は電圧設定回
路の出力電圧Vou tと、基準電圧および電圧変動範
囲の関係を示す図である。 図面において、1はD−^変換器、2は抵抗減衰器、2
′は抵抗減衰器の等価回路、3は演算増幅器をそれぞれ
示す。 ¥1 因 事2画 帖3闘 7
FIG. 1 is a block diagram of a voltage setting circuit according to the present invention;
FIG. 2 is an equivalent circuit diagram of the resistance attenuator, and FIG. 3 is a diagram showing the relationship between the output voltage Vout of the voltage setting circuit, the reference voltage, and the voltage fluctuation range. In the drawing, 1 is a D-^ converter, 2 is a resistance attenuator, 2
' is an equivalent circuit of a resistive attenuator, and 3 is an operational amplifier. ¥1 Incident 2 Gacho 3 Battle 7

Claims (1)

【特許請求の範囲】[Claims] ディジタル/アナログ変換器の出力フルスケール電圧を
、最終出力において必要とする電圧変動分に相当する値
まで減衰させ、出力基準電圧と合成して出力するよう構
成したことを特徴とする電圧設定回路。
A voltage setting circuit characterized in that the output full-scale voltage of a digital/analog converter is configured to attenuate the output full-scale voltage to a value corresponding to the voltage fluctuation required in the final output, synthesize it with an output reference voltage, and output the combined result.
JP59076860A 1984-04-17 1984-04-17 Voltage setting circuit Expired - Lifetime JPH0623798B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59076860A JPH0623798B2 (en) 1984-04-17 1984-04-17 Voltage setting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59076860A JPH0623798B2 (en) 1984-04-17 1984-04-17 Voltage setting circuit

Publications (2)

Publication Number Publication Date
JPS60220867A true JPS60220867A (en) 1985-11-05
JPH0623798B2 JPH0623798B2 (en) 1994-03-30

Family

ID=13617401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59076860A Expired - Lifetime JPH0623798B2 (en) 1984-04-17 1984-04-17 Voltage setting circuit

Country Status (1)

Country Link
JP (1) JPH0623798B2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5583335A (en) * 1978-12-20 1980-06-23 Hitachi Ltd Digital-to-analog converter
JPS5725721A (en) * 1980-07-21 1982-02-10 Mitsubishi Electric Corp Digital-to-analog converter
JPS58152355A (en) * 1982-03-05 1983-09-09 Jeol Ltd Lens current setting circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5583335A (en) * 1978-12-20 1980-06-23 Hitachi Ltd Digital-to-analog converter
JPS5725721A (en) * 1980-07-21 1982-02-10 Mitsubishi Electric Corp Digital-to-analog converter
JPS58152355A (en) * 1982-03-05 1983-09-09 Jeol Ltd Lens current setting circuit

Also Published As

Publication number Publication date
JPH0623798B2 (en) 1994-03-30

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