JPS60220442A - Memory access system - Google Patents

Abstract

PURPOSE:To expand easily an access enable address space by using an effective address added with an address outputted from an address deciding device to access an optional address on another memory. CONSTITUTION:An access is fed to the contents of an address X-1 of a memory M0, and a map switch instruction is read out. Then the map number 1 contained in the contents of the address X-1 is held by a map switch device A. An access is supplied to the contents of an address X of the memory M0, and an access instruction is read out. Then an address contained in the access instruction is supplied to an address deciding device B. As a result, an effective address Y is obtained by adding (OR conditions) the map number 0 and an address Z. Thus an access is fed to the address Z of a memory M1 of the map number 1 i.e., the contents of the address Y. Then an access is supplied to the contents of an address (X+1) to read out a map preset instruction. The device B is reset according to the map preset instruction.

Description

[Detailed description of the invention] The present invention relates to a memory access method.

In a computer with an 8-bit word length, the address space that can be accessed in the normal system is from address 0 to address 65535 (64 bytes). However, if the address space is limited to this amount, the functionality of the computer is limited, and in order to further enhance the functionality, it is necessary to make a wider address space accessible.

Therefore, it is an object of the present invention to provide a memory access method that can easily expand the accessible address space with a simple configuration.

An embodiment of the present invention will be described based on FIGS. 1 and 2. As shown in Figure 1, this memory access method uses multiple memories (
For example, 64 bytes) Mo.

Ml... have different map numbers 0, 1, . . . . and stores the map number, for example, 1, of one of the other memories Ml, . death,
Memory M1 to access address X of memory MO with map number Q. ... is stored, and an instruction to reset the map number is stored at address X+1 of the memory MO.

Then, as shown in FIG. 2, address X- of the memory MO
1 and reads the map switching command, causes the map switching device A to hold the map number 1 included in this map switching command, and then reads the map switching device A from the address X of the memory MO.
The address determining device B reads out the access command by accessing the contents of
give to As a result, an effective address Y is obtained by combining the map number O output from the map switching device A and the address Z output from the address determining device B (OR condition), and the address Z of the memory M1 of map number 1 is obtained. That is, the contents of the effective address Y are accessed. Next, the contents of the address X+1 of the memory MQ are accessed to read out the manpreset command, and the map switching device B is reset based on this manpreset command. That is, the map number is returned to the original 0.

Note that the address X-1,X of the memory MO with map number 0
, X+1 must be executed with interrupts disabled.

As a result of this configuration, it is possible to easily realize a system that requires more than 64 bytes of memory, unless the software structure requires frequent map switching.
The ability of 8-bit CPUs will be further improved and the fields of application will be expanded.

As described above, in the memory access method of the present invention, different map numbers are set for each of a plurality of memories that are accessed at the same address, and a map number of another memory to be accessed is stored at a predetermined address of one memory. an access command containing the address of the memory to be accessed is stored in the address next to the predetermined address of the certain memory; The number is held in the map switching device, and then the address next to the predetermined address in the certain memory is accessed and the address in the access command is given to the address determining device, and the map number output from the map switching device and the address determining device are stored. The feature is that any address in the memory of the above system can be accessed by the effective address combined with the address output from the device, so the accessible address space can be easily expanded and the functions of the computer can be expanded. can do.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a memory according to the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention. M O, M1...Memory, map switching device for A,
B...Address determination device Fig. 1 Fig. 2

Claims (1)

[Claims] Different map numbers are set for each of a plurality of memories that are accessed at the same address, a map switching instruction containing the map number of another memory to be accessed is stored in a predetermined address of a certain memory, and Store an access command containing the address of the memory to be accessed at the next address, access a predetermined address of the certain memory, cause the map switching device to hold the map number in the map switching command, and then The address next to the predetermined address is accessed, the address in the access command is given to the address determining device, and the effective address is the sum of the map number output from the map switching device and the address output from the address determining device. A memory access method characterized by accessing arbitrary addresses in other memories.