JPS60216784A - Parallel operating device for motor - Google Patents

Abstract

PURPOSE:To accurately synchronously operate in parallel a synchronous motor and a DC motor by detecting the variation in the frequency of a power source, and correcting a reference signal of a phase synchronizing loop of the DC motor on the basis of the detection. CONSTITUTION:When an actual power source frequency varies, the rotating speed of a synchronous motor 1 varies in response to the variation. On the other hand, a DC motor 3 is controlled by a phase synchronizing loop 5 on the basis of a reference signal S'0, and rotated. This signal S'0 is compared with a reference frequency fac at every one period when the actual power source frequency varies, and corrected in response to the difference. Accordingly, when the power source frequency varies, the rotating speed of the motor 3 varies in response to the variation. Thus, even if the power source frequency varies, the motors 1, 3 are operated accurately synchronously in parallel.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a motor parallel operation device for synchronously operating a DC motor and a synchronous motor in parallel, which are controlled by a phase synchronized loop.

[Technical background of the invention]

For example, in a copying machine, the optical system and drum must be driven at exactly one-to-one speed in order to improve image quality. For this reason, conventionally, both the optical system and the drum were driven synchronously by a single motor via a mechanical interlocking mechanism consisting of a chain gear, etc. However, in recent years, in order to reduce the size of the entire copying machine, it has been considered to eliminate the mechanical interlocking mechanism by, for example, driving the drum with a synchronous motor and the optical system with a DC motor.

By the way, in general, a synchronous motor rotates at a speed synchronized with the power supply frequency, but a DC motor's rotation speed changes depending on the load torque. Therefore, in the case of the above-described configuration, in order to drive the optical system and the drum in accurate synchronization even if the load on the DC motor varies, it is necessary to provide constant speed to the DC motor. Therefore, it is generally considered to have a configuration in which the DC motor is controlled and operated by a phase synchronization loop that controls the rotation of the rotor by comparing a reference signal with a rotor rotation signal.

[Problems with background technology]

However, even with the above configuration, the frequency of the power supply fluctuates, especially in areas where the power supply situation is poor, so even if the DC motor rotates at a constant speed with high precision, the rotational speed of the synchronous motor may change. Therefore, the DC motor and the synchronous motor are not accurately synchronized, which causes the speed ratio between the optical system and the drum to fluctuate, resulting in deterioration of image quality.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a motor parallel operation device that can accurately and synchronously operate a DC motor and a synchronous motor even if the power supply frequency fluctuates.

[Summary of the invention]

The present invention has a structure in which a frequency difference detection circuit detects frequency fluctuations in the power supply of a synchronous motor, and based on this, corrects a reference signal for a phase synchronization loop of a DC motor, thereby detecting fluctuations in the frequency of the power supply. is characterized in that the rotational speed of the DC motor is changed accordingly.

[Embodiment of the Invention] An embodiment in which the present invention is applied to a copying machine will be described below with reference to the drawings. Reference numeral 1 denotes a synchronous motor for driving the drum of the copying machine, which rotates at a synchronous speed synchronized with the frequency of a power source 2. On the other hand, numeral 3 is a brushless DC motor for driving the optical system of the copying machine. The DC motor 3 includes a frequency generator 4 and a phase synchronization loop 5 for detecting the rotational speed and rotational phase of the rotor. The configuration of the phase synchronization loop 5 is as follows. That is, first, a corrected reference signal (voltage) So', which will be described later, is sent to the voltage controlled oscillator 6.
This is converted into a frequency signal according to the voltage, and this and the rotor rotation signal $1 from the frequency generator 4 are compared by the speed comparison circuit 7 and the phase comparison circuit 8. And D
The /A converter 9.degree. 10 converts the digital outputs of the comparison circuits 7 and 8 into analog values, amplifies and synthesizes the analog values at a predetermined gain, and inputs them to the motor drive circuit 11. With this, the DC motor 3 receives the corrected reference signal S. It is driven at a constant rotation speed according to '.

Now, 12 is a transformer connected to the electric current m2 of the synchronous motor 1, 13 is a full-wave rectifier circuit, and 14 is a waveform shaping circuit.
An energized rectangular wave power supply frequency signal S2 is output. 1
Reference numeral 5 designates a frequency difference detection circuit, the specific configuration of which is shown in FIG.

In FIG. 2, 16 is a data set circuit, 17 is a programmable counter, and 18 is an oscillator.The programmable counter 17 receives the power supply frequency signal S2 and loads the data value Di from the data set circuit 16 every cycle. This is counted down by the clock signal S3 from the oscillator 18. A latch 19 stores the output of the programmable counter 17 until a new data value Di is loaded by the power supply frequency signal S2.

20 is mono multi and this is programmable counter 17
Data latching is ensured by giving an appropriate delay time between data loading and data latching immediately before loading. The frequency fosc of the RF signal @S3 is the reference frequency (the exact frequency 9 at which the synchronous motor 1 should be operated, for example 5
When 0 HZ or 601-I Z) is [aO,
It is determined that the relationship fosc-[li.fac is established between the data value Di and the data value Di.

Therefore, when the actual power supply frequency f'aC of the power supply 2 changes, for example, in an increasing direction and the period of the power supply frequency signal S3 becomes shorter, a new data load is started before the output of the programmable counter 17 becomes O. Therefore, the output Qi of the latch 19 becomes a value corresponding to the difference between the reference frequency faC and the actual power frequency f'ac for each cycle of the power frequency signal S3. In addition, the actual power supply frequency f'ac
When the period of the power supply frequency signal S3 becomes longer due to a decrease in the period of the power supply frequency signal S3, the output of the programmable counter 17 becomes a complement output. Now, like this, the actual power supply frequency f'
Latch 1 obtained based on the difference between ac and reference frequency fac
The output Qi of 9 is converted into an analog value by the D/A converter 21 shown in FIG.
The correction signal S4 is amplified by a predetermined gain. 23 is a reference voltage generation circuit for the phase synchronization loop 5;

This is a constant voltage reference signal S. Output. Note that the gain of the voltage control gain up 22 is based on the actual power supply frequency f'
Let Δfac be the difference between ac and the reference frequency faa, and the reference signal S. The voltage value of the correction signal S4 is set to ■, and the voltage value of the correction signal S4 is set to ΔV, so that the relationship ΔV=V/(fac·Δfac) is established.

24 is an adder circuit to which a reference signal S is applied. and correction signal S4 are input, and a corrected reference signal So of V+△V is obtained.
' is output to the voltage controlled oscillator 6 of the phase synchronized loop 5.

According to the above configuration, the synchronous motor 1 that drives the drum
is rotated in synchronization with the power frequency f'ac of the power source 2.

Therefore, when the actual power supply frequency f'ac changes, the rotation speed of the synchronous motor 1 also changes accordingly. On the other hand, the DC motor 3 that drives the optical system is controlled and rotated by a phase synchronization loop 5 based on the reference signal So'. This reference signal So' is compared with the reference frequency fac every cycle when the actual power supply frequency f'aa changes, and is corrected according to the difference. Therefore, when the power supply frequency f'ac changes, the rotation speed of the DC motor 3 also changes accordingly. As a result, even if there are fluctuations in the power supply frequency, the synchronous motor 1 and the DC motor 3 are operated in parallel in precise synchronization, so the drum and optical system are driven in precise synchronization, resulting in improved copy image quality. You can improve your performance.

In the above embodiment, a case is shown in which the drum and optical system of a copying machine are driven synchronously, but the present invention is not limited to this, and a DC motor and a synchronous motor controlled by a phase synchronization loop can be operated in parallel. Of course, it can be widely applied in cases where

〔Effect of the invention〕

As described above, the present invention detects the difference between the power supply frequency of the DC motor and the reference frequency using the frequency difference detection circuit, and corrects the reference signal of the phase synchronization loop of the DC motor based on the difference. If there is a frequency fluctuation in the power supply, the rotation speed of the DC motor will change accordingly, so the synchronous motor and DC motor can be accurately synchronized despite frequency fluctuations. This provides an excellent effect of being able to operate in parallel.

[Brief explanation of drawings]

The drawings show one embodiment of the present invention, with FIG. 1 being an overall block diagram and FIG. 2 being a block diagram of a frequency difference detection circuit. In the drawing, 1 is a synchronous motor, 2 is a power supply, 3 is a DC motor,
5 is a phase synchronization loop, 15 is a frequency difference detection circuit, 23
24 is a reference voltage generation circuit, 24 is an adder circuit, So is a reference signal, SO2 is a corrected reference signal, and SX is a rotor rotation signal. Applicant: Toshiba Corporation

Claims (1)

[Claims] 1. A frequency difference detection circuit for operating a synchronous motor in parallel with a DC motor controlled by a phase synchronization loop that controls rotor rotation by comparing a reference signal with a rotor rotation signal. J: A parallel operation device for motors, characterized in that a difference between a power supply frequency of a synchronous motor and a reference frequency is detected, and a reference signal of the phase synchronization loop is corrected based on the difference.