JPS5812836B2 - Dendo Kinosokudo Seigiyo Cairo - Google Patents

Description

[Detailed Description of the Invention] The present invention provides a speed control circuit for an AC motor using a thyristor,
In particular, the present invention relates to improvements to prevent current concentration on specific thyristors.

When controlling the speed of an AC motor using an AC power supply using a conventional cycloconverter, the current concentrates on a specific cycloconverter due to the relationship between the motor frequency and the power supply frequency.
The current carrying capacity of the device may be reduced.

For example, in a super-synchronous Servius device consisting of a three-phase induction motor IM and a thyristor RUN-TWP as shown in Fig. 1, when the motor speed is synchronous, the motor side becomes a direct current, and current flows between the U phase and the ■ phase. Then, the thyristors RUP, SUP, TUP, RVN, S shown in FIG.
Current flows concentrated only to VN and TVN.

In addition, when controlling the speed of an AC motor by controlling the primary frequency of the AC motor using a cycloconverter, even when the motor speed is zero (for example, when torque is being generated and the rotor is stopped), In the same way, the current flows in a concentrated manner only in a specific cyrisk.

The present invention employs a PLL (Phase Locked Loop) circuit system in order to prevent current concentration to such a specific risk.

That is, in order to change the timing of energization without changing the speed of the motor, it is sufficient to shift the rotational phase of the motor.

The reason for this will be explained with reference to FIGS. 1 and 2.

Figure 3 1 and 2 are diagrams showing the vector relationships of the three-phase induction motor IM, in which 1 is the stator, 2 is the rotor, 3U, 3V
, 3W is the rotor winding.

In the supersynchronous Servian device, when the three-phase induction motor IM is rotating at a synchronous speed, the rotating magnetic field φ generated in the stator winding and the rotor 2 are rotating at the power supply voltage angular velocity ωe, and the rotor winding The secondary current I2 in the lines 3U, 3V, and 3W becomes direct current as described above.

These vector relationships are shown in FIG.

As mentioned above, when the motor speed is synchronous speed, the thyristors RUP, SUP, TUP, RVN shown in FIG.
, SVN, and TVN.

Therefore, as shown in Figure 3.2. By temporarily slowing down or advancing the rotational speed of rotor 2, the rotating magnetic field φ
By shifting the mechanical position of the rotor 2 (that is, the rotational phase of the motor) with respect to the cyrisk element RWP, shown in FIG.
SWP, TWP, RUN, SUN, and TUN are energized, and the thyristor elements are alternated.

In addition, when controlling the speed of an AC motor by performing primary frequency control, there is current concentration when the rotor stops, but in such a case, the rotating magnetic field φ and the rotor 2 If the rotation phase is shifted assuming that the thyristor element is stationary without rotating, the thyristor elements are alternated in the same way as described above.

Therefore, the present invention uses a PLL as a means for shifting this phase.
Using a circuit system, it detects that the same thyristor is energized for a certain period of time shorter than the thermal time constant of the thyristor, and then shifts the phase appropriately to replace the corresponding thyristor.

Hereinafter, the basic structure of the PLL circuit system will be explained first.

In FIG. 4, the phase difference detection circuit FD has a reference frequency fi
When the phase of the feedback frequency ff is delayed, a positive pulse P+ having a delayed phase width is output as shown in FIG. 5C, and conversely, when the phase of ff is ahead of fi, as shown in FIG. 6C. A negative pulse P- having a leading phase width as shown in FIG.

In addition, FIG. 5A and FIG. 6A show the pulse fi, and FIG. 5B shows the pulse fi.
and FIG. 6B show the pulses fi, respectively.

The positive or negative pulse is converted into a DC voltage proportional to the phase difference between fi and ff by the low-pass filter LPF, and is applied to the variable frequency oscillator VFO via the amplifier AMP.

This oscillator VFO has a frequency f proportional to the DC voltage.

It generates pulses, but it is adjusted so that it oscillates a certain frequency signal when this DC voltage is zero.

Furthermore, the output frequency f of the oscillator VFO is adjusted by the frequency adjustment circuit FA.

is matched to the level of the input frequency fi.

According to the PLL circuit, the phase of the output pulse is locked to the phase of the input pulse by the ratio (eg, frequency division ratio) of the frequency adjustment circuit FA, and the frequency becomes completely the ratio of the circuit FA.

FIG. 7 shows an embodiment of a device for controlling the rotational speed of a motor M connected to a pulse generator PG so that it corresponds to a reference frequency, and the rotational phase of the motor M is locked by the above-mentioned PLL circuit. By controlling the rotational phase and changing the bias of the rotational phase as necessary,
Only the rotation phase can be changed without changing the rotation speed.

In the figure, the same reference numerals as in FIG. 4 indicate the same devices, and an analog-to-frequency converter AF converts the reference speed voltage i into a reference frequency pulse fi.

Further, the variable frequency oscillator VFO together with the thyristor speed control device of the electric motor M constitutes a device VCU.

Furthermore, in order to detect that current is concentrated in a particular thyristor of the device VCU for a certain period of time, a synchronization detection circuit SD is used, for example, in the case of a supersynchronous Servius device.

In addition to the output voltage Vf of the amplifier AMP, a reference speed voltage Vi and a predetermined phase shift voltage Vs from the detection circuit SD are applied to the input of the device VCU.

Here, the output voltage vf of the amplifier AMP is a rotational phase control signal for correcting an error in the rotational phase.

Further, the reference speed voltage Vi is applied as a reference for speed control, and is a bias that causes the rotation speed of the electric motor M to become the target rotation speed when the output voltage Vf is zero.

Furthermore, the predetermined position shifting voltage 8 is a signal for shifting the rotational position of the electric motor M.

Note that the frequency adjustment circuit FA is used to match the frequency of the output pulse of the pulse generator to the level of the reference frequency fi, and is unnecessary in the case of 1:1.

Next, the operation of the apparatus shown in FIG. 7 will be explained.

In the circuit of FIG. 7, when the preset reference speed voltage Vi is input to the device VCU, a variable frequency oscillator VFO generates a pulse corresponding to the reference speed voltage Vi in the device VCU, and the A thyristor speed controller in the VCU rotates the motor M at the target speed.

Further, the reference speed voltage Vi is converted into a reference frequency pulse fi by an analog-frequency converter AF, and is input to the phase difference detection circuit FD together with the feedback pulse fi from the frequency adjustment circuit FA.

Then, the phase difference between the reference frequency pulse fi and the feedback pulse ff is detected by the phase difference detection circuit FD.

If an error occurs in the rotational phase of the electric motor M, and therefore, for example, the phase of the pulse ff lags behind the pulse fi (the fifth
(see figure), a positive pulse P+ is outputted from the phase difference detection circuit FD, and a DC voltage f proportional to the phase difference is outputted from the amplifier AMP via the low-pass filter LPF.

This DC voltage Vf is given to the device VCU, and the device VCU
The speed of the electric motor M is controlled so as to correct the rotational phase error.

Here, in the super-synchronous Servius device, when the motor speed is synchronous speed, current concentration occurs in a specific thyristor in the device VCU.

Then, this current concentration is detected by the synchronization detection circuit SD, and a predetermined phase-shifted voltage s is outputted from the synchronization detection circuit SD and applied to the device VCU.

The device VCU temporarily slightly changes the rotor speed of the electric motor M based on the input voltage Vs.

As a result, the rotational phase is shifted, and the above-described speed control and rotational phase control are continued while maintaining this shifted rotational phase.

When the rotational phase is shifted based on the predetermined phase shift voltage s in this way, the thyristor to be energized is alternated, and current concentration on a specific thyristor is prevented.

Note that when primary frequency control is performed to control the speed of the AC motor M, current concentration occurs in a specific thyristor when the rotor is stopped, but in this case, a current concentration detection circuit is provided as described above, By detecting current concentration in a specific thyristor using this detection circuit and applying a predetermined phase-shifted voltage to the device VCU in accordance with the detection signal, current concentration can be prevented in the same manner as in the super-synchronous Servius device.

As explained above, according to the present invention, when controlling an AC motor using a cycloconverter, for example, even if current concentrates on a specific thyristor depending on the rotation speed of the motor, the speed can be changed by shifting the phase. Concentrated current can be easily dispersed.

[Brief explanation of drawings]

Figure 1 is a wiring diagram of the main circuit of the supersynchronous Servius device, Figure 2 is a diagram showing the thyristor in which current flows during U-V phase excitation in the case of synchronous speed in Figure 1, and Figure 3 1 and 2 are diagrams of the motor. FIG. 4 is a block diagram showing the basic configuration of the PLL circuit, FIG. 5 and FIG. 6 are waveform diagrams for moderating PLL circuit operation, and FIG. 7 is a diagram showing an embodiment of the present invention. It is a block diagram. AF... Anaguchi frequency conversion circuit, FD...
...Phase difference detection circuit, SD...Synchronization detection circuit, VCU...Variable frequency oscillator thyristor speed control device, M...Motor, PG...・
Pulse generator, FA... Frequency adjustment circuit.

Claims (1)

[Claims] 1 means for detecting pulses with a frequency corresponding to the rotational speed of an AC motor whose speed is controlled by a plurality of cyrisks; a frequency adjustment circuit for adjusting the level of this detected frequency; A detection circuit that generates a voltage according to a predetermined shifted phase when current is concentrated, a circuit that converts a reference speed voltage into a reference frequency pulse, and a position between this reference frequency pulse and the detection pulse from the frequency adjustment circuit. A circuit that detects a phase difference and generates a voltage corresponding to this phase difference, and supplies a pulse with a frequency corresponding to the sum voltage of the voltage generated by the detection circuit, the reference speed voltage, and the phase difference voltage to the gate of each of the cyrisks. A speed control circuit for an electric motor, comprising a variable frequency oscillation circuit.