JPS60216609A - Muting circuit - Google Patents

Abstract

PURPOSE:To prevent generation of transient noises by starting and releasing the muting operation always at a zero cross point of a signal waveform to attain high-speed muting. CONSTITUTION:When a muting commanding/releasing switch 48 is close, the level of an input terminal of an AND circuit 46 goes to a high level by a voltage drop across a resistor 52 during the closed period. The zero cross point or the vicinity is detected from an output waveform of a buffer circuit 8 and a zero cross detecting circuit 18A produces as output. As a result, a high-level output is generated while a waiting the incoming of the zero cross point of the signal waveform when the switch 48 is closed and a muting switch 12 is opened.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a muting circuit that performs a muting operation by detecting zero-crossing points of a signal waveform.

Traditionally, signal muting involves installing a switch circuit in the signal system to cut off the signal, and opening and closing this switch circuit regardless of the peak value of the signal waveform. If the level is much higher or lower than the current level, there is a drawback that a transient stage (so-called pop sound) is generated due to potential fluctuations caused by opening and closing of the switch circuit.

Therefore, a method has been proposed in which the switching speed of the switch circuit is sufficiently slowed down to slow down the muting operation.
This method requires a time constant circuit for this purpose, which must be externally connected in semiconductor integration, and has drawbacks such as slow muting time.

An object of the present invention is to speed up the muting operation and to prevent the occurrence of a transient stage accompanying the muting operation.

That is, the present invention opens and closes the switch by detecting a zero-crossing point of a signal waveform on the input side or output side of the switch based on a muting switch inserted in a signal system and muting command/release command input. It consists of a switching control circuit, and the muting operation is always started and canceled at or near the zero-crossing point of the signal waveform.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.

FIG. 1 shows an embodiment of the muting circuit of the present invention.

In FIG. 1, a signal source 6 is connected to the input terminal 4 of the buffer circuit 2, and a muting switch 1 is connected to the signal system IO from the buffer circuit 2 to the next puff puffer circuit 8.
2 is inserted, and this switch 12 and buffer circuit 8
The signal output Vo that has passed through is taken out from the output terminal 14. The signal source 6 includes signal sources such as magnetic heads and microphones, as well as various signal processing systems installed upstream of the signal system 10.

The buffer circuit 2.8 is composed of a differential amplifier,
A signal is applied to the non-inverting input terminal (+) of the vine, and a predetermined voltage V is applied to the inverting input terminal (-) from the bias voltage source.
a has been added.

The muting switch 12 is constituted by a switching element such as a mechanical switch or a transistor, and its opening/closing control is executed by the switching control circuit 16 based on a muting command or a muting release command.

This switching control circuit 16 is provided with first and second zero-cross detection circuits 18A and 18B.

The first zero cross detection circuit 18A includes a comparator 20.22.
and a NOR circuit 24, which detects that the output side signal waveform of the buffer circuit 8 that has passed through the muting switch 12 has entered the zero-crossing point or its vicinity. That is, the comparators 20 and 22 constitute a window comparator, and the buffer circuit 8 is connected to the non-inverting input terminal (+) of the comparator 20 and the inverting input terminal (-) of the comparator 22.
The output side waveform of is added, and the voltage CC between the power supply voltage terminal 26 and the ground point is
2.34, and match the connection point of resistor 32.34 with the bias voltage VB to set the zero cross voltage range of the signal waveform to the upper limit reference voltage V.

and the lower limit reference voltage Vt, and the inverting input terminal (-) of the comparator 20 is connected to its upper limit reference voltage. A reference voltage vL is set.

Further, the second zero cross detection circuit 18B includes a comparator 36
．． 38 and an OR circuit 40, and detects when the signal waveform on the input side of the muting switch 12 enters a zero-crossing point or a range near the zero-crossing point. That is, comparators 36 and 38 also constitute window comparators, and comparator 3
The output side waveform of the buffer circuit 2 is applied to the non-inverting input terminal (+) of the comparator 6 and the inverting input terminal (-) of the comparator 38.
), the lower limit reference voltage Vt is set to the non-inverting input terminal (+) of the upper limit reference voltage vH1 comparator 38.

The outputs of the NOR circuit 24 and the OR circuit 40 are
The output of the AND circuit 42 is applied to an AND circuit 46 via a diode 44, and is logically multiplied with the output of the NOR circuit 24, and the output is input to the muting switch 12 for switching control. It has been added as. When the output of the AND circuit 46 is at a low (L) level, the switch 12 is closed, and the AND circuit 4
When the output of the switch 6 is at a high (H) level, the switch 12 is opened and a muting operation is performed.

Further, when the muting command/cancellation switch 48 is closed, the power supply voltage VCC is applied to the resistor 52 via the diode 50, and the voltage generated at the resistor 52 is applied to the AND circuit 42 according to the opening/closing of the switch 48. It can be added selectively to the output.

Based on the above configuration, its operation will be explained with reference to the operation waveforms shown in FIG.

In FIG. 2, A is the AC signal waveform of the signal system 10, in A, 0 indicates its zero cross potential, V indicates the upper limit reference voltage, and Vt indicates the lower limit reference voltage.

When the minting command/cancellation switch 48 is closed, during the closed period, one input terminal of the AND circuit 46 becomes the voltage of FIG.
As shown in , it becomes a high (H) level.

At this time, the output waveform of the buffer circuit 8 is applied to the zero-crossing detection circuit 18A, and the zero-crossing point or its vicinity range is detected, and the zero-crossing detection circuit 18A
It generates the output shown in the figure.

As a result, the logical product of the AND circuit 46 is established, and as shown in FIG.
As shown in FIG. 2, the AND circuit 46 waits for the arrival of the zero-crossing point of the signal waveform from the time the switch 48 is closed, and generates an H level output, and the muting switch 12 is opened.

The timing at which the muting switch 12 is opened corresponds to the leading edge of the pulse shown in FIG. 2F, and occurs at or near the zero-crossing point of the signal waveform, as shown in FIG. 2G.

Furthermore, when the switch 48 is opened, the H level input from the resistor 52 to the AND circuit 46 is canceled as shown in FIG. 2B.

On the other hand, the output waveform of the buffer circuit 2 is applied to a zero-crossing detection circuit 18B, and the zero-crossing point or its vicinity is similarly detected. That is, the zero cross detection circuit 18B generates the output shown in FIG.
The circuit 42 generates the output shown in FIG. 2 at point E in FIG. 1 by ANDing this output with the output shown in FIG.

Therefore, the AND circuit 46
8A and the output of the AND circuit 42, as shown in FIG. 2F, from the time the switch 48 is opened until the arrival of the zero-crossing point of the signal waveform, the signal becomes L level, and the muting switch is activated. 12 is closed.

When the muting switch 12 is opened and closed in this manner, the signal waveform is removed as shown by the broken line g in FIG. 2G, and its output is canceled. In this case, the muting command
The muting operation is performed after the release switch 48 is turned on, waiting for the arrival of the zero-crossing point of the signal waveform, and since the muting operation is always performed at or near the zero-crossing point, the transient caused by the muting operation is It can be seen that generation of sound signals, that is, pump sounds, can be reliably prevented.

In Figure 2G, 1. t2 represents the time from the muting command to the start of muting, and t2 represents the time from the mini-4-ting release command to the muting release. That is, muting initiation and cancellation are executed within half a cycle of the signal waveform from the muting command and cancellation, thereby realizing high-speed muting operations and cancellation thereof.

As explained above, according to the present invention, the following effects can be obtained.

+11 A high-speed muting operation can be obtained, and the occurrence of a transient stage accompanying the muting operation can be prevented.

(2) There is no need to install an external time constant circuit for setting the muting time, which simplifies the circuit configuration and eliminates the need for external connection terminals when integrating semiconductors. Compared to conventional muting circuits, manufacturing costs can be reduced.

(3) Frequency characteristics are improved, no waveform distortion occurs in the signal to be muted, and there are no restrictions on the waveform, so various signals can be muted.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the muting circuit of the present invention, and FIG. 2 is an explanatory diagram showing its operating waveforms. 12... Muting switch, 16... Switching control circuit, 18A... First zero cross detection circuit, 18B... Second zero cross detection circuit.

Claims (1)

[Claims] (11) Based on the muting switch inserted in the signal system and the muting command/cancellation command input, the zero cross point of the signal waveform on the input side or output side of the switch is detected and the switch is activated. A muting circuit comprising a switching control circuit that opens and closes. (2) The switching control circuit includes a first zero cross that detects that the output side signal waveform of the muting switch has reached a zero cross range. The muting circuit according to claim 1, comprising a detection circuit and a second zero-crossing detection circuit that detects that the input side signal waveform of the muting switch enters a zero-crossing range. .