JPS60216381A - Lateral dot scrol system for characters on crt screen - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a vertical dot scrolling method for characters displayed on a CRT screen that scrolls characters displayed on a CRT screen in dot units in the vertical direction. Concerning what to do.

(Prior Art) FIG. 1 is a circuit block diagram of a conventional example in which a computer system is used to display characters on a CRT screen. In Fig. 1, numeral 1 indicates C where X characters are displayed vertically and Y characters are displayed horizontally.
It specifies the display position on the RT screen, generates a fresh memory address MA, and also displays the xXy dot matrix (
where X is the number of dots in the vertical direction and y is the number of dots in the horizontal direction). 2 is above 7
1/Video RAM which generates a character code in response to the Tushmemoria Vless MA; 3 a character generator which outputs dot information of a character displayed on the CRT screen in response to the character code and the raster address RA; It is. Further, 4 is an attribute RAM, and 5 is a multiplexer for time-sharing access to each of the RAMs 2.4 by a CPU (not shown) and the CRT controller 1.

In this case, the multiplexer 5 is accessed by the CRT controller 1. 6a.

6b and 6c are AND gates, and each RAM4
The opening/closing is controlled by the signal from the red (R) as shown in the diagram.
, green (G), and blue (B).

7 is a parallel/serial converter. In the prior art having such a configuration, when characters are scrolled in the vertical direction on the CRT screen 32, the scrolling is performed character by character. For this reason, the movement of the character on the CRT screen was step-like and not necessarily easy to see. To solve this problem, scroll the character by dots.

By the way, the problem with scrolling in units of dots is that if the character being scrolled, for example, scrolls 4 dots vertically upward from area B in FIG. As shown in B), be sure to select area A.
Then, the upper four dots will also span area B, as will the lower four dots. Here, the lines rising to the right in units of black squares indicate characters, RA 0 , 1 , 2 , .
...7 indicates a raster address. In this case, in area B, it is sufficient to add a scroll amount of 4 dots from the raster address RA, but in area B, only the lower 4 dots are scrolled and the upper 4 dots are not displayed. This is because the upper four dots are in area A, and the character 4- of area B cannot be displayed in area A with the address of area B unchanged. By solving this problem, it is desired to achieve an easy-to-read scroll display, and a circuit that makes this possible with a simple circuit configuration has been desired.

(Purpose) The present invention was made in view of the above circumstances, and
It is possible to scroll the characters on the CRT screen dot by dot, thereby making the movement of the characters on the CRT screen continuous, making the scrolling easier to see, and also the circuit configuration to realize this. The aim is to make it simple.

(Example) Hereinafter, the present invention will be described in detail based on an example shown in the drawings. FIG. 3 is a circuit block diagram according to an embodiment of the present invention, and parts corresponding to those in FIG. 1 are given the same reference numerals. In this embodiment, the CRT controller 1 is
, video RAM 2, character generator 3,
It includes an attribute RAM 4, a multiplexer 5, AND/GAME) 6a, GI), 6c, and a parallel/serial converter 7.

Here, regarding the refresh memory address MA, the fourth
This will be explained with reference to Figure (A). When X characters are displayed vertically on the CRT screen 9 and Y characters are displayed horizontally, Y characters are displayed in each horizontal column on the CRT screen 9. However, C
On the RT screen 9, first, the character display numbers 0, 1, 2, etc. are displayed sequentially from the left end to the right end of the top row. ...Y-1 is set, and the character display numbers Y, Y+1, etc. are set sequentially from the left end to the right end of the next column. Y+2. . . . Y+(Y-1) is set, and display numbers are subsequently set as serial numbers in the same manner, and the refresh memory address MA indicates the address of this display number. In this case, video RAM2
has an address that corresponds one-to-one to this display number. In the case of Figure 4 (A), the number of horizontally displayed characters Y
is 40, and 10 from the top left corner on the CRT screen 9.
th, i.e. MA=10 (this 10 is a serial number)
The character (lower right line) and the 10th character from the left end of the next column, that is, MA=50 (this 50 is a serial number) (lower right line) are CR, T screen 9.
shown above.

Next, the raster address RA is similarly shown in FIG.
). Now, one character unit is composed of a dot pattern of xXy dot Y matrix F (where x is the number of dots in the vertical direction and y is the number of dots in the horizontal direction), but this is called an 8 x 8 dot matrix. do.

In this case, eight electron beams are required to display one character.

The scanning line numbers of this electron beam are 0.1, 2, etc. ...set as 7.

The features of this embodiment are as follows.

That is, in this embodiment, returning to FIG. 3, an address conversion circuit 8 is provided between the CRT controller 1 and the video RAM 2.
has been established. This address conversion circuit 8 converts the display position designated by the first refresh memory address MA, the 21st node which is 7-, which is obtained by adding Y to MA=10 in FIG. 4(A), 40 in this embodiment. Fresh memory address MA”, that is, MA
It has a first adder circuit 81 that outputs '=50. Also,
This address conversion circuit 8 selectively outputs both refresh memory addresses MA and MA', and in response to an address switching signal, converts the first refresh memory address MA to the twenty-first refresh memory address MA'. a selector circuit 82 that switches to and outputs the output;
second scroll information VSI, which has addresses in one-to-one correspondence with all addresses of the video RAM 2, and has first scroll information Vsa corresponding to a first refresh memory address and one second refresh memory address; and a scroll RAM 83 that stores the above-mentioned one scroll information Vsa, Vsb and the $1 raster address RA from the CRT controller 1, and sends the added value to the character generator 3 as a second raster address RA'. A second addition circuit 84 outputs a predetermined 8= comparison signal when the value obtained by subtracting the scroll information from the X is less than or equal to the raster address. It includes an address switching signal generation circuit 86 that outputs a switching signal and a display signal generation circuit 87.

The operation of this address conversion surface 1t@8 will be explained in detail. However, for convenience of explanation, the dot matrix
x8, the number of displayed characters in the horizontal direction on the CRT screen 9 is Y=40, and the display area number is O to 39 from the top left end to the right end, and the left end of the next column in the vertical direction. Serial numbers are set sequentially from 40 to 79 from the end to the right end. Furthermore, the scanning line numbers, that is, the raster addresses RA=0.1, 2 . ...Up to 7.

Now, the display area number of the character on the CRT screen 9 specified by the 11th refresh memory address MA is 1.
Suppose it is 0. Further, it is assumed that the CRT controller 1 specifies an area of MA=10 using the refresh memory address MA, and that the scanning line number X of that area is specified as 7, for example, using the raster address RA. Also, the scroll amount Vsa in area MA=10 is set to 3 dots,
Let the scroll amount Vsb in area MA=50 be 1 dot.

In this case, raster address RA=7 for area MA=10
, the data at raster address RA=O in area MA=50 needs to be displayed. In this relationship, first, the CRT controller 1 outputs a fresh memory address MA=10. The fresh memory address MA=10 is set to 4 by the first adder circuit 81.
0 is added. Then, the selector circuit 82 usually
Select and output refresh memory address MA=10. This refresh memory address MA=10 is
It is input as the address of each RAM2, 4.83. Data corresponding to this address is output from each RAM2, 4.83. Data for the scroll amount Vsa=3 is written to the address corresponding to MA=10 in the scroll RAM 4. As a result, the scroll amount Vsa=3 is output from the scroll RAM 83. The raster address RA' of the second adder circuit 84 is RA''=RA+3. At the same time, the comparator circuit 85 performs the following calculation. The contents of this calculation are as follows.

RA〈8-Vsa 00. (1) RA≧8−Vsa, ---(2) When RA is 0 to 4, formula (1) holds true. In this case, comparison circuit 85 does not generate a comparison signal. Therefore, address switching signal generation circuit 86 does not output an address switching signal, and therefore area MA=50 is not accessed. As a result, only the characters in area MA=10 are scrolled upward by three dots as shown in FIG. 4(A) to FIG. 4(B). Next, when RA is 5.6.7, Vsa is 3, so equation (2) holds true. Then, the comparison circuit 85 outputs a comparison signal to the address switching signal generation circuit 86. Thereby, this address switching signal generation circuit 86 provides an address switching signal to the selector circuit 82. The selector circuit 82 thereby selects and outputs the fresh memory address MA'=50 from the first adder circuit 81. This refresh 11-memory address MA' is again given as the address of each RAM2, 4.83. Then, this time area MA
=50 characters are scrolled by one dot.

In this case, raster address RA of area MA=10 is R
If A=7, the character in area MA=50 is
The screen is scrolled from FIG. 4(A) to FIG. 4(B).

Here, for area MA=10 and RA=5.6, area MA=
There is a possibility that the raster address RA of SO is RA=6.7, so in order to avoid this, a display prohibition signal is output from the comparator circuit 85 to the display signal generation circuit 87, which causes the display signal generation circuit to 87 is an anime game) 6
A signal is generated to close a, 6b, and 6c.

(Effects) As described above, according to the present invention, an address conversion circuit is provided between the CRT controller and the video RAM, and this address conversion circuit converts Y to the display position specified by the first refresh memory address. a first adder circuit that outputs a second refresh memory address 12- obtained by adding; and an eleventh adder circuit that selectively outputs both of the refresh memory addresses and responds to an address switching signal; a selector circuit that switches from an address to a 2117th refresh memory address and outputs the same; and first scroll information that has addresses that correspond one-to-one to all addresses of the video RAM and that corresponds to the first refresh memory address. a scroll RAM that stores second scroll information corresponding to a second refresh memory address;
a second addition circuit that adds the scroll information and the first raster address from the CRT controller and outputs the added value as a second raster address to the character generator; and a value obtained by subtracting the scroll information from the X. The present invention is equipped with a comparison circuit that outputs a predetermined comparison signal when the character is less than or equal to the raster address, and an address switching signal generation circuit that outputs an address switching signal based on the comparison signal. Scrolling can be done dot by dot, so that the movement of characters on the CRT screen is continuous, making it easier to see the scrolling, and the circuit configuration to achieve this is also simple. This effect is achieved.

[Brief explanation of drawings]

FIG. 1 is a circuit block diagram of a conventional example, FIG. 2 is a diagram for explaining the scrolling state of characters on a CRT screen according to a conventional example, FIG. 3 is a circuit block diagram of an embodiment of the present invention, and FIG. (A) and (B) are diagrams showing scrolling states of characters on a CRT screen for explaining the operation of this embodiment. 1 is a CRT controller, 2 is a video RAM, 3 is a character generator, 8 is an address conversion circuit, 81 is a first addition circuit, 82 is a selector circuit, 83 is a scroll R
AM, 84 is a second addition circuit, 85 is a comparison circuit, and 86 is an address switching signal generation circuit. 15- Figure 4 (A) Figure 4 (B)

Claims (1)

[Claims] (1) Generates a refresh memory address that specifies the display area number on the CRT screen where X characters are displayed vertically and Y characters horizontally, and
Dot matrix (where X is the number of dots in the vertical direction, y
A CRT controller generates a raster address that specifies the number of x vertical scanning lines in a character unit consisting of a dot pattern (number of dots in the horizontal direction), and generates a character code in response to a refresh memory address. and a character generator that outputs dot information of a character to be displayed on a CRT screen in response to the character code and raster address, wherein the CRT controller and the video An address conversion circuit is provided between the RAM and the address conversion circuit, and this address conversion circuit adds Y to the display area number specified by the first refresh memory address from the CRT controller.
a first adder circuit that outputs a refresh memory address; and a circuit that selectively outputs both of the refresh memory addresses and changes the refresh memory address from the first refresh memory address to the second refresh memory address in response to an address switching signal. It has a selector circuit for switching and outputting, and addresses that correspond one-to-one to all the addresses of the video RAM, and corresponds to the first scroll information corresponding to the first refresh memory address and the 21st refresh memory address. a scroll RAM for storing second scroll information to be used; 2 addition circuit; a comparison circuit that outputs a predetermined comparison signal when a value obtained by subtracting the scroll information from the X is less than or equal to the raster address; and an address switching signal that outputs an address switching signal based on the comparison signal. A vertical dot scrolling method for characters on a CRT screen, characterized by comprising a generation circuit.