JPS60215258A - 記憶制御方式 - Google Patents

記憶制御方式

Info

Publication number
JPS60215258A
JPS60215258A JP7080384A JP7080384A JPS60215258A JP S60215258 A JPS60215258 A JP S60215258A JP 7080384 A JP7080384 A JP 7080384A JP 7080384 A JP7080384 A JP 7080384A JP S60215258 A JPS60215258 A JP S60215258A
Authority
JP
Japan
Prior art keywords
access request
time
latch
access
requests
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7080384A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0420491B2 (https=
Inventor
Hideo Wada
英夫 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7080384A priority Critical patent/JPS60215258A/ja
Publication of JPS60215258A publication Critical patent/JPS60215258A/ja
Publication of JPH0420491B2 publication Critical patent/JPH0420491B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP7080384A 1984-04-11 1984-04-11 記憶制御方式 Granted JPS60215258A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7080384A JPS60215258A (ja) 1984-04-11 1984-04-11 記憶制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7080384A JPS60215258A (ja) 1984-04-11 1984-04-11 記憶制御方式

Publications (2)

Publication Number Publication Date
JPS60215258A true JPS60215258A (ja) 1985-10-28
JPH0420491B2 JPH0420491B2 (https=) 1992-04-03

Family

ID=13442072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7080384A Granted JPS60215258A (ja) 1984-04-11 1984-04-11 記憶制御方式

Country Status (1)

Country Link
JP (1) JPS60215258A (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63229557A (ja) * 1987-03-19 1988-09-26 Fujitsu Ltd シリアライズ処理装置
JPH01280848A (ja) * 1988-05-06 1989-11-13 Fujitsu Ltd メモリアクセス制御方法
JPH02166538A (ja) * 1988-12-20 1990-06-27 Fujitsu Ltd メモリアクセス制御方式

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731066A (en) * 1980-07-31 1982-02-19 Fujitsu Ltd Memory access controlling system
JPS58129666A (ja) * 1982-01-29 1983-08-02 Hitachi Ltd 記憶制御方式
JPS58129563A (ja) * 1982-01-27 1983-08-02 Hitachi Ltd 記憶制御装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731066A (en) * 1980-07-31 1982-02-19 Fujitsu Ltd Memory access controlling system
JPS58129563A (ja) * 1982-01-27 1983-08-02 Hitachi Ltd 記憶制御装置
JPS58129666A (ja) * 1982-01-29 1983-08-02 Hitachi Ltd 記憶制御方式

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63229557A (ja) * 1987-03-19 1988-09-26 Fujitsu Ltd シリアライズ処理装置
JPH01280848A (ja) * 1988-05-06 1989-11-13 Fujitsu Ltd メモリアクセス制御方法
JPH02166538A (ja) * 1988-12-20 1990-06-27 Fujitsu Ltd メモリアクセス制御方式

Also Published As

Publication number Publication date
JPH0420491B2 (https=) 1992-04-03

Similar Documents

Publication Publication Date Title
US6944731B2 (en) Dynamic random access memory system with bank conflict avoidance feature
JPS62237547A (ja) アドレス変換方式
JPS59167761A (ja) 計算機システム
JP2768503B2 (ja) 仮想記憶アドレス空間アクセス制御方式
JPS60215258A (ja) 記憶制御方式
US20060047874A1 (en) Resource management apparatus
JPS6054694B2 (ja) 記憶制御装置
JPH10177541A (ja) データ転送装置及びデータ転送システム
JP3413843B2 (ja) ベクトルデータの要素を並列処理するベクトルプロセッサ
JPS59161755A (ja) 記憶制御方式
JPH06103473B2 (ja) 記憶制御方式
US12443528B2 (en) Memory management circuit, electronic device and memory management method
JP2595992B2 (ja) 電子楽器
KR950013116B1 (ko) 타이콤(ticom) 시스템의 록킹 장치와 록킹 제어 방법
JPS5858752B2 (ja) アドレス変換装置
JPS59132483A (ja) アドレス変換装置
JPS6366662A (ja) 記憶制御装置
JPS61136131A (ja) 情報処理装置
JPH02299053A (ja) 複数のfifo情報格納装置における優先順位管理方式
CN113688063A (zh) 一种在存储器中为数据分配存储地址的方法和设备
JPH034938B2 (https=)
JPS6074074A (ja) 優先順位制御方式
JPH11338768A (ja) メモリ制御方法、メモリ制御装置及びその記録媒体
JPS6215902B2 (https=)
JPH0350298B2 (https=)