JPS60214086A - Switched capacitor arithmetic circuit - Google Patents

Abstract

PURPOSE:To form a circuit into an IC capable of an optional processing by obtaining leading-out of the degree of amplification and control of the arithmetic function of the circuit by a ratio of clock frequencies for a switched capacitor equivalent resistance, a capacitor ratio, and clock control. CONSTITUTION:In a circuit A, switches S1-S4 are controlled by clocks whose phases are opposite to phases of clocks used for control of switches S'1-S'4. In a circuit B, switches S1, S'2, S'3, and S4 are controlled by clocks whose phases are opposite to phases of clocks used for control of switches S'1, S2, S3, and S'4. Each time clocks phi and phi' for the circuit B are changed when those for the circuit A are fixed, an operational amplifier output V0' is reduced by a value indicated by C2/C1.(-Vi). The operational amplifier output V0' is operated by the ratio of clock frequencies for the switched capacitor equivalent resistance and the capacitor ratio.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a switched capacitor arithmetic circuit, and particularly to a programmable switched capacitor arithmetic circuit suitable for implementation into an IC capable of performing arbitrary arithmetic processing by clock control and clock frequency. Regarding.

[Background of the invention]

FIG. 1 shows an example of an arithmetic circuit consisting of a resistor and an operational amplifier.

Arithmetic circuits using such resistors are monolithic ICs.
In this case, it is difficult to create a highly accurate resistor within the ThIC. On the other hand, when using a switched capacitor circuit method that realizes resistance isometrically using a switched capacitor, when fabricating a monolithic IC, the capacitance of a capacitor compared to a resistor can be determined by the area of the chip.
You can create that value accurately. Therefore, it is effective as a method for creating circuits with good characteristics.In addition, if the resistor shown in Figure 1 is realized using a monolithic diffused resistor and made into an IC, it lacks applicability and high precision cannot be achieved.Advantages of using an IC It has drawbacks such as being difficult to produce.

[Purpose of the invention]

An object of the present invention is to provide a programmable general-purpose switched capacitor operation circuit suitable for IC implementation that can perform arbitrary operations such as addition, subtraction, addition/subtraction, amplification, and subtraction by controlling clocks and combining capacitor ratios. [Summary of the invention] The main points of the invention are as follows.

(1) The amplification degree is controlled by the ratio of the clock frequency for the switched capacitor equivalent resistance connected to the input side of the operational amplifier and the clock frequency for the switched capacitor equivalent resistance connected to the feedback side, and the capacitor rL for each. Determined by ratio.

(11) Whether a part of the circuit is used as an addition, subtraction, or amplification/attenuation circuit is determined by controlling the switched capacitor circuit's total clock (%l) and determines the clock frequency.

(iii) By the combination of (1) and (g) above, it is possible to perform the arithmetic processing of C1.

This is how it was done.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

-First, Figure 2? The basic equivalent resistance of a switched capacitor will be described using the following equation: In Fig. 2, the peak pressures at terminals 1 and 2 are VI and V2. When the switch 82 is turned on as shown in (a), the capacitor C has 2
A charge Q2 represented by Q2 = CV2 is being charged. Next, when the switch s1 is turned on as in (1)), the four charges of C become Q+=CV+, and Q, 1
The charge ΔQ, which is the difference between Q2 and Q2, flows into the terminal. That is, ΔQ=Q+ 0.2 =C(VI V2+...
・It becomes (1). Here, when 82 k is turned on again as shown in (C), the electric charge of C becomes Q2 = CV2, and the electric charge ΔQ of the eyelid, which is the same as that in equation (1), flows out from the capacitor C to the terminal f.

By repeating this operation, in the circuit of FIG. 2, the charge of (ΔQ) moves from the terminal to ■ every five cycles T.

Therefore, an average current 1 represented by . will flow to the terminal hole .

On the other hand, the current 1 flowing through the resistor R shown in (d) is ■・−■・
, =, (31) Therefore, from equations (2) and (3), the equivalent resistance of the switched capacitor in Fig. 2 can be expressed as (1 switching frequency).In other words, the equivalent resistance of the switched capacitor is It is determined by the ratio of the value C and the switching period T. By changing the period 'l-, the equivalent resistance can be freely changed without changing the value of the capacitor.

The switched capacitor circuit is a basic circuit and is actually a circuit that is not easily affected by parasitic capacitance (see Figure 3).
A circuit such as a) or (b) is used. FIG. 4 shows two types of switched capacitor equivalent resistance circuits.

First, the circuit (a) will be described. The feature of this circuit is that the switch 5l-84 is controlled by a clock with the opposite phase of the clock used to control the switch S (~SI4).Therefore, the relationship between input and output is normal rotation and 6 degrees. Next, we will discuss the circuit υ). The characteristics of this circuit are
Sr r S' + s3 + s4 is controlled by a clock having an opposite phase to the clock used to control the switches of S;.S2.S3.S:.

Therefore, the relationship between input and output is always reversed. That is,
(Both circuits (a) and (1)) are below the switch)
Turn on the switch when the clocks φ and φ shown in
It is something that makes you

FIG. 5 shows an embodiment of the present invention. In the figure, A indicates the circuit of FIG. 4(a), and B indicates the circuit of FIG. 4(b). Using FIG. 6, describe the operation of the circuit below.

In FIG. 6, (a) is the clock pulse φ that controls A in FIG. 5, and the frequency is f^ (Hz).

(b) if: Clock pulse 7 (
C) High i 5 The clock pulse φ frequency that controls B in FIG. 5 is fn(H2) (d) is the clock pulse φ that controls B in FIG. In this embodiment, an example of fB=2fAO will be described.

FIG. 7 shows that the input voltage Vi in FIG. 5 is 5inW1. Operational amplifier output vo' when capacitors used in switched capacitor equivalent resistances A and B are kC+ and C2
shows.

As is clear from FIG. 6, when the clocks (a) and (b) (for A in FIG. 5) φ and φ are constant, (C) and (
It can be seen that the clock d) (for B in FIG. 5) φ and φ change. That is, in the circuit configuration as shown in Fig. 5, the output voltage ■2 is 2 ■,'-Vi (1-less than 10,000) ...... (5) Cr
f* In addition, in Fig. 5, the clock frequency of A on the feedback side of the operational amplifier is fλ, the capacitor C; and the clock frequency of A on the input side 1 is YfA - C('), then 2
Equation (5) above becomes - Further, if the Bk clock frequency and capacitor in Fig. 5 are set to their respective values, and only one circuit configuration is tarock controlled as shown in A, Equation (6) becomes - In other words, Fig. 5 becomes The shown embodiment is as follows: ■ Clock frequency for switched capacitor equivalent resistance ■ Capacitor ■ Clock control of switched capacitor circuit (switched capacitor equivalent resistance circuit 'kA or B control) By performing all of these steps, one set ( 6) and (O that can perform force calculations) In this embodiment, an example using human power has been described, but it can be easily assumed that calculations for multiple inputs can also be performed.

Furthermore, since the output waveform of the operational amplifier is as shown in FIG. 7, it is easy to understand that a desired output can be extracted by adding the sample and hold circuit shown in FIG.

〔Effect of the invention〕

According to the present invention, arbitrary calculations can be performed by controlling the clock frequency, capacitor, and clock.

[Brief explanation of drawings]

Figure 1 is a diagram of a conventional arithmetic circuit consisting of a resistor and an operational amplifier.
Figure 2 (a) (b) (C) (d) is an explanation of the basic equivalent resistance of a switched capacitor. b) is an equivalent resistance circuit diagram of the no-switched capacitor of the present invention, FIG. 5 is a circuit diagram of an embodiment of the present invention, and FIG. 6 is a diagram of 1) (b) (C).
(d) is the tarokku diagram of FIG. 5, and FIG. 7 is the output voltage waveform diagram of FIG. 5. 81~S4...Switch S (~84'...Switch. Agent Patent Attorney Akio Takahashi 1 Mouth Figure 2 31D (Ku) (b) No. 4c21

Claims (1)

[Scope of Claims] In a switched capacitor operation circuit composed of a combination of an operational amplifier, a switch, and a capacitor, the amplification degree of the circuit is derived based on the equivalent resistance of the switched capacitor connected to the input side of the operational amplifier. The switched capacitor equivalent resistance is determined by the combination of the clock frequency and the clock frequency for the equivalent resistance connected to the feedback side, and the ratio of the respective equivalent resistance capacitors, and further unifies the control of the calculation function of the circuit. 1. A switched capacitor arithmetic circuit, characterized in that an arbitrary arithmetic processing circuit can be constructed by a combination of these by controlling the clock of the switched capacitor arithmetic circuit.