JPS60210065A - Picture synthesizer - Google Patents

Abstract

PURPOSE:To synthesize pictures at a high speed by providing window start and end marks at the start and the end of a window area together with end marks put at the end of each line, and performing the synthesization of pictures with compressed code trains. CONSTITUTION:When a processor 13 outputs a synthesization start instruction to a gate 2, a clock pulse is fed to a total diagram buffer 5 from a clock pulse generating part 1 via the gate 2. Then data are read out every bit synchronously with said clock puse. The picture data read out of the buffer 5 are supplied in series to a shift register 15 with which the clock pulse synchronizes. Here a gate 10 transfers the series output of the register 15 to a synthetic diagram buffer 6 in response to the start instruction. While the parallel output of the register 15 is sent to a mark detecting part 9. The part 9 checks whether or not the data stored in the register 15 is equal to the window start or end mark designated by the register 15.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a device that synthesizes and edits two-dimensional images such as a plurality of document screens to synthesize one two-dimensional image information.

[Background of the invention]

Image compositing here refers to the process of inserting images of partial views into predetermined areas (this is called a window) on the overall view. In general, there can be multiple windows in one overall view.

Normally, in order to process image information, it is desirable to represent this information as binary data, compress it, for example, by using a run-length code, and then process the compressed data. Regarding image synthesis, it is known to perform image synthesis before data compression, but until now there has been no technique for appropriately performing image synthesis after data compression. Therefore, since raw binary data before data compression is used for image synthesis, it is necessary to process an extremely large amount of data. Therefore, there is a problem in that the compositing process requires time, and when composing compressed image data, the compressed data must be converted into the original raw data before compositing.

[Purpose of the invention]

SUMMARY OF THE INVENTION In order to eliminate the above-mentioned problems, it is an object of the present invention to provide an apparatus that performs image synthesis using compressed binary data as is.

[Summary of the invention]

The present invention is an apparatus for recording whole image data having a window area, partial image data to be synthesized with the window area, and synthesized image data, wherein the whole image data is divided into inside and outside of the window area. and has a window start mark and a window end mark at the beginning and end of the window area, respectively, and the window start mark and window end mark are
Different windows are coded with different codes, and the whole image data and partial image data are
A line mark is provided at the end of a line when displayed, and an end mark is provided at the end of all lines, and images are synthesized as they are code strings compressed by the run-length method or the like.

[Embodiments of the invention]

The image synthesis handled in the present invention refers to a process of inserting an image of a partial view into a predetermined area (this is called an r window) on an overall view (original image). Generally, there are a plurality of windows in one overall view, and they are identified by window numbers (window 1, hermitage 2, etc.). Any numbering method for windows is allowed as long as there is no duplication. It is assumed that the correspondence between windows and partial views is known. For example, in Figure 1, partial view A is inserted into window 1 in the overall view, and window 2
This shows the case where a composite diagram is obtained by inserting partial diagram B into .

As shown in FIG. 2(a), the overall diagram consists of the 1st to 21st rows, has a window 1 from the 4th row to the 13th row, and has a window 2 from the 11th row to the 16th row. Data in uncompressed black and white binary representation is expressed as shown in FIG. 2(b). Here, H is the data in the row that does not include windows, H
4, +11, Hj12), ... are the data of the part outside of Boon in the line that includes the window, α1゜β□ are the window 1,
This is the data of the window part in the row containing 2. Here iy
J+kyQ is an appropriate number.

In the present invention, this data is stored in a third
It is encoded using a run length code as shown in the figure.

That is, the image data H12 (13
, α12 + H12" bow β12. Hl,! (33 etc. are respectively run-length compression codes C12", X 1
2.

CI2" y Y 12 t C: 12"" HC:
21, and identification codes Z1 to Z4, which serve as control information for the synthesis process described later, are added between these data. The rules for this encoding can be summarized as follows.

(1) Add four types of identification codes (line mark Zl, end mark Z4, window start mark Z2, window end mark Z3).

(2) The line mark zl is a code indicating the division of the overall view data and is placed at the end of each line. However, for the last line, the following end mark Z4 is added instead of the line mark Z1.

(3) The end mark z4 is a code indicating the end of the overall view data.

(4) The window start mark z2 and the window end mark Z3 are symbols indicating the insertion position of the partial view (ie, window). Generally, there are a plurality of windows, but a window start mark Z2 and a window end mark Z3 are encoded for each window so that the window number can be identified.

(5) Line mark Zl, end mark Z4. Window start mark Z2. The compressed partial data of the overall view data is separated by the window end mark Z3.

The matters described above are rules for compressing and encoding the entire diagram. When compressing and encoding a partial view, the concept of a window is not necessary, so the above rules can also be applied to partial views, except for the window start mark and window end mark.

Several methods can be considered to realize such compression encoding. Since this is basically a modification of run-length compression processing, the technology of run-length compressors often used in facsimiles and the like can be applied. Alternatively, encoding by software is also possible. Since the point of the present invention lies in the synthesis processing described below, a description of the method for realizing compression encoding will be omitted here.

FIG. 4 is an example of a synthesis apparatus used to carry out the present invention. The present invention will be explained based on this example.

Image file 3 contains image data of the whole diagram and partial diagrams.
It is stored in the compression code shown in FIG. As shown in FIG. 1, when a plurality of partial views are to be combined, first, any one partial view is combined. For example, when partial view A is to be first combined into window 1, image data of partial view A is read from image file 3 and set in partial view buffer 4. and the corresponding window number (in this case, window 1
) is set in window number register 8. The image data of the overall view is read from the image file 3 and set in the overall view buffer 5. A processing unit 13 receives a start command for starting synthesis.
When the clock pulse 7 is sent to the gate 2, the clock pulse 7 is sent to the gate 2 from the clock pulse generator 1 to the overall diagram buffer 5. A clock pulse is applied via line t2, and in synchronization with this clock pulse, 1
Data is read out bit by bit. At this time, since the gate 2 does not send a clock pulse to the partial diagram buffer 4, data reading from the partial diagram buffer 4 is stopped. The image data read out from the overall view buffer 5 is serially input to a shift register 15 that is synchronized with this clock pulse. In response to this start command, the gate 10
The serial output of the shift register 15 is transferred to the composite diagram buffer 6. The parallel outputs of the shift register 15 are also sent to the mark detection section 9 (state Sl). The mark detection unit 9 detects whether the data stored in the shift register 15 is equal to the window start mark, window end mark, or end mark for the window number specified by the register 9.

As mentioned above, when composing a plurality of partial diagrams, the partial diagrams are selected one by one and the compositing is repeated one by one. In the window number register 8, a window number 11177 into which the currently selected partial view is to be inserted is set by the processing device 13.

When the mark detection unit 9 detects a window start mark Z2 corresponding to the designated window number "'1" in the data read from the overall view buffer 5, it sends a detection signal P1 to the gates 2 and 10. . In response to this, the gate 2 stops sending clock pulses to the overall view buffer 5, sends clock pulses to the partial view buffer 4 via line t1, and starts reading data. Furthermore, after sending the window start mark to the composite diagram buffer 6, the gate IO blocks passage of the entire diagram data, and sends the partial diagram data output from the shift register 14 to the composite diagram buffer 6 in synchronization with the clock signal. do.

In addition, the gate 2 further responds to this signal P1 and sends this clock pulse to the composite diagram buffer 6 on the line t3 after a predetermined time.
Send via. As a result, the data in the partial picture buffer 4 is read out bit by bit in synchronization with the clock pulse from the gate 2, and is transferred to the composite picture buffer 6 through the shift register 14 and the gate 10 and stored therein. At the same time, this partial figure data is also sent to the mark detection unit 7 as a parallel output of the shift register 14 (state S2).
.

The mark detection unit 7 detects whether the data in the shift register 14 is equal to a row mark or an end mark.

When the mark detection unit 7 detects the line mark Zl or the end mark Z4 in the partial drawing data, it sends the respective detection signals qf t '12 to the gate 2 and the gates 1 to 10. In response to these, gate 2 stops sending clock pulses to partial view buffer 4 and composite view buffer 6, and starts sending clock pulses to overall view buffer 5. (The line mark and end mark in the partial figure data are not transferred to the composite figure buffer 6.) Also, the gate 1
0 prevents passage of both the entire view data and the partial view data. At this time, data in the window area (for example, X12' in FIG. 3) is read from the overall view buffer 5 and sent to the mark detection section 9 through the shift register 15. Data in this window area is not transferred to the composite drawing buffer 6. (State X53).

When the mark detection unit 9 detects the window end mark Z3 corresponding to the window number, it sends the output signal P2 to the gate 2 and the gate 10. In response to this, the gate 2 starts sending clock pulses to the composite diagram buffer 6. The sending of clock pulses to the partial diagram buffer 4 has been stopped;
The sending of clock pulses to the overview buffer 5 continues. The gate 10 also allows the passage of overview data provided from the shift register 15. As a result, the data in the overall diagram buffer 5 is read out bit by bit in synchronization with the clock pulse from the gate 2, and the data in the composite diagram buffer 5 is read out bit by bit in synchronization with the clock pulse from the gate 2.
will be forwarded to. (The window end mark is also transferred to the composite drawing buffer 6.) At the same time, it is also sent to the mark detection unit 9. This state is equivalent to state S1 mentioned earlier. Such processing is performed for all rows.

When the mark detection unit 9 detects an end mark in the overall drawing data, it means that the synthesis for the partial drawing has been completed.'=The synthesis result is stored in the combined drawing buffer 6.

If there are other partial views to be combined, the processing device 13 transfers this combined result to the overall view buffer 5, then reads out the partial view data to be combined from the image file 3 and sets it in the partial view buffer 4. . At the same time, the window number corresponding to this partial drawing is set in the window number register 8. After that, you can repeat the same operation as above. When the mark detection section 9 detects an end mark in the overall diagram data, it outputs an end mark detection signal, and in response to this, the OR circuit 11 outputs an interrupt signal to the processing device 13. The processing device 13 initializes various registers by interrupt processing, and issues a start command to start synthesis again.

The trigger for the interrupt signal is not only the mark detection unit 9 but also the partial diagram buffer 4. It also exits from the overall view buffer 5 and composite view buffer 6. These are called a partial diagram buffer empty signal, a global diagram buffer empty signal, and a composite diagram buffer full signal. What is the overview buffer empty signal? If the buffer becomes empty while reading data from the overview buffer 5, it interrupts the processing device 13 and reads new data from the image file 3 into the overview buffer 5. This is a signal for The same applies to the partial diagram buffer empty signal.

The composite diagram buffer full signal indicates that the buffer is full. When an interrupt occurs, the processing device 13 can know the cause of the interrupt by referring to the contents of the status register 12.

The operating principle of the synthesizer shown in Fig. 4 has been outlined above.
FIG. 5 summarizes this as a state transition diagram.

Further, the control functions of the gates 2 and 10 in each state are as shown in FIG.

FIG. 6 is a configuration diagram of the partial diagram buffer 4. The partial view data read from the image file 3 is stored in the memory unit 44. The number of stored words is displayed in the word counter 45.
is set as the initial value. The partial diagram data in the memory unit 44 is read out bit by bit in synchronization with the shift pulse from the gate 2.
This is done through gate 42 and shift register 41.

Memory unit 44 is word unit (N bits/word)
Therefore, one word of data is read from the memory unit 44 and transferred to the shift register 41 every time a shift pulse is input N times. Therefore, the shift pulse is also input to the N-ary counter 43, which opens the gate 42 and requests the memory unit 44 to read one word each time the N-ary shift pulse is input. At the same time,
The word counter 45 is decremented by one. When the word counter 45 reaches zero, a partial diagram buffer empty signal is output.

The configuration of the overall view buffer 5 is also the same as that in FIG.

The composite diagram buffer 6 has the same structure as the partial diagram buffer 4 and the entire diagram buffer 5, although the input/output direction of data is reversed.

In the above embodiment, instead of the window number itself, the window start mark and window end mark for that window number may be stored in the window number register. At this time, the mark detection unit 9 is configured to determine whether or not this data matches the above-mentioned mark by determining whether the code in this register matches the data in the shift register 15. be done.

When decoding a composite image as described above, decoding is performed in a sequential scanning manner based on the row mark of the overall view in the composite image, and the window number corresponding to the window number in the data in the same row is started. When a mark appears, decoding is performed sequentially using this start mark as a reference until a window end mark for the same window number is detected. When this window end mark is detected, new decoding is performed using it as a reference. By starting, the data can be decrypted.

〔Effect of the invention〕

As described above, according to the present invention, image synthesis can be performed using compressed code strings without developing image information into binary data. Through run-length compression, typically
Since the amount of image data can be reduced to about 115 to 1/10, the present invention allows image synthesis to be achieved at high speed and with an inexpensive device.

[Brief explanation of the drawing]

FIGS. 1 to 3 are explanatory diagrams showing the operation of the present invention. FIG. 4 is a block diagram showing one embodiment of the synthesis apparatus of the present invention;
FIG. 5 is an explanatory diagram showing the operation of the apparatus shown in FIG. 4, and FIG. 6 is a block diagram showing a partial diagram/<sofa in the present invention. Figure 1 ￥3 2 Eup (Good) (b) Hl +ds (v'64N:FI'+z,)l:￥
'Hhs' I+ H! :λ 3rd figure 12th bamboo 4th figure erased 5th figure (min (b) 】-Shizu;:@

Claims (1)

[Scope of Claims] A means for recording whole image data having a window area, partial image data to be synthesized with the window area, and synthesized image data, the whole image data including the inside and outside of the window area. and has a window start mark and a window end mark at the beginning and end of the window area, respectively, and the window start mark and window end mark have different codes for different windows. The whole image data and the partial image data have a line mark at the end of the line when displayed, and an end mark at the end of all the lines; designation means for recording data designating one of the windows; and the entire image data read from the storage means is a window start mark or a window end mark designated by the designation means, or
a first detection means for detecting whether the partial image data read from the storage means matches the line mark or the end mark; and a second detection means for detecting whether the partial image data read from the storage means matches the line mark or the end mark. means for controlling reading of data from the storage means and writing of data to the storage means, the means for sequentially reading out the entire image data and determining whether the read data matches the window start mark; While it is not detected by the first detection means, the read data is written in the storage means as a composite image, and after the coincidence is detected, the partial image data is read out and then the second detection means writes the read data into the storage means. The entire image data is written into the storage means until a match is detected, and after the match is detected, the entire image data is read out, and after the window end mark is detected by the first detection means, the successive data is written into the storage means. means for continuously writing the composite image data into the storage means as composite image data, and after the end mark is detected by the first detection means, shifting the composite image data to the entire image data storage part; and means for updating the contents of the specifying means in response to the detection of the end mark by the first detecting means.