JPS60208875A - Manufacture of josephson junction element - Google Patents

Abstract

PURPOSE:To enhance dimensional accuracy, to eliminate different in steps completely and to prevent short circuits caused by a poor step coverage, by forming a tunnel barrier part by anisotropic etching. CONSTITUTION:On an insulating substrate 11, three-layer films, i.e., a first super- conductive electrode 12 of Nb, a tunnel barrier layer 15 and a second superconductive electrode 21 of Pb, are formed. A first insulator layer 23 comprising SiO and the like having good directivity is deposited on the entire surface of the substrate. Then a resist mask 22 is lifted off. Thereafter, a resist mask 24 is formed at a place, which is to become a tunnel barrier part on the second superconductive electrode 21. The second superconductive electrode 21 is completely etched by an ion etching method. The interface part between the first superconductive electrode 12 and the first insulator layer 23 is flattened. Then a second insulator layer 25, whose thickness is the same as that of the second superconductive electrode 21, is deposited. The resist mask 24 is lifted off and a pattern is formed. Thereafter a third superconductive electrode 26 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing a Josephson junction device, and more particularly to a method for manufacturing a Josephson junction device having a tunnel barrier layer that eliminates step portions. Technology and its problems) In general, logic circuits and memory circuits made of Josephson junction elements have excellent junction characteristics, small variations in these characteristics between elements, and little characteristic deterioration due to thermal cycles. element is required. As an element that satisfies both the integration requirements of these excellent bonding characteristics and high reliability,
A method using niobium (Nb) or a Nb compound for the first superconductor electrode and lead (pb) or a Pb alloy for the second superconductor electrode is attracting attention. However, this P
Since b-based materials are chemically unstable, this type of material has traditionally been
The turning method was limited to the lift-off method.

As a conventional example, J is 198 for H+, F-Broom, etc.
US magazine in October 2009” IEEB Transact
ions on Electron Devices”
There are papers published in Vol. ED-27, No. 10, pp. 1998-2008.

This paper method will be explained step by step using cross-sectional views of FIGS. 1(a) to 1(f).

First, as shown in FIG. 1(a), an insulating substrate or a substrate 11 having an insulating layer on its surface is coated with a vapor deposition method or a substrate 11.
A first superconductor electrode 12 made of fiNb is formed by a method. Patterning of the first superconductor electrode 12 is performed using a conventional photoresist process, a ching method, or a lift-off method. Next, as shown in FIG. 1(b), an undercut-shaped resist mask 13 is formed on the portion of the first superconductor electrode 12 that will become the tunnel barrier portion, and as shown in FIG. Silicon monoxide (8i0), silicon dioxide (Sin,
) etc., and then the insulating layer 14 made of
Then, a tunnel barrier section having an opening as shown in FIG. 1(d) is formed. The undercut-shaped resist mask 13 can be obtained not only by a normal photoresist process but also by immersion in an organic solvent such as chlorobenzene or bromobenzene before or after exposure. Next, Figure 1(e)
As shown in FIG. 2, a tunnel barrier layer 15 having a thickness of several tens of times is formed in the tunnel barrier portion by thermal oxidation or plasma oxidation. Thereafter, as shown in FIG. 1(f), a second superconductor electrode 16 is formed by a vapor deposition method and a lift-off method.

This manufacturing method requires an undercut-shaped resist mask 13 to form the tunnel barrier portion, but the shape of this mask is easily influenced by resist shear baking conditions, organic solvent temperature, dipping time, etc. . In particular, it is very difficult to accurately obtain the dimensions of the lower part of the resist mask 13 that define the effective area of the tunnel barrier section. Further, there is a problem in that the tunnel barrier section is contaminated by the substrate from the insulating layer 14 during cleaning or plasma oxidation of the tunnel barrier section. Further, at the pattern edge portion of the first superconductor electrode 12, the insulator layer 14 and the step of the second superconductor electrode 16 are formed.

The first superconductor electrode 12 and the second superconductor electrode 16 were short-circuited, and the second superconductor electrode There was a drawback that a weak coupling portion was generated in the electrode 16.

(Object of the Invention) An object of the present invention is to provide a method for manufacturing a Josephson junction element that eliminates such conventional drawbacks, eliminates step portions, and forms a tunnel barrier portion with high dimensional accuracy.

(Structure of the Invention) The structure of the method for manufacturing a Josephson junction element of the present invention is such that a first superconducting electrode of a predetermined pattern made of Nb or a Nb compound is formed on a substrate, a tunnel barrier layer is formed on the first superconducting electrode, and a tunnel barrier layer is formed on the first superconducting electrode. A first step in which a three-layer film of a second superconducting electrode made of pb or a Pb alloy is successively formed on the tunnel barrier layer.
a second step of covering the three layers i with a T-resist mask and depositing a first insulator layer having the same thickness as the second superconducting electrode and removing the resist mask; An etching mask is formed at a location on the second superconducting electrode that will become a tunnel barrier layer, and a second etching mask is formed at a location other than this etching mask.
a third step of etching the superconducting electrode portion of the second superconducting electrode; depositing a second insulating layer so as to fill the etched portion of the second superconducting electrode and the first insulating layer; and then etching the etching mask; and a fifth step of depositing a third superconducting electrode on the second insulating main layer including a portion that contacts the second superconducting electrode. do.

(Example) The present invention will be explained in detail below with reference to the drawings.

FIGS. 2(a) to (1) are cross-sectional views of an element to be explained in order of implementation process of the present invention. First, as shown in FIG. 2(a), an insulating substrate or an insulating layer on the surface A first superconductor electrode 12 made of Nb or a Nb compound is disposed on a substrate 11 having a first superconductor electrode 12 . Tunnel barrier layer 15. A second superconductor electrode 2103 layer film made of Pb or Pb alloy is formed. These first and second superconductor electrodes 21 are deposited by vapor deposition or sputtering, and the tunnel barrier layer 15 is deposited using a normal resist process.
b) As shown in ion etching method and reactive etching method.

Patterning is done using the cutting method. Subsequently, as shown in FIG. 2(C), a film of 8i0°8i0. A first insulating layer 23 consisting of etc. is deposited.

This film thickness is optimized as described later. Next, as shown in FIG. 2(d), after lift-off of the resist mask 22 gold, as shown in FIG. 2(e), the second superconductor electrode 2 is removed.
A resist mask 24 is placed on the area that will become the tunnel barrier section on 1.
As shown in FIG. 2(f), the second superconductor electrode 21 is completely etched by ion etching to remove the boundary between the first superconductor electrode 12 and the first insulator layer flatten the area. Here, the film thickness of the resist mask 22 is optimized so as not to cause the sound of re-deposition on the side wall of the resist mask 22 after etching.

Let the etching rates of the second superconductor electrode 21 and the first insulator layer 23 be r, , rl, respectively, and the film thicknesses of the first superconductor electrode 12 and the second superconductor electrode 21, respectively. d
sl, d*2, the first insulator layer 2 to be deposited
The film thickness di of No. 3 is selected so as to satisfy the following relationship.

dI = dst + -ds2 ·- · (i) S Next, as shown in FIG. A second insulator layer 25 is applied. The resist mask 24 is lifted off to form a butter pattern as shown in FIG. 2(h). After this, as shown in FIG. 2(i), the first superconductor electrode 12. The third superconductor electrode 26 is formed using the same film forming method and processing method as in the case of the second superconductor electrode 21.

According to this manufacturing method, a rectangular resist mask with good reproducibility can be used when forming the tunnel barrier portion, and a highly accurate pattern can be formed from the resist mask 22 to the second superconductor electrode 21 by the ion etching method. Since transfer is possible, it is easier to control the dimensions of the tunnel barrier portion compared to the conventional glue method. Furthermore, by flattening the first superconductor electrode 12 and the fourth insulator layer 23, the first
Insufficient step coverage in the pattern edges and edges of the first superconductor electrode 12 as shown in the figure can be resolved, thereby preventing the occurrence of short circuits and weak coupling portions.

(Concrete example) Next, the present invention will be explained in detail.

Silicon (Si) whose surface is coated with thermally oxidized SiO2
On the substrate (11), a Nb film (12) is deposited to a thickness of 200X by electron beam evaporation at a substrate temperature of 300°C. Subsequently, in the same apparatus, using an argon (Ar)-02 mixed gas containing 2 g of oxygen (,02)'r, a total pressure of 1
x I F2Torr, N at cathode voltage -170v
b Plasma oxidize the entire surface of the film for 10 minutes to form a 20-30x niobium oxide (Nb205) film (15)e. After this, a Pb film (21) is continuously vapor-deposited at room temperature to a thickness of 2000x. After forming a resist mask 22 with a film thickness of 1.5 μm on this film by a normal photoresist process using a positive type photoresist (AZ 1350J manufactured by 7 Tsupre-Ichi Co., Ltd.),
At'
+ Freon 13 (OF, ) and PbC21), respectively
Nb/Nb20ff (15) Fully continuous machining, 1st
form a superconductor electrode pattern. Next, 5in (23) i22soX was deposited on the entire surface of the substrate by electron beam evaporation.
The resist 22 is lifted off by ultrasonic cleaning in acetone. Next, after patterning the entire resist mask 24 with a diameter of 1.5 μm and a film thickness of zoooX at the location on the three-layer film 12゜15.21 that will become the tunnel barrier, the Pb film ( 21
) is completely removed to form a second superconductor electrode pattern. This etching condition is Ar pressure 2 x 10-
' Torr, acceleration voltage 5oov, current density 0.9 m
A/cm2.

Since the etching rate ratio of Pb to 8i0 is 7.5, as is clear from equation (1), the first insulating layer 2
3 is approximately 250X work. As a result, the film thicknesses of the first superconductor electrode 12 and the first insulator layer 23 are both 20
Complete flattening is achieved with ooX.

Next, 8i0 (25
) and lift off the resist mask 24.

After sputter cleaning the surface of this substrate with iAr, 3ooo
A third superconductor electrode 26 made of a Pb film of X is formed.

According to this manufacturing method, when patterning the second superconductor electrode 21, the etching rate ratio of Pb to AZ1350J is as large as 13 to 14, and anisotropic etching is possible. There is almost no change in the pattern dimensions of the barrier section. In addition, Pb is a superconductor electrode, Nb is a base insulating layer 5in2
Since the etching rate ratio is large, 13 to 14 and 7 to 8, respectively, selective etching of Pb is possible.

In this specific example, the process of forming up to the third superconductor electrode has been described, but by repeating exactly the same method, steps in a multilayer device can be further eliminated. Furthermore, although a case has been described in which Nb i is used as the first superconductor electrode 12 and Pbi is used as the second and third superconductor electrodes 21.26, Nb compounds,
Similar results can be obtained with Pb alloys. Further, Nb or a Nb compound can also be used for the third superconductor electrode 26. In addition to the oxidized layer on the surface of the first superconductor electrode 21, the tunnel barrier layer 15 may include an insulator layer formed by deposition, a metal layer, and a semiconductor layer when the tunnel barrier layer 15 is oxidized. Although AZ1350J was used as a mask to form the entire tunnel barrier section, other organic resists could also be used.

Inorganic resists can also be used. Furthermore, in the ion etching method, since Pb has a very high etching rate ratio compared to the electron beam resist, the electron beam resist is effective for processing fine patterns of about 1 μm.

(Effects of the Invention) As described above, according to the present invention, since the tunnel barrier portion is formed by anisotropic etching, all Josephson junction elements having tunnel barrier portions with high dimensional accuracy can be manufactured. In addition, since the step can be completely eliminated, problems such as insufficient step coverage and the occurrence of short circuits and weak connections due to gaps can be solved.

[Brief explanation of the drawing]

FIGS. 1(a) to (f) are cross-sectional views explaining the conventional Josephson junction device manufacturing method in order of all steps, and FIGS. 2(a) to (f)
i) is a sectional view of an element explaining an example of the present invention in the order of steps; In the figure, 11...Substrate, 12...First superconductor electrode, 13.22.24.Old...Resist mask, 1
4... Insulator layer, 15... Tunnel barrier layer, 16.21... Second superconductor electrode, 2
3...First insulator layer, 25...Second
Insulator layer, 26...Third super Figure 7 (ct)

Claims (1)

[Claims] Three layers: a first superconducting electrode in a predetermined pattern made of Nb or a Nb compound on a substrate, a tunnel barrier layer on this first superconducting electrode, and a second superconducting electrode made of Pb or a Pb alloy on this tunnel barrier layer. A first step of continuously forming a film, and covering the three-layer film with a resist mask, depositing a first insulating layer having the same thickness as the second superconducting electrode, and removing the resist mask. In the second step, an etching mask is formed at a portion of the second superconducting electrode that will become a tunnel barrier portion, and a second etching mask is formed at a portion other than this etching mask.
a third step of etching and etching the superconducting electrode portion of the second superconducting electrode, and depositing a second insulating layer so as to fill the etched portion of the second superconducting electrode and the first insulating layer; and a fifth step of depositing a third superconducting electrode on the second insulator layer including a portion that contacts the second superconducting electrode. A method for manufacturing a Josephson junction element, characterized by: