JPS58209183A - Manufacture of josephson junction element - Google Patents

Abstract

PURPOSE:To eliminate the contamination generating when an insulative layer is formed by flattening the region in the vicinity of the junction part of the titled element by a method wherein an anisotropic etching is performed on the part other than the tunnel junction part which constitutes the junction element, thereby enabling to properly specify the dimensions of the junction part and to prevent the contamination caused by etching. CONSTITUTION:The first superconductive electrode 32 consisting of Nb of prescribed measurements and the second superconductive electrode 33 consisting of Pb are formed by lamination on an insulative substrate 31, and a resist mask 34 is provided on said electrode 33 corresponding to the turnnel junction part. Then, an anisotropic etching is performed using said resist mask 34 as a mask, and first, the exposed part of the electrode 33 is removed, and then an insulative layer 35 of SiO2 and the like is coated on the whole surface. Through these procedures, the material for the electrodes 32 and 33 can be specified, and this enables to easily control the depth of the etching. Subsequently, the mask 34 is removed together with the layer 35 located above the mask 34, a tunnel junction layer 36 of several tens Angstrom is generated by performing thermal oxidation on the tunnel junction layer, and an upper superconductive electrode is coated on the surface of the layer 36 and 35.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a Josephson junction device, and more particularly to a method of manufacturing a tunnel junction type Josephson junction device.

When constructing physical circuits or memory circuits using Josephson junction elements, it is necessary to reduce or eliminate variations between each element in the critical current of the tunnel junction, that is, the maximum direct current that flows in a zero voltage state. . The critical current changes depending on the area of the tunnel junction, the film thickness of the tunnel junction, and the physical properties, but in recent years, as elements have become smaller and more dense, technology that improves the accuracy of the area of the tunnel junction is especially important. It becomes.

Conventionally, the following two methods have been used to manufacture Josephson junction elements. First, the first method will be explained using FIGS. 1(a) to 1(f). 1st
As shown in FIG. A superconductor electrode 12 is formed. Patterning of the first superconductor electrode 12 is performed by an etching method using a normal photoresist process or a v7) off method.
As shown in Figure (b) K, an undercut-shaped resist mask 13 is formed on the portion of the first superconductor electrode 12 that will become the tunnel junction, and as shown in Figure 1 (c), it is deposited on the substrate surface. Nitric acid monomer (
An insulating layer 14 made of silicon dioxide (SiO+), silicon dioxide (SiO+), etc. is deposited, and when it is continuously lifted off, the structure shown in FIG.
) is formed. The undercut-shaped resist mask 13 is obtained by not only a normal photoresist process but also by immersion in a Ti'Rm agent such as chlorobenzene or bromobenzene before or after exposure. Next, as shown in FIG. 1(e), a tunnel junction layer 15 with a thickness of several 10X is formed at the tunnel junction by thermal oxidation or plasma oxidation. After this, as shown in FIG. 1(f), the first superconductor electrode 1
As in case 2, the second superconductor electrode 16 is formed by vapor deposition or sputtering.

This method requires a resist mask 13 with an a/darker/top shape to form a tunnel junction, but this shape is influenced by resist pre-baking conditions, organic solvent liquid temperature, r' pump time, etc. Easy to accept.

In particular, it is extremely difficult to accurately obtain the method for the lower part of the resist mask that defines the area of the actual tunnel junction.
Furthermore, since the tunnel junction is located at a lower position than the surrounding insulating layer 14, there is a drawback that it is contaminated by adhesion of the insulating layer 14 sputtered during plasma cleaning or plasma area ratio. The second conventional method is shown in Figure 2(a).
-ge) will be used to explain. As shown in FIG. 2(a), a first superconductor electrode 22 is formed on the substrate 21 in the same manner as in FIG. 1(a). Thereafter, as shown in FIG. 2('b), the entire surface of the substrate is coated with Sin and St by evaporation or sputtering.
An insulator layer 23 made of OW or the like is deposited. Next, see Figure 2 (
c) After forming a resist mask 24 having an opening for forming a tunnel junction on the insulating layer 23 as shown in K, an ion etching method using an oil-free gas such as argon (Ar) or a fluorocarbon 23 ( CHF3).

The insulator layer 23 is processed by a reactive sputter etching method using an etching gas such as Freon 14 (OF, ),
A tunnel junction as shown in FIG. 2(d) is formed.

Next, as shown in FIG. 2(e), a tunnel junction layer 25 of several tens of times is formed on the tunnel junction in the same manner as in FIG. 1(e).
Thereafter, a second superconductor electrode 26 as shown in FIG. 2(f) is formed using the same electrode material and film forming method as in the case of the first superconductor electrode 22. In this method, since the insulator layer 23 at the tunnel junction is removed by ion etching or reactive spanner etching, the electrode surface at the tunnel junction is damaged by ions. In the case of reactive sputter etching methods, the electrode surface is contaminated by a reactive etching gas. Also, this method, like the first method, has the disadvantage that the tunnel junction is contaminated by the adhesion of the insulator layer 23 during plasma cleaning or plasma oxidation.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a Josephson junction device that eliminates these conventional drawbacks.

According to the present invention, a lower superconductor electrode and a tunnel junction layer on one surface of the lower superconductor electrode are disposed on a substrate, and the tunnel junction layer faces the lower superconductor electrode via the tunnel junction layer. A method for manufacturing a Josephson junction device having an upper superconductor electrode includes a first superconductor electrode as a lower superconductor electrode on a substrate and selective etching with respect to the first superconductor electrode. a step of forming a two-layer electrode consisting of a second superconductor electrode, then forming a resist mask in a region that will become a tunnel junction on the second superconductor weight l; A step of etching away the conductor electrode, followed by a step of depositing and lifting off an insulating layer to fill the etched portion of the second superconductor'&pole; A method for manufacturing a Josephson junction device is obtained, which comprises the steps of forming a junction layer, and then forming the upper superconductor electrode in contact with the tunnel junction layer.

The basic process of the present invention will be explained below with reference to the drawings.

As shown in FIG. 3(a), an insulating substrate or a substrate 31 having an insulating layer on the surface thereof is etched with a first superconductor electrode 32 by vapor deposition or sputtering. A two-layer electric trough is formed with a second superconductor electrode 33 having a high velocity. A superconductor such as Nb or Pb is used as the electrode material, and the combination of the first superconductor electrode 32 and the second superconductor electrode 330 depends on the etching method used when forming the tunnel junction. Patterning of the two-layer electrode is performed by an etching method or a lift-off method using a normal resist process. Next, as shown in FIG. 3(b), a cyst mask 34 is formed on the part of the second superconductor electrode 33 that will become the 1-channel junction, and then a cyst mask 34 is formed on the second superconductor electrode 33 as shown in FIG. 3(c). The second superconductor electrode 33 is etched away using an anisotropic etching method such as reactive sputter etching or iono etching. At this time, the etching depth can be easily controlled by selecting the electrode material and etching method so that the second superconductor electrode 33 is etched selectively with respect to the first superconductor electrode 32. . Next Km Figure 3 (d)
As shown in Figure 5, Sin, 5i02, is deposited on the substrate surface using a film formation method with good directionality such as & deposition method or ion beam sputtering method.
An insulator layer 35 made of, etc. is deposited. resist mask 34
After the 7-off process, the tunnel junction is thermally oxidized or plasma oxidized to form a tunnel junction layer 36 of several tens of amps as shown in ')' + 31"l Cej +'. After this, the third f'J ( f), the -L portion of the superconductor electrode 37 is formed by vapor deposition or sputtering in the same way as in the case of the first and second superconductor electrodes 32 and 33. In this method, the tunnel darkening portion Because a rectangular resist mask with good reproducibility can be used for forming the etching process, and by optimizing the etching method and etching conditions, highly accurate pattern transfer from the resist mask 34 to the second superconductor electrode 33 is possible. A method using the lift-off method (Fig. 1)
It is easier to control the dimensions of the tunnel junction. Further, since the tunnel junction is defined by the contact portion with the resist mask, a tunnel junction with higher precision can be obtained than in the conventional method using etching (FIG. 2).

Furthermore, since the tunnel junction is not exposed to the etching atmosphere, there is no problem of damage to the surface or contamination by reactive etching gas. Furthermore, by flattening the tunnel junction and the insulator layer 35 in the circumferential recess, the insulator layer 35 generated during plasma cleaning and plasma oxidation can be removed.
contamination of tunnel junctions due to

Next, one embodiment of the present invention will be shown.

Trap silicon (si') whose surface is coated with thermally oxidized Sin
On the substrate, Nbl1!2000A is continuously deposited by electron beam evaporation at a substrate humidity of 300°C and 2000λ of gold-particle-indium alloy (Au-Pb-In) at 120°C.

A positive photoresist (AZ manufactured by Nnopre Co., Ltd.) is applied on this film.
A resist mask is formed using a normal photoresist process using 1350 J), and Nb is etched using an ion etching method using argon (Ar) as an etching residue.

The two-layer Pb film is processed to form a lower superconductor electrode. Next, place a diameter of 2 mm on the part that will become the tunnel junction on this electrode.
μm After forming a resist mask with a film thickness of 15 μm, A
The Pb film is etched away by an ion etching method using r. AZ1350J.

The etching rate ratio of the Pb film to the Nb film is 1.
1.15, the Pb film can be selectively etched without causing pattern dimension changes with respect to the resist mask.Next, after depositing SiO at 2000'A on the entire surface of the substrate by electron beam evaporation, The resist mask is lifted off by ultrasonic cleaning in acetone. 15 Next, a resist mask with an undercut shape is formed on the substrate using chlorobenzene treatment. After plasma cleaning of this substrate in an Ar atmosphere, 7 A 20 to 30X thick bonding layer is formed using the plasma oxidation method.Subsequently, a lead-bismuth alloy (P
b-Bi) 6000! Deposit L and lift off to form the upper superconductor electrode.

In this example, the case where Nb and Au-Pb-In are used as the first superconductor electrode and the second superconductor electrode, respectively, is explained, but other superconductors may be used depending on the etching method and etching residue selection. Any combination of bodies is possible.

Although Pb-B1 was used for the upper electrode, other superconductor materials may also be used.

Needless to say, the etching method can be applied to this buttering. In addition, in this embodiment, a resist mask for forming a tunnel junction and 1. AZ1350J
However, other organic resists, inorganic resists, and even more etching-resistant metal masks formed by inversion of these resists can also be used.

As explained above, according to the present invention, since the tunnel junction is defined by anisotropically etching the portion other than the tunnel junction, it is possible to obtain a tunnel junction with high precision and without contamination due to etching. . Furthermore, since the area near the tunnel junction can be flattened, contamination of the tunnel junction caused by sputtering of the surrounding insulator layer during plasma cleaning or plasma oxidation can be reduced.

[Brief explanation of the drawing]

FIGS. 1(a)-(f), FIGS. 2(a),-(f) are device cross-sectional views for explaining the conventional Josephson junction device manufacturing method in the order of steps, and FIGS. 3(a)-(f). (f) is a cross-sectional view of the device at the main steps for explaining the method for manufacturing the Josephson junction device of the present invention. In the figure, 11, 21, 31 are the substrate, 12, 22 are the lower superconductor electrodes, 13, 24, 34 are resist masks, 14, 23, 35 are insulator layers, 15, 25, 36 are tunnel junction layers , 16,26°37 is the upper superconductor 'K
M, 32 is a first superconductor electrode, and 33 is a second superconductor electrode. Length - Male 1 figure

Claims (1)

[Claims] A lower superconductor electrode on a substrate, a tunnel junction layer on one surface of the lower superconductor electrode, and an upper superconductor facing the lower superconductor electrode via the tunnel junction layer iii. In a method of manufacturing a Josephson junction device having an electrode, a first superconductor electrode is formed on a substrate as a lower superconductor electrode, and a first superconductor electrode is selectively etched with respect to the first superconductor electrode. 21m consisting of 2 superconductor electrodes
'ti pole forming step, then the second superconductor Vt
After forming a resist mask in the region that will become the tunnel junction on w, the second superconductor electrode is removed by etching, and then an insulator layer is deposited and lifted off to form the second superconductor electrode. burying the etched portion of the body electrode, then forming the tunnel junction layer at the tunnel junction, and then forming the upper superconductor electrode so as to be in contact with the tunnel junction layer. A method for manufacturing a Josephson junction element, characterized by: