JPS60207396A - Circuit substrate - Google Patents

Circuit substrate

Info

Publication number
JPS60207396A
JPS60207396A JP6348184A JP6348184A JPS60207396A JP S60207396 A JPS60207396 A JP S60207396A JP 6348184 A JP6348184 A JP 6348184A JP 6348184 A JP6348184 A JP 6348184A JP S60207396 A JPS60207396 A JP S60207396A
Authority
JP
Japan
Prior art keywords
protective film
substrate body
ceramic
filler
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6348184A
Other languages
Japanese (ja)
Other versions
JPH0365672B2 (en
Inventor
豊 巽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP6348184A priority Critical patent/JPS60207396A/en
Publication of JPS60207396A publication Critical patent/JPS60207396A/en
Publication of JPH0365672B2 publication Critical patent/JPH0365672B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 この発明は配線基板に関する。[Detailed description of the invention] The present invention relates to a wiring board.

配線基板において、その基板本体にアルミナセラミック
のよらなセラミックを用b1その表面に厚膜又は薄膜に
よって1線を形成し、併せて適当な回路素子を形成又は
装填するよりにし+本のけよ(知られてbる。そしてこ
れらの配線を保護するために耐摩耗性、耐酸化性のよら
な膜で基板本体の表面をコーティングするとと本知られ
ている。
In a wiring board, the main body of the board is made of a ceramic such as alumina ceramic, and one line is formed on its surface with a thick or thin film, and appropriate circuit elements are formed or loaded. It is known that the surface of the substrate body is coated with a wear-resistant and oxidation-resistant film to protect these wirings.

ところでこのよう々保護膜は普通スパッタリング或−け
蒸着により薄膜に形成される。しかじ前記のよりに基板
本体としてセラミックを用いるとき、その表面の影響を
受けて薄膜の緻密性雀低下することがある。第1図はセ
ラミック性の基板本体Aの表面に、薄膜Bを形成したと
きの拡大断面図を示したもので一周知のようにセラミッ
クの表面は、セラミックの粒径(l−1111m程11
1”)に応じた凹凸カr無数に存在して−る。このより
な表面にスパッタ等により膿を成長させてい(と−この
凹凸の影響を受けて、微細な隙間CB各凹凸の境附近か
らのびるよりに発生する。すなわち膜材料の結晶は互い
に連続しないようになるのである。
By the way, such a protective film is usually formed into a thin film by sputtering or vapor deposition. However, as mentioned above, when ceramic is used as the substrate body, the density of the thin film may be reduced due to the influence of its surface. Figure 1 shows an enlarged cross-sectional view of a thin film B formed on the surface of a ceramic substrate body A. As is well known, the surface of the ceramic has a particle size of about 11
1") There are countless uneven surfaces. Pus grows on this smooth surface by sputtering, etc. Under the influence of these uneven surfaces, minute gaps CB are formed near the boundaries of each uneven surface. In other words, the crystals of the film material become discontinuous with each other.

そのため成#螢、環境試験なり水分の多す個所に放置し
て訃(と、この隙間Cを通って水分雀基板本体Aの表面
に到達することがある。この水分によって基板本体A上
の配線等が浸食されてしtqよりKなる。
Therefore, if a growing firefly is left in a place with a lot of moisture, such as during an environmental test, it may pass through this gap C and reach the surface of the board A.This moisture may cause the wiring on the board A. etc. are eroded and become K from tq.

この発明はセラミック製の基板本体に保護膜を形成する
場合の耐食性の向上を図ることを目的とする。
An object of the present invention is to improve corrosion resistance when a protective film is formed on a ceramic substrate body.

この発明は薄膜状に成膜された保護膜の表面を。This invention applies to the surface of a protective film formed in the form of a thin film.

保護膜中の微細な隙間に浸透可能な充填剤で被覆したこ
とを特徴とする。
It is characterized by being coated with a filler that can penetrate into the minute gaps in the protective film.

この発明の実施例を図によって説明する。図はこの発明
をサーマルプリントヘッドに適用した場合の実施例を示
す。第2図はとのサーマVプリントヘツFの製造工程を
順次水したもので、まず基板本体lとしてアルミナセラ
ミック製のものを用い、その表面にグレーズからなる突
出部2を設ける(第2図A)。つbで基板本体1.突出
部2の表面にプリント用の発熱抵抗層8を、及びその表
面に通電用の導電層4を形成してからホトエツチング工
程により所定のパターンどおりにパターニングする。図
中8Aは発熱部、4Aけ発熱部8Aへの通電部であるC
第2図B)。このあと基板本体lの表面に保護膜すを形
成する(11.2図C)。
Embodiments of the invention will be described with reference to the drawings. The figure shows an embodiment in which the present invention is applied to a thermal print head. Figure 2 shows the manufacturing process of the Therma V print head F. First, an alumina ceramic substrate is used as the substrate body l, and a protrusion 2 made of glaze is provided on its surface (Figure 2A). . Board body 1. A heating resistor layer 8 for printing is formed on the surface of the protrusion 2, and a conductive layer 4 for electricity supply is formed on the surface thereof, and then patterned into a predetermined pattern by a photo-etching process. In the figure, 8A is the heat generating part, and C is the energizing part for the 4A heat generating part 8A.
Figure 2B). After this, a protective film is formed on the surface of the substrate body 1 (FIG. 11.2C).

保護膜は導電層4の表面を含む全表面を覆りが。The protective film covers the entire surface including the surface of the conductive layer 4.

導電層4のらち外部に接続される端部すなわち外部端子
6(第8図参照)の設着領域は除外される。
The end portion of the conductive layer 4 that is connected to the outside, that is, the area where the external terminal 6 (see FIG. 8) is provided is excluded.

以上の構成は従来のこの種サーマルプリントヘッドと大
差はな−。そして成膜された保護膜5にはセラミック製
の基板本体の表面の凹凸に影響されて微細な隙間光発生
すること≠!避けられなりことけ、すでに述べたとおり
である。なお基板本体の表面と保護膜との間に別の膜(
たとえば耐酸化p111)が介在して−るような場合で
本、保護膜は基板本体の凹凸の影響を受けて隙間は発生
する、保護膜5としてはたとえば耐摩耗性が要求される
場合、五酸化タンタルが適当で、又その膜厚に′i1〜
5μm程廖である。
The above configuration is not much different from conventional thermal print heads of this type. Furthermore, in the formed protective film 5, light is generated in minute gaps due to the unevenness of the surface of the ceramic substrate body! As already stated, it can be avoided. Note that another film (
For example, in the case where an oxidation-resistant P111) is present, the protective film will be affected by the unevenness of the substrate body and gaps will occur.For example, if the protective film 5 is required to have wear resistance, Tantalum oxide is suitable, and its film thickness is
It is about 5 μm thick.

保護膜す内の隙間の存在をな(すため、この発明では、
この隙間に浸透可能な充填剤で保護膜すの表面を被覆す
る(第2図D)。フけその被覆層を示す。充填剤として
Fi隙間への浸透に十分な流動性を有する樹脂が適当で
ある。サーマルプリントヘッドに適用する場合−被覆層
7もsob以上の高温下にさらされるので一耐熱性の樹
脂づヨ望ましく、具体的にはポリイミド、テフロン等が
好適である、これらを印刷等により塗布すればよL/−
h。
In order to compensate for the existence of gaps in the protective film, in this invention,
The surface of the protective film is coated with a filler that can penetrate into this gap (FIG. 2D). The dandruff coating layer is shown. As a filler, a resin having sufficient fluidity to penetrate into the Fi gap is suitable. When applied to a thermal print head - since the coating layer 7 is also exposed to high temperatures higher than SOB, it is desirable to use a heat-resistant resin. Specifically, polyimide, Teflon, etc. are preferred, and these can be applied by printing, etc. Bye L/-
h.

又ポリイミドを使用する場合−その前駆体を塗布して赤
ら、所要の個所をエツチング除去したあと。
When polyimide is used, its precursor is applied and the required areas are etched away.

キュアーするよらにしてもよい。なおこの充填剤以上の
よりにして充填剤7で保護pJbの表面を覆りと、この
充填剤7が保護膜す内の微細なVim。
You can also cure it. Furthermore, if the surface of the protective pJb is covered with the filler 7 with a strength greater than this filler, this filler 7 will cause fine Vim inside the protective film.

に浸透し、この隙間を埋めてしまう7したがって以後こ
の隙間を水分等値I浸入することカよな(、そのため基
板本体上の2gw層0回路素子等例水分により浸食され
ないよりになる。なお被覆層7の膜厚としては05〜5
μmで十分である。
Therefore, it is impossible for moisture to penetrate into this gap from now on (therefore, the 2gw layer 0 circuit elements on the board body will not be eroded by moisture. The thickness of layer 7 is 05 to 5.
μm is sufficient.

以上詳述したよりにこの発明により、基板本体をセラミ
ック製とし、その表面に保護膜を成膜した場合でも、そ
の表面をfに充填剤で被覆することにより、保護膜内の
結晶の不連続性による隙間を充填したので、この隙間に
よる浸食を確実に防止でき、耐食性を向上させることが
できると−った効果を奏する。
As described in detail above, according to the present invention, even when the substrate body is made of ceramic and a protective film is formed on the surface thereof, by coating the surface with a filler, it is possible to prevent discontinuity of crystals within the protective film. Since the gaps due to corrosion are filled, corrosion due to the gaps can be reliably prevented and corrosion resistance can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は基板本体と保護膜との臆面にかける拡大断面図
−第2図はこの発明の実施例を示す製作工程の断面図、
第8図は同斜視図である。 1・・・・・・基板本体、4A・・・・・・通電部、5
・・・・・・保護膜。 7・・・・・・被覆層
FIG. 1 is an enlarged cross-sectional view of the substrate body and the protective film; FIG. 2 is a cross-sectional view of the manufacturing process showing an embodiment of the present invention;
FIG. 8 is a perspective view of the same. 1... Board main body, 4A... Current carrying part, 5
······Protective film. 7...Coating layer

Claims (1)

【特許請求の範囲】[Claims] 表面に配MI−hIバターニンゲされであるセラミック
製の基板本体の表面を、薄膜の保護膜で覆ってなる配線
基板にお込て、前記保護膜内の、結晶の不連続による隙
間に浸透し得る流動性をもつ充填剤からなる被覆層を前
記保護膜の表面に設けて々る配線基板。
The surface of a ceramic substrate main body having a MI-hI butter coating on the surface is covered with a thin protective film, and the wiring board is made of a ceramic material. A wiring board in which a coating layer made of a fluid filler is provided on the surface of the protective film.
JP6348184A 1984-03-31 1984-03-31 Circuit substrate Granted JPS60207396A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6348184A JPS60207396A (en) 1984-03-31 1984-03-31 Circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6348184A JPS60207396A (en) 1984-03-31 1984-03-31 Circuit substrate

Publications (2)

Publication Number Publication Date
JPS60207396A true JPS60207396A (en) 1985-10-18
JPH0365672B2 JPH0365672B2 (en) 1991-10-14

Family

ID=13230468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6348184A Granted JPS60207396A (en) 1984-03-31 1984-03-31 Circuit substrate

Country Status (1)

Country Link
JP (1) JPS60207396A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246401A (en) * 2003-09-26 2009-10-22 Medtronic Minimed Inc Method of forming highly reliable multi-layer circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS504391A (en) * 1973-05-16 1975-01-17
JPS5846079A (en) * 1981-09-12 1983-03-17 Santen Pharmaceut Co Ltd Ether having benzothiazoline ring

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS504391A (en) * 1973-05-16 1975-01-17
JPS5846079A (en) * 1981-09-12 1983-03-17 Santen Pharmaceut Co Ltd Ether having benzothiazoline ring

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246401A (en) * 2003-09-26 2009-10-22 Medtronic Minimed Inc Method of forming highly reliable multi-layer circuit board

Also Published As

Publication number Publication date
JPH0365672B2 (en) 1991-10-14

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