JPS60206350A - Code regenerating circuit - Google Patents

Abstract

PURPOSE:To design and manufacture easily a titled circuit, and also to make it endurable for use with respect to transmission line distortion by providing a branching circuit of an inputted frequency modulated wave, a detector, a demodulating signal branching circuit, a gate device, a detector and a buffer amplifier. CONSTITUTION:A decoding signal D (figure a) of a discriminator 1 is inputted to a code deciding device 2, and on the other hand, inputted to one input of a gate device 6 for fetching only a necessary part of the signal D. A signal existing state is detected by a detector 4, and a detecting signal is inputted to the other input of the gate device 6. An output of the gate device 6 is inputted to an integrator 8. Its average signal voltage is inputted to a buffer amplifier 9, and an output voltage of a figure (d) is inputted as a polarity decision identifying voltage to the code deciding device 2. In this state, in case the output voltage of the frequency discriminator 1 generates an offset DELTAV of DC, the DELTAV is detected by the gate device 6, the integrator 8 and the amplifier 9, and becomes the polarity decision use discriminating voltage of the code deciding device 2, therefore, the optimum polarity can always be decided. Also, since said polarity decision identifying voltage is obtained, an influence of a noise signal can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a code regeneration circuit for frequency modulation of digital signals. In particular, it concerns a frequency discriminator with high stability when modulating a frequency modulated wave with a small modulation index, and it concerns a circuit that can perform optimal sign determination even in a system under adverse conditions affected by transmission line distortion and external noise. It is.

[Description of prior art]

To demodulate a frequency modulated wave of a system with a small modulation index, the frequency discriminator must have a narrow bandwidth, high demodulation sensitivity, and highly stable characteristics with no offset due to temperature or manufacturing errors. It is extremely difficult to keep the temperature fluctuation of the DC component of the device as small as possible. In the conventional technology, as a countermeasure for this, in order to suppress the DC fluctuation, a DC open Ichikawa content 4 no is inserted into the frequency discriminator output.
This prevents fluctuations in the optimum judgment voltage. However, this circuit was only 11 inches long when reproducing burst signals, and had many problems.

FIG. 1 shows the output voltage of frequency discrimination 2) when noise is applied. In Fig. 1, when the sound spectrum NS of 1!1 is applied, the average voltage of the frequency discriminator output is "0"; however, when the noise spectrum NS is applied, the frequency discriminator This causes an offset in the average voltage of the device output.

The receiving device is equipped with a bandpass filter that limits the band in order to prevent saturation due to noise in the frequency discriminator. However, due to temperature fluctuations, etc., the frequency characteristics of this bandpass filter fluctuate, causing the above-mentioned frequency DC fluctuations will occur in the output voltage of the discriminator.

FIG. 2 shows the state of the output signal of the frequency discriminator in the burst signal. FIG. 2 is an output signal waveform diagram when the noise spectrum is offset from the center frequency of the frequency discriminator due to transmission path band limitation. In Figure 2,
N represents noise and D represents demodulated signal.

FIG. 3 is a waveform diagram of the DC component of the output signal.

In FIG. 3, -Δ■ indicates the offset of the DC voltage.

FIG. 4 is a waveform diagram of the output signal η when a DC blocking capacitor is inserted into the output signal of the frequency discriminator shown in FIG. 2. In FIG. 4, the broken line indicates the optimal sign determination voltage, A differential effect appears due to the fact that the demodulated signal is blocked by a DC component using a capacitor, and this causes deterioration in the leading and trailing parts of the burst signal. Furthermore, if there is a continuous 11'' signal or a continuous 0 signal in the demodulated signal, a differential effect appears on this DC component, causing deterioration. If the capacity of the capacitor is increased to suppress this deterioration, the capacitor will follow the DC fluctuations of the human input signal, so there is no point in including the capacitor. therefore,
There are also drawbacks, such as the fact that there are limits to reducing the differential effect as described above.

[Purpose of the invention]

The present invention eliminates the above-mentioned drawbacks, and when demodulating a frequency modulated wave with a small modulation index, the frequency discriminator does not need to be highly stabilized, and the bandpass filter has a high stability with respect to temperature. It is an object of the present invention to provide a code regeneration circuit that does not require advanced technology, is easy to design and manufacture, and can withstand use under adverse conditions affected by transmission line distortion and noise.

[Features of the invention]

The present invention provides a frequency modulation type code regeneration circuit for digital signals, which includes a frequency discriminator that demodulates an input digital frequency modulated wave, and a determiner that determines the polarity of the demodulated signal from the frequency discriminator. , a first branching means for branching the input frequency modulated wave, a detection means for detecting the presence or absence of a received signal from the output signal of the first branching means, and a demodulated signal from the frequency discriminator. a second branching means for branching; an AND gate means for inputting the output signal from the second branching means and the detection output of the detection means; and an integrating means for integrating the output signal from the AND gate means; It is characterized by comprising buffer amplification means which receives the output signal voltage from the integration means as an input and whose output is connected to the polarity determination identification value input of the determination device.

[Explanation based on examples]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 5 is a block diagram of a code reproducing circuit according to an embodiment of the present invention. In FIG. 5, a frequency modulated wave is input to a frequency discriminator 1 and demodulated. The demodulated signal is input to a sign determiner, and the polarity of the signal is determined.

Here, the feature of the present invention lies in the polarity determination identification voltage generation portion surrounded by the dashed line. That is, the output of the branch circuit 3 into which the frequency modulated wave is input is connected to the frequency discriminator 1, the branched output is connected to the detector 4, and the presence or absence of the signal is detected in the detector 4. frequency discriminator l
The demodulated signal is connected to a branch circuit 5, the output of the branch circuit 5 is connected to one of the input terminals of the sign determiner 2, and the branched output is connected to one input terminal of the gate device 6 and one terminal of the resistor 7. Connected. A detection signal from the detector 4 is connected to another input of the gate device 6 when the detection signal is in the receiving state. The output from the gate device 6 and the other terminal of the tit resistor 7 are connected to an integrator 8. The average signal voltage obtained by integration from the integrator 8 is connected to a buffer amplifier 9. Buffer amplifier 9
The output from the above is inputted to the sign determiner 2 as the identification voltage for polarity determination, and the sign determiner 2 outputs the determination result.

The operation of the code reproducing circuit having such a configuration will be explained. FIG. 6 is a diagram showing the frequency output voltage characteristics of the frequency discriminator in the code reproducing circuit of the present invention, and the frequency discriminator l shown in FIG. Indicates the condition that has occurred. FIG. 7 is a diagram illustrating signal waveforms of the code reproducing circuit of the present invention. In FIG. 5, the frequency modulated wave is detected by a frequency discriminator 1 to obtain a demodulated signal (not shown in FIG. On the other hand, a branch circuit 5 is connected to one input of the gate device 6 for extracting only the necessary part of the burst-like demodulated signal.
It is branched at and input. Other inputs of the gate device 6 include
The input frequency modulated wave is branched by the branch circuit 3, a signal presence state is detected by the detector 4, and the detection signal shown in FIG. 7(b) is input. C
A signal with the waveform shown in 1 is output. This output signal is input to an integrator 8 for integrating to obtain an average signal voltage.

The average signal voltage from the integrator 6 is input to the buffer amplifier 9, and the output voltage from the buffer amplifier 9 having the waveform shown in FIG.

Here, when the output voltage of the frequency discriminator 1 generates a DC voltage offset ΔV, the offset Δ■ is detected by the gate unit 6, the integrator 8, and the amplifier 9, and the sign discriminator 2
Since the identification voltage for polarity determination is , it is possible to always perform optimal polarity determination.

Furthermore, since the identification voltage for polarity determination can be obtained from the average component voltage of only the signal portion from the gate device 6,
It is possible to eliminate the influence of noise signals due to transmission path band limit fluctuations as described above.

Note that if there is no initial reception signal, the gate I/unit 6 remains open, so the polarity and the identification voltage for judgment will deviate significantly, and from this state, the average signal voltage from the integrator 8 will be When detecting , the response time becomes longer and the error becomes larger, resulting in deterioration.

To prevent this, a resistor 7 is inserted and a gate device 6
Even if is open, the noise N can pass through this resistor 7 to obtain the average voltage E from the integrator 8 shown in FIG. It becomes possible. The value of the resistor 7 is selected to be sufficiently larger than the conduction resistance of the gate device 6. Therefore, when a burst signal is received, by closing the gate device 6 at a predetermined position, it is possible to obtain an optimal sign determination signal. In addition, gate 3! Detector 4 is used to control it6.

〔Effect of the invention〕

As explained above, according to the present invention, by providing an input frequency modulated wave branch circuit, a detector, a demodulated signal branch circuit, a gate device, a detector, and a buffer amplifier, the frequency discriminator does not need to be highly stabilized. In addition, the design does not require advanced technology regarding stability with respect to temperature of the bandpass filter on the receiving side.
This has the excellent effect of facilitating manufacturing. Furthermore, since it is resistant to transmission line distortion, it has the advantage of being able to withstand use under adverse conditions.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the output voltage of a frequency discriminator when noise is applied. FIG. 2 is a waveform diagram of the output signal of the frequency discriminator when a burst signal is input and the noise spectrum is offset from the center frequency due to the transmission line band limit. FIG. 3 is a waveform diagram of the DC component of the output signal. FIG. 4 is a waveform diagram of output signal No. 0 when a DC blocking capacitor is inserted into the output signal of the frequency discriminator shown in FIG. 2. FIG. 5 is a block diagram of a code reproducing circuit according to an embodiment of the present invention. FIG. 6 is a diagram showing the frequency output voltage characteristics of the frequency discriminator in the sign η regeneration circuit of the present invention. Is Fig. 7 of the present invention? 1-) Waveform diagram of 11 of the birth circuit. 1... Frequency discriminator, 2... Sign determiner, 3.5.
... Branch circuit, 4... Detector, 6... Gate I, device,
7...11 (1 unit, 8... Integrator, 9... Buffer amplifier, C...11 appropriate sign determination voltage, D... Demodulated signal, [...:... If( b'+: Average low of noise obtained through the instrument, N...Ill sound, NS...Bow'1
One note spectrum. Patent attorney representing patent applicant Nao Takashi Tsukide 1 M 1 Figure

Claims (1)

[Claims] (11) Code regeneration using a frequency modulation method for digital signals, comprising a frequency discriminator that demodulates a digital frequency modulated wave input by a person, and a determiner that determines the polarity of the demodulated signal from the frequency discriminator. The circuit includes a first branching means for branching the input frequency modulated wave, a detection means for detecting the presence or absence of a received signal from the output signal of the first branching means, and a demodulated signal from the frequency discriminator. a second branching means for branching; an and gate means for inputting an output signal from the second branching means and a detection output of the detection means; and an integrating means for integrating the output signal from the AND gate means. 1. A code regeneration circuit comprising: buffering amplification means which receives the output signal voltage from the two-note integration means and whose output is connected to the polarity judgment identification value input of the judgment device.