JPH0359618B2 - - Google Patents

Description

[Detailed description of the invention] [Summary] Reception QPSK (Quadrature Phase Shift
Keying) wave is phase-detected using a regenerated carrier wave,
This system identifies the levels of the I and Q channel detection output signals and applies one to the data terminal of the flip-flop and the other to the clock terminal. It is also possible to detect modulation and non-modulation.

[Industrial application field]

The present invention relates to a modulation/non-modulation detection circuit that detects whether a received wave is a modulated wave or a non-modulated wave in a QPSK communication system.

A configuration is known that discriminates between modulated waves and non-modulated waves and performs switching control of each section. For example, since an unmodulated wave has only a carrier wave component and a modulated wave has a wider band, the center frequency component of the band is larger in the unmodulated wave. Therefore, a center that detects the center frequency component of the band and performs AGC (automatic gain control)
In an AGC circuit, AGC characteristics differ for modulated waves and non-modulated waves. Therefore, the control characteristics are switched by detecting whether the wave is a modulated wave or a non-modulated wave.

Furthermore, when detecting the level of an intermediate frequency signal etc. and instructing the meter, the indicated level will be different for modulated waves and non-modulated waves even though the reception conditions do not change. It is necessary to distinguish between non-modulated waves and determine whether the level indication state is normal or not.

Therefore, it is desired to be able to accurately and easily detect modulated waves and unmodulated waves.

[Conventional technology]

Figure 6 shows a block diagram of a conventional example.
An intermediate frequency signal obtained by converting the frequency of a QPSK wave is amplified by an intermediate frequency amplifier 41, phase detected by a detection circuit 42, and level discrimination is performed in addition to an identification circuit (not shown). A frequency component far from the center frequency of is extracted and detected by the detector 44, and in the case of a modulated wave,
If the detection output level is high and the wave is unmodulated, a modulated/non-modulated detection signal with a small detection output level is obtained.

For example, a modulated wave has a spectrum indicated by diagonal lines a in FIG. 7, and an unmodulated wave has a spectrum indicated by diagonal lines b in FIG. 7. f ₀ indicates the carrier wave frequency, and the modulated wave has a band spread around f ₀ as the center frequency, whereas the unmodulated wave has only the frequency component of f ₀ . Therefore, if the frequency characteristics of the narrowband filter 43 are set to one or both of FIL1 and FIL2, which are far from the center frequency f ₀ , in the case of a modulated wave, many signal components are extracted by the narrowband filter 43. In the case of an unmodulated wave, it becomes almost zero. Therefore, when the detection signal is detected by the detector 44, the level of the detected signal is high in the case of a modulated wave, and on the contrary, the level is almost zero in the case of a non-modulated wave.

[Problem that the invention seeks to solve]

Utilizing the fact that there is a spectrum spread in the case of a modulated wave, the presence or absence of band spread is detected by the narrow band filter 43, but the narrow band filter 43 has the disadvantage of being expensive and large. .

An object of the present invention is to identify and detect modulated waves and non-modulated waves by digital processing with a simple configuration.

[Means for solving problems]

The modulation/non-modulation detection circuit of the present invention is capable of distinguishing between modulated waves and non-modulated waves using identification signals of I and Q channels, and will be explained with reference to FIG. A detection circuit 1 that detects the phase of a QPSK wave using a regenerated carrier wave from a voltage controlled oscillator 7; an identification circuit 2 that discriminates the level of each detection output signal of the I channel and Q channel of this detection circuit;
3, a flip-flop 4 which applies one of the identification output signals of these identification circuits 2 and 3 to the data terminal D and the other to the clock terminal C, and integrates the Q terminal output signal of this flip-flop 4 to obtain a detection signal. It is equipped with an integrating circuit 5 or a counter 6.

[Effect]

In the case of a modulated wave, since the identification output signals from the identification circuits 2 and 3 are random, the Q terminal output signal of the flip-flop 4 is also random, and when integrated, becomes a detection signal of a certain level. Further, by counting the Q terminal output signal of the flip-flop 4 by the counter 6, a detection signal can be output when a predetermined count is reached. On the other hand, in the case of unmodulated waves, the identification output signals from the identification circuits 2 and 3 are fixed at either low level or high level, so the integral output is at low level or high level. , and the count becomes zero. Therefore, modulated waves and non-modulated waves can be discriminated and detected. Also, if synchronization is not achieved, the identification circuit 2,
The identification output signal from Flip-Flop 3 has a phase shift of 90 degrees, and therefore, the Q terminal output signal of flip-flop 4 is fixed at either low level or high level, similar to an unmodulated wave. This is the detection signal.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.
The QPSK wave received signal is frequency-converted in a high frequency section (not shown) and becomes an intermediate frequency signal.
It is added to the detection circuit 1. Also, voltage controlled oscillator 7
is controlled by a control voltage from a carrier regeneration circuit (not shown) and outputs a reference carrier wave that is phase-synchronized with the received signal, and the reference carrier wave is applied to the detection circuit 1.

In the detection circuit 1, the reference carrier wave applied from the voltage controlled oscillator 7 is used as a carrier wave having a phase difference of 90 degrees, and the received signal is phase-detected, thereby detecting the phase of the received signal. Detected output signals are obtained and applied to identification circuits 2 and 3, respectively. The identification circuits 2 and 3 perform level identification of the detection output signal and output it as a "1" or "0" signal.
One of the identification output signals is applied to the data terminal D of the flip-flop 4, and the other is applied to the clock terminal C of the flip-flop 4.

In the case of a modulated wave, the identification output signals of the I and Q channels randomly become "1" and "0", so the Q terminal output signal of the flip-flop 4 randomly becomes "1" and "0". Become. Therefore, by integrating the Q terminal output signal of the flip-flop 4 by the integrating circuit 5, a detection signal of a certain integral output level is output, or by counting by the counter 6, a detection signal of a certain count content is output. be done.

In the case of non-modulated waves, the identification output signals of the I and Q channels are fixed to either "1" or "0". Therefore, the Q terminal output signal of the flip-flop 4 becomes a continuous "1" or "0", the integration circuit 5 outputs a high level or low level detection signal, and the count content of the counter 6 becomes zero.

FIG. 2 is an explanatory diagram of the operation, and a and b show the identification output signals of the I and Q channels when a modulated wave is received, and the identification output signal of either channel is sent to the data terminal D of the flip-flop 4. Also, the identification output signal of the other channel is applied to the clock terminal C of the flip-flop 4, respectively. In that case,
Even if the rise timing of the identification output signal applied to the clock terminal C is the change point of the identification output signal applied to the data terminal D, the Q terminal output signal of the flip-flop 4 will be "1" or "0".
As a result, a random change between "1" and "0" occurs, so the integrated output signal from the integrating circuit 5 becomes a certain level, and the count content of the counter 6 also becomes a certain value.

On the other hand, in the case of unmodulated waves, unlike the cases shown in a and b, the identification output signals of the I and Q channels are constant "1" or "0", so the integral output signal becomes a constant high level or low level, and the count content of the counter 6 becomes zero.

If synchronization is not achieved, the identification output signals of the I and Q channels will have a 90° phase difference, as shown in c, 2, and the rising edge of the identification output signal applied to the clock terminal C of the flip-flop 4 will Since the identification output signal applied to data terminal D is latched, when the identification output signal shown in c is applied to clock terminal C of flip-flop 4, the Q terminal output signal of flip-flop 4 becomes "0" and When the identification output signal shown is applied to the clock terminal C of the flip-flop 4, the Q terminal output signal of the flip-flop 4 becomes "1". Therefore, the detection signal is similar to that without modulation.

As described above, it is possible to digitally detect whether the received wave is a modulated wave or an unmodulated wave.

Figure 3 shows the main part block diagram when applied to a level detection circuit, and the intermediate frequency signal IFin is transmitted to the detector 1.
1 and detected, and applied to the amplifier 13 or 14 via the switching circuit 12, and the amplified output signal passes through the switching circuit 15 and becomes the meter indication signal S1. The switching circuits 12 and 15 are controlled by detection signals of modulated waves and non-modulated waves. amplifier 1
Assuming that the gain of the amplifier 14 is set smaller than the gain of 3, when a modulated wave is received, the detection signal controls the switching circuits 12 and 15, the detection output signal is amplified by the amplifier 13, and the meter indication signal is S1
Also, when receiving an unmodulated wave, the detection output signal is amplified by the amplifier 14 to produce the meter indication signal S1.If the receiving conditions are the same, the meter will not respond when receiving a modulated wave or when receiving an unmodulated wave. The instructions can be the same.

FIG. 4 is a block diagram of the main part of the center AGC circuit, and the intermediate frequency signal IFin is passed through the narrow band filter 21.
In addition to this, a center frequency component is extracted, detected by a detector 22, processed by a control circuit 23, and outputted as a control signal S2 for gain control of an intermediate frequency amplifier (not shown).

In this center AGC circuit, a narrowband filter 21 is used when receiving modulated waves and when receiving non-modulated waves.
Since the output signal levels are different, a detection signal for distinguishing between a modulated wave and a non-modulated wave is added to the control circuit 23 to switch the control signal S2 for gain control.

FIG. 5 is a block diagram of the main part of the demodulation circuit, in which the intermediate frequency signal IFin is applied to the detection circuit 31, a reference carrier wave is added from the voltage controlled oscillator 40,
Phase detection is performed using a carrier wave with a 90° phase difference, and I,
The Q channel detection output signal is sent to the A/D converter 32,
Added to 33. The A/D converters 32 and 33 convert the detected output signal into a digital signal by level discrimination similar to the discrimination circuit, and the discrimination output signals of the I and Q channels are sent to the baseband processing type carrier wave regeneration circuit 39. The voltage controlled oscillator 40 is controlled by the carrier regeneration circuit 39 so that a reference carrier wave whose phase is synchronized with the intermediate frequency signal IFin is generated.

Since the modulated wave is normally code-converted and modulated so that the mark rate is 1/2,
The output signals converted into digital signals by the A/D converters 32 and 33 are integrated by the integrating circuits 34 and 35 to detect the mark rate, and the integrated output signals are sent to the A/D converters via the switching circuits 36 and 37. In addition to being used as a bias voltage for the D converters 32 and 33, it is used to correct level fluctuations in the detection output signal.

Since the mark rate cannot be detected when receiving a non-modulated wave, the switching circuits 36 and 37 are controlled by a detection signal that distinguishes between a modulated wave and a non-modulated wave, and the bias voltage from the fixed bias circuit 38 is changed when receiving a non-modulated wave. is added to the A/D converters 32 and 33. This makes it possible to maintain phase synchronization by controlling the voltage controlled oscillator 40 by the carrier wave regeneration circuit 39 even when no modulation is performed.

〔Effect of the invention〕

As explained above, the present invention detects the phase of a received QPSK wave by the detection circuit 1, and the identification circuits 2 and 3.
The levels of the detection output signals of the I and Q channels are identified by the above, and one of them is applied to the data terminal D of the flip-flop 4, and the other is applied to the clock terminal C of the flip-flop 4, and the output signal of the flip-flop 4 is applied to the integrating circuit 5. The detection signal is output after being integrated by , or counted by a counter 6, and is detected by digital processing, compared to the conventional method which detects the difference in spectrum between a modulated wave and an unmodulated wave. Therefore, it has the advantage of being simple in structure and small in size.

In particular, the detection circuit 1 and identification circuits 2 and 3 are QPSK
Since it is included in the wave receiving device,
Flip-flop 4 and integrating circuit 5 or counter 6
By simply adding , it is possible to configure a modulated wave/unmodulated wave detection circuit, which has the advantage of being an economical configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of an embodiment of the present invention, FIG. 3 is a block diagram of the main part of a level detection circuit, and FIG. 4 is a center block diagram.
FIG. 5 is a block diagram of the main part of the AGC circuit, FIG. 5 is a block diagram of the main part of the demodulation circuit, FIG. 6 is a block diagram of the conventional example, and FIGS. 7a and 7b are explanatory diagrams of the operation of the conventional example. 1 is a detection circuit, 2 and 3 are identification circuits, 4 is a flip-flop, 5 is an integration circuit, 6 is a counter, and 7 is a voltage controlled oscillator.

Claims (1)

[Scope of Claims] 1. A detection circuit 1 that performs phase detection of a QPSK wave using a regenerated carrier wave, and identification circuits 2 and 3 that perform level identification of respective detection output signals of the I channel and Q channel of the detection circuit 1. a flip-flop 4 that applies one of the identification output signals of the identification circuits 2 and 3 to the data terminal D and the other to the clock terminal C; and an integrating circuit 5 that integrates the output signal of the flip-flop 4 or a counter 6 that counts the output signal of the flip-flop 4. A modulation/non-modulation detection circuit characterized by comprising: