JPS60205616A - Detection system for power failure - Google Patents

Abstract

PURPOSE:To detect a power failure with a small number of a components by outputting a power failure signal with a specific value unless light from a light emitting element is photodetected at a specific time elapsed after the last photodetection. CONSTITUTION:The output voltage of a full-wave rectifier 12 turns on a transistor TR21 and a current flows to the gate of a silicon controlled rectifier (SCR) 22, which then turns on. At this time, an LED23 emits light and a phototransistor TR24 photodetects the light from the LEF23 and turns on. When the TR24 turns on, the capacitor in a timer 26 is discharged abruptly. This capacitor is charged by a DC power source and when the voltage across the capacitor rises up to a specific value, a power failure signal has logic 1. The SCR22 turns on every time voltages applied to AC power source terminals T0 and T1 cross a zero level, and the LED23 emits light as a result. When a power failure occurs, the LED23 does not emit light and the TR24 is still off, so the potential of the capacitor in the timer 26 attains to the specific value, so that the power failure signal has logic 1.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a power failure detection method using a zero-cross type and inrush current limiting circuit to detect a power failure. [Prior Art and Problems] Part 1 The figure shows an example of a conventional power failure detection circuit, where 1 is a commercial transformer and 2 is a full-wave rectifier.

3 is a diode, 4 is a smoothing capacitor, 5 is a constant voltage IC
, 6 is an operational amplifier, 7 is a timer, 8 is a capacitor, R3
R4 to R4 respectively represent resistances.

A commercial frequency transformer power source is connected to the primary side of the commercial transformer. The secondary output of the commercial transformer 1 is rectified by a full-wave rectifier 2. The output of full wave rectifier 2 is diode 3
and is further rectified and smoothed by a smoothing capacitor 4,
This rectified and smoothed voltage is input to the constant voltage IC5. The output voltage of the constant voltage IC5 is divided by resistors R8 and R4, and this divided voltage is applied to the + side input terminal of the operational amplifier 6. The pulsating output voltage of the full-wave rectifier 2 is determined by the resistor R1.
and R1, and this divided voltage is applied to the operational amplifier 6
is applied to one side input terminal. The operational amplifier 6 produces a negative output when the voltage at the positive input terminal is greater than the voltage at the one input terminal, and produces a positive output when the former is smaller than the latter. The timer 7 monitors the period in which the output of the operational amplifier 6 is negative, and if the negative period is greater than the set period, the power outage signal is set to logic rlJ. This power outage signal is sent to a processing device i1 (not shown) that controls the entire system.

As mentioned above, in the conventional power failure detection circuit.

The time when the voltage obtained by rectifying the secondary output of the commercial transformer 1 is lower than the reference voltage is monitored, and if this exceeds a certain period of time, it is considered that a power outage has occurred. Therefore, conventional power failure detection circuits require commercial transformers that are expensive and occupy a large board area.

[Purpose of the invention] The present invention is based on the above considerations.

The object of the present invention is to provide a power outage detection method that can detect power outages using only a few parts.

[Structure of the invention]

The power outage detection method of the present invention includes one AC power line, the other current current source line, a thyristor, and a smoothing capacitor, and the above-mentioned one current-changing power line and the other current-changing power line. In an electrical device in which a current bus including the thyristor and smoothing capacitor can be formed between the two, a series circuit consisting of a light emitting element and a silicon-controlled rectifier to which a rectified output of an AC power source is applied, and a series circuit that is connected to a rectified output of an AC power source, means for supplying current to the gate of the silicon controlled rectifier only at small moments; a light receiving element for receiving light from the light emitting element; and a means for supplying current to the gate of the silicon controlled rectifier only at small moments; and a timer that outputs a power outage signal of a predetermined value when no light is received from the light emitting element,
The device is characterized in that when the silicon controlled rectifier is turned on, a current flows through the gate of the thyristor.

[Embodiments of the invention]

The present invention will be explained below with reference to the drawings.

FIG. 2 is an electrical circuit diagram of one embodiment of the present invention.

In Fig. 2, 11 is a bidirectional three-terminal thyristor (hereinafter referred to as %TRIAC), 12 is a full-wave rectifier, 13 is also a full-wave rectifier, 14 is a smoothing capacitor, 15 to 19 are resistors, 20 is a capacitor, and 21 is a transistor. , 22 is a silicon controlled rectifier (hereinafter referred to as 8'OR), 23 is a light emitting diode, 24 is a phototransistor, 25 is a resistor, 26 is a timer, 27 is a resistor, To and T1 are transformer power supply terminals, oo and 0 ．． indicate the DC output terminals, respectively.

TRIACI 1 is turned on when a turn-on current flows through its gate. When TRIAC11 is turned on,
5e current is supplied to the full wave rectifier 13. The smoothing capacitor 14 smoothes the output of the full-wave rectifier 13.

A load is connected to the DC output terminal Oog 01. The full-wave rectifier 12 also has a transformer power supply terminal T0. It rectifies the alternating current applied to T1. The DC output of full-wave rectifier 12 is divided by resistors 16 and 17, and this divided voltage is applied to the base of transistor 210. The emitter of transistor 21 is connected to the negative DC terminal of full-wave rectifier 12. Resistors 18 and 19 are connected between the positive DC terminal and the negative DC terminal of the full-wave rectifier 12, and the transcathode is connected to the anode of 80R22. 8CR22
The cathode of is connected to the negative DC terminal of the full-wave rectifier 12. The gate of 5CR22 is connected to the junction of resistors 18 and 19. The upper end of the resistor 25 is connected to the DC power supply VK,
Its lower end is connected to the collector of the photo-e transistor 24.

The emitter of the photonic transistor 24 is grounded. The voltage at the junction of resistor 25 and phototransistor 24 is input to timer 26 . Note that the light emitting diode 23
and phototransistor 24 constitute a photocoupler @ Transistor 21 is in an off state when the output voltage of the full-wave rectifier 12 is low, and is in an on state when the output voltage is high. The output voltage of the full-wave rectifier 12 is
When a gate voltage can be supplied that can turn on the 5CR22 while keeping it in the off state.

Current is supplied to the gate of 5CR22 and 5CR22 is turned on. When 5CR22 is turned on, voltage is applied to the gate of TRIAC11, current is supplied, and TRIAC11 is turned on. T.R.
When IAC11 turns on.

A photoelectric current flows through the smoothing capacitor 14. In this manner, in the embodiment shown in FIG. 2, the TRIAC 11'4 is turned on when the countercurrent voltage of the countercurrent power supply terminal To e T1 m is low.

Furthermore, since the TRIAC 11 is not turned on when the current voltage is high, the photoelectric current flowing into the smoothing capacitor 14 when the power is turned on can be reduced.

When 80R22 is turned on, the light emitting diode 23 emits light, and the phototransistor 24 receives the light from the light emitting diode 23 and is turned on. Phototransistor 24
When turned on, the capacitor (not shown) in the timer 26
discharges rapidly.

This capacitor is photoelectrically powered by a DC power supply, and when the voltage of the capacitor reaches a predetermined value, the power failure signal becomes logic "1". 5CR22 is the current power supply terminal T0. Each time the current voltage applied to 'l' crosses the zero level, it turns on, and the light emitting diode 23 emits light accordingly. When a power outage occurs, the light emitting diode 23 does not emit light,
Since the phototransistor 24 is not turned on, the timer 26
The potential of the capacitor inside reaches a certain value, and the power outage signal becomes logic "1".

〔Effect of the invention〕

As is clear from the above description, one aspect of the present invention is as follows.

(f) Since many parts are shared with the inrush current limiting circuit, it is possible to detect a power outage with just a few parts.

←】 Commercial transformer is not required.

The signal transmitted by a photocoupler is usually a pulse with a period half the commercial frequency.

It can be used for other purposes such as sunset photography for power on/off sequences.

(c) E) - The high voltage system and the control system can be separated by the coupler, and other remarkable effects can be achieved.

[Brief explanation of drawings]

Figure 1 is a diagram showing an example of a conventional power failure detection circuit, and Figure 2 is an electrical circuit diagram of an embodiment of the present invention. 1...Commercial transformer, 2...Full wave rectifier, 3...
Diode, 4... Smoothing capacitor, 5... Constant voltage IC. 6...llut width device, 7...timer, 8...coy
y" y t. 11...TRIAC, 12 and 13...Full wave rectifier,
14-...Smoothing capacitor, 15-19...Resistor, 20...Capacitor, 21...Transistor, 2
2...SCR, 23...Light emitting diode, 24...
・Phototransistor, 26...Timer, 27...
resistance. Patent applicant: Usatsuk Electronic Industry Co., Ltd. Representative patent attorney: Yobu Kyotani

Claims (1)

[Claims] A current comprising one current transformer power line, the other AC power line, a thyristor, and a smoothing capacitor, and including the thyristor and smoothing capacitor between the one AC power line and the other AC power line. In an electrical device in which a path can be formed, a series circuit consisting of a light emitting element and a silicon-controlled rectifier to which the rectified output of a je current power source is applied, and a gate of the silicon-controlled rectifier only when the rectified power source voltage is small. means for supplying current; a light receiving element that receives light from the light emitting element; and a light receiving element that does not receive light from the light emitting element even after a certain period of time has elapsed from the time when the light receiving element received the light from the light emitting element. and a timer that sometimes outputs a power outage signal of a predetermined value, and is configured such that current flows to the gate of the thyristor when the silicon-controlled rectifier is turned on.