JPS642028B2 - - Google Patents

Info

Publication number
JPS642028B2
JPS642028B2 JP8658783A JP8658783A JPS642028B2 JP S642028 B2 JPS642028 B2 JP S642028B2 JP 8658783 A JP8658783 A JP 8658783A JP 8658783 A JP8658783 A JP 8658783A JP S642028 B2 JPS642028 B2 JP S642028B2
Authority
JP
Japan
Prior art keywords
circuit
switching element
current
full
transformer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8658783A
Other languages
Japanese (ja)
Other versions
JPS59213275A (en
Inventor
Yosuke Nagami
Kazunori Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Battery Co Ltd
Original Assignee
Furukawa Battery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Battery Co Ltd filed Critical Furukawa Battery Co Ltd
Priority to JP8658783A priority Critical patent/JPS59213275A/en
Publication of JPS59213275A publication Critical patent/JPS59213275A/en
Publication of JPS642028B2 publication Critical patent/JPS642028B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Description

【発明の詳細な説明】 本発明は、回路断続用半導体スイツチング素子
を備える例えばAC―DCコンバータ装置に関し、
負荷への過電流を防止することをその目的とする
もので、回路断続用半導体スイツチング素子を備
えるコンバータ装置において、該スイツチング素
子と直列に変流器を接続し、該変流器の2次コイ
ルに全波整流回路の交流入力端子と抵抗の並列回
路を接続すると共に、該全波整流回路の直流出力
端子の一方の端子を該抵抗の中間点に接続し、該
直流出力端子をその出力電圧に応じたパルス幅の
信号を発振する発振回路を介して前記スイツチン
グ素子の制御極に接続したことを特徴とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to, for example, an AC-DC converter device equipped with a semiconductor switching element for circuit interruption.
Its purpose is to prevent overcurrent to the load, and in a converter device equipped with a semiconductor switching element for circuit interruption, a current transformer is connected in series with the switching element, and the secondary coil of the current transformer is connected in series with the switching element. The AC input terminal of the full-wave rectifier circuit and a parallel circuit of a resistor are connected to the AC input terminal of the full-wave rectifier circuit, and one terminal of the DC output terminal of the full-wave rectifier circuit is connected to the midpoint of the resistor, and the DC output terminal is connected to the output voltage. The switching element is characterized in that it is connected to the control pole of the switching element via an oscillation circuit that oscillates a signal with a pulse width corresponding to the switching element.

以下本発明の実施例を図面につき説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例の一部ブロツク化し
た回路図を示す。
FIG. 1 shows a partially blocked circuit diagram of an embodiment of the present invention.

図において、1は交流電源2に接続された整流
回路で、この回路1は回路断続用半導体スイツチ
ング素子3を介して変圧器4の1次コイルに接続
し、その2次コイルは整流器5を介して出力端子
6に接続し、かくて交流が整流され、次いで、こ
の直流は前記スイツチング素子3による例えば
100KHz〜200KHzの高周波数での回路の断続によ
り前記変圧器4を経て再び交流化され、更に整流
器5で整流されて所望の直流出力電圧が得られ
る。
In the figure, 1 is a rectifier circuit connected to an AC power supply 2. This circuit 1 is connected to the primary coil of a transformer 4 via a semiconductor switching element 3 for circuit interruption, and the secondary coil is connected to a rectifier 5 via a rectifier 5. is connected to the output terminal 6, thus rectifying the alternating current, and then converting this direct current to the switching element 3, e.g.
By switching on and off the circuit at a high frequency of 100KHz to 200KHz, the voltage is converted to AC again through the transformer 4, and further rectified by the rectifier 5 to obtain the desired DC output voltage.

本発明はこのようなコンバータ回路において、
前記スイツチング素子3と直列に変流器7を接続
し、その2次コイルを端子A1A1を介して検出回
路8に接続し、その出力端子を、これからの出力
電圧に応じたパルス幅の信号を発振する公知の発
振回路9に接続し、該発振回路9の出力を端子
B1B1を介して2つの前記スイツチング素子3の
制御極に互に逆極性に印加すると共に、該検出回
路8を、第2図示のように、変流器7の2次コイ
ルに接続した抵抗10A,10Bと全波整流回路
11の交流入力端子12A,12Bとを並列に接
続し、検出信号出力端子13A,13Bに接続さ
れる前記全波整流回路11の直流出力端子14
A,14Bの1つ14Bを抵抗10A,10Bの
中間点に接続して構成した。
The present invention provides such a converter circuit,
A current transformer 7 is connected in series with the switching element 3, its secondary coil is connected to the detection circuit 8 via the terminal A1A1 , and its output terminal is connected to a current transformer 7 with a pulse width corresponding to the future output voltage. Connect to a known oscillation circuit 9 that oscillates a signal, and connect the output of the oscillation circuit 9 to a terminal.
B 1 B 1 is applied to the control poles of the two switching elements 3 with opposite polarities, and the detection circuit 8 is connected to the secondary coil of the current transformer 7 as shown in the second diagram. The resistors 10A, 10B and the AC input terminals 12A, 12B of the full-wave rectifier circuit 11 are connected in parallel, and the DC output terminal 14 of the full-wave rectifier circuit 11 is connected to the detection signal output terminals 13A, 13B.
One of the resistors A and 14B, 14B, is connected to the midpoint between the resistors 10A and 10B.

第1図において、15は、全波整流回路1に介
入したサイリスタ16の制御極に徐々に増大する
電圧を加え、全波整流回路1の整流電圧を徐々に
増大させるソフトスタート回路、17,17は変
圧器4の3次コイルで、前記スイツチング素子
3,3の遮断期間中変圧器4に蓄えられたエネル
ギを整流器を介して電源側へ戻すためのものであ
る。第2図において、18はフイルタ回路であ
る。
In FIG. 1, reference numeral 15 denotes a soft start circuit 17, 17 that gradually increases the rectified voltage of the full-wave rectifier circuit 1 by applying a gradually increasing voltage to the control pole of the thyristor 16 that intervenes in the full-wave rectifier circuit 1. is a tertiary coil of the transformer 4, which is used to return the energy stored in the transformer 4 during the cut-off period of the switching elements 3, 3 to the power supply side via a rectifier. In FIG. 2, 18 is a filter circuit.

次にこの実施例の作動について説明する。 Next, the operation of this embodiment will be explained.

今、第1図において、全波整流回路1と変圧器
4の1次コイルとの接続回路19に流れる電流は
前記スイツチング素子3の断続的開閉及びその遮
断時変圧器4の3次コイル17によるエネルギの
電源への返還のために第3図Aに示すような電流
が流れる。変流器7の2次コイルには第アンペア
ターンの法則により1次電流に対応する2次電流
が抵抗10A,10Bに流れ、該抵抗10A,1
0B端に電圧降下を生ずる。第3図Bはこの電圧
降下により該全波整流回路11の直流出力回路に
電流が流れ、この電流により検出信号出力端子1
3A,13B間に生ずる検出信号電圧Eccの波形
である。この検出信号電圧Eccは前記抵抗10
A,10Bの抵抗値により変流器7の1次電流す
なわち負荷電流ICTに対して次のように変化する。
Now, in FIG. 1, the current flowing in the connection circuit 19 between the full-wave rectifier circuit 1 and the primary coil of the transformer 4 is caused by the intermittent opening and closing of the switching element 3 and the tertiary coil 17 of the transformer 4 when the switching element 3 is switched on and off. To return energy to the power source, a current flows as shown in FIG. 3A. In the secondary coil of the current transformer 7, a secondary current corresponding to the primary current flows through the resistors 10A and 10B according to the ampere-turn law.
A voltage drop occurs at the 0B terminal. FIG. 3B shows that due to this voltage drop, a current flows through the DC output circuit of the full-wave rectifier circuit 11, and this current causes the detection signal output terminal 1 to flow.
This is the waveform of the detection signal voltage Ecc occurring between 3A and 13B. This detection signal voltage Ecc is
Depending on the resistance values of A and 10B, the primary current of the current transformer 7, that is, the load current I CT changes as follows.

抵抗10Aの抵抗値を一定のまま抵抗10Bの
抵抗値を増大すると、該端子13A,13B間の
電圧波形は第3図Cに示すように矩形波間の電圧
波形が破線から実線で示すように変化する。この
ように抵抗10Bは検出信号波形に影響を及ぼ
し、この抵抗値を例えば9Ω,12Ω、20Ωと増大す
ると(このとき抵抗10Aは100Ωとする)、負荷
電流ICTに対する検出信号電圧Eccの関係は、第4
図A,B及びCで示すように変化し、所定の負荷
電流値から検出信号電圧Eccはいずれも低下す
る。
When the resistance value of the resistor 10B is increased while the resistance value of the resistor 10A is kept constant, the voltage waveform between the terminals 13A and 13B changes from a broken line to a solid line, as shown in FIG. 3C. do. In this way, the resistor 10B affects the detection signal waveform, and when this resistance value is increased to 9Ω, 12Ω, and 20Ω, for example (in this case, the resistor 10A is 100Ω), the relationship between the detection signal voltage Ecc and the load current ICT is , 4th
The detection signal voltage Ecc changes as shown in Figures A, B, and C, and all of the detection signal voltages Ecc decrease from a predetermined load current value.

かくてこの検出信号電圧Eccを、第1図に示す
ように発振回路9に入力することにより、該発振
回路9の出力端子B1B1,B2B2は、この電圧Ecc
に対応したパルス幅の発振電圧を出力し、この発
振電圧は回路断続用半導体スイツチング素子3の
制御極に互に逆極性に入力する。接続回路19に
流れる電流ICTが所定値以上に上昇すると、第4
図示のように検出信号電圧Eccは低下し始めるの
で、発振回路9から出力する発振電圧のパルス幅
は狭くなり電流ICTの増加は制御される。したが
つて、変圧器4の出力端子6に接続される負荷回
路には過大電流が流れず、負荷及び変圧器4は保
護される。
Thus, by inputting this detection signal voltage Ecc to the oscillation circuit 9 as shown in FIG .
An oscillating voltage having a pulse width corresponding to the oscillating voltage is outputted, and this oscillating voltage is inputted to the control pole of the semiconductor switching element 3 for circuit disconnection with mutually opposite polarity. When the current I CT flowing through the connection circuit 19 rises above a predetermined value, the fourth
As shown in the figure, the detection signal voltage Ecc begins to decrease, so the pulse width of the oscillation voltage output from the oscillation circuit 9 becomes narrower, and the increase in the current I CT is controlled. Therefore, no excessive current flows through the load circuit connected to the output terminal 6 of the transformer 4, and the load and the transformer 4 are protected.

このように本発明によれば、コンバータ装置に
おいて負荷への過大電流の抑制が簡単な構成で達
成できる効果を有する。
As described above, according to the present invention, the converter device has the effect of suppressing excessive current to the load with a simple configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の一部ブロツク化し
た回路図、第2図はその検出回路8の回路図、第
3図A,B及びCは各部の波形図、第4図A,B
及びCは抵抗10A,10Bの値による変流器1
次電流対検出信号電圧特性図を示す。 3……回路断続用スイツチング素子、4……変
圧器、7……変流器、8……検出回路、9……発
振回路、10A,10B……抵抗、11……全波
整流回路。
FIG. 1 is a partial block circuit diagram of an embodiment of the present invention, FIG. 2 is a circuit diagram of the detection circuit 8, FIG. 3 is a waveform diagram of each part, and FIG. B
and C is the current transformer 1 according to the values of resistors 10A and 10B.
A characteristic diagram of secondary current versus detection signal voltage is shown. 3...Switching element for circuit interruption, 4...Transformer, 7...Current transformer, 8...Detection circuit, 9...Oscillation circuit, 10A, 10B...Resistor, 11...Full-wave rectifier circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 回路断続用半導体スイツチング素子を備える
コンバータ装置において、該スイツチング素子と
直列に変流器を接続し、該変流器の2次コイルに
全波整流回路の交流入力端子と抵抗の並列回路を
接続すると共に、該全波整流回路の直流出力端子
の一方の端子を該抵抗の中間点に接続し、該直流
出力端子をその出力電圧に応じたパルス幅の信号
を発振する発振回路を介して前記スイツチング素
子の制御極に接続したことを特徴とするコンバー
タ装置。
1. In a converter device equipped with a semiconductor switching element for circuit interruption, a current transformer is connected in series with the switching element, and the AC input terminal of a full-wave rectifier circuit and a parallel circuit of a resistor are connected to the secondary coil of the current transformer. At the same time, one terminal of the DC output terminal of the full-wave rectifier circuit is connected to the midpoint of the resistor, and the DC output terminal is connected to the DC output terminal through an oscillation circuit that oscillates a signal with a pulse width corresponding to the output voltage. A converter device characterized in that it is connected to a control pole of a switching element.
JP8658783A 1983-05-19 1983-05-19 Converter device Granted JPS59213275A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8658783A JPS59213275A (en) 1983-05-19 1983-05-19 Converter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8658783A JPS59213275A (en) 1983-05-19 1983-05-19 Converter device

Publications (2)

Publication Number Publication Date
JPS59213275A JPS59213275A (en) 1984-12-03
JPS642028B2 true JPS642028B2 (en) 1989-01-13

Family

ID=13891138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8658783A Granted JPS59213275A (en) 1983-05-19 1983-05-19 Converter device

Country Status (1)

Country Link
JP (1) JPS59213275A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009271034A (en) * 2008-05-12 2009-11-19 Toyota Industries Corp Ac current detection circuit

Also Published As

Publication number Publication date
JPS59213275A (en) 1984-12-03

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