JPS60194563A - Reverse conduction gate turn off thyristor device - Google Patents
Reverse conduction gate turn off thyristor deviceInfo
- Publication number
- JPS60194563A JPS60194563A JP5060184A JP5060184A JPS60194563A JP S60194563 A JPS60194563 A JP S60194563A JP 5060184 A JP5060184 A JP 5060184A JP 5060184 A JP5060184 A JP 5060184A JP S60194563 A JPS60194563 A JP S60194563A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- groove
- reverse conduction
- reverse
- gto
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 230000006866 deterioration Effects 0.000 abstract description 4
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 1
- 230000015556 catabolic process Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
- H01L29/7404—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
- H01L29/7412—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode
- H01L29/7416—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode the device being an antiparallel diode, e.g. RCT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
- H01L29/744—Gate-turn-off devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thyristors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、ダートターンオフサイリスタ（ＧＴＯサイリ
スタ）と逆導通ダイオードを一体形成した逆導通ＧＴＯ
サイリスタ装置に関する。Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a reverse conduction GTO in which a dirt turn-off thyristor (GTO thyristor) and a reverse conduction diode are integrally formed.
This invention relates to a thyristor device.
従来の逆導通ＧＴＯサイリスクの一例を第１図に示す。 An example of a conventional reverse conduction GTO scissor is shown in FIG.
ＧＴＯサイリスタは周知のように、ｎペースＮ１１、ｐ
ベース層１２、このｐ４−ス層１２の表面部に複数個に
分割形成されたｎエミツタ層１３ （１３１ｒ１３ｚ
ｐ・・・）、およびｎベース層１ノの下に形成されたｐ
エミッタｊｉ’Ｊ １４のｐｎ ｐｎ構造からなる。１
５ （１５１ｒ１５２ ＋・・・）バカソード電極であ
り、ダート電極１６は各カソード領域を取り囲むように
ｐベース層１２に設けられている。１７はアノード電極
である。As is well known, the GTO thyristor has n-pace N11, p
The base layer 12 and the n emitter layer 13 (131r13z
p...), and p formed under the n base layer 1
It consists of a pn pn structure with 14 emitters ji'J. 1
5 (151r152 +...) A dirt electrode 16 is provided on the p base layer 12 so as to surround each cathode region. 17 is an anode electrode.
このＧＴＯサイリスタと一体形成された逆導通ダイオー
ドは、ｐベース層１２と同じ層を用いた２層１２’、ｎ
ベース層１ノと同じ層を用いた１層１１′およびこの１
層１１′の下に選択的に形成されたｎ土層１８からなる
。１９はこの逆導通ダイオードのアノード電極であって
、外部的に例えば圧接ポストによりＧＴＯサイリスタの
カソード電極１５と電気的に接続される。またＧＴＯサ
イリスタのアノード電極１７はそのまま逆導通ダイオー
ドのカソード電極を兼ねている。The reverse conduction diode integrally formed with this GTO thyristor has two layers 12' and n using the same layer as the p base layer 12.
1 layer 11' using the same layer as base layer 1 and this 1
It consists of an n-soil layer 18 selectively formed below the layer 11'. Reference numeral 19 denotes an anode electrode of this reverse conduction diode, which is externally electrically connected to the cathode electrode 15 of the GTO thyristor by, for example, a press-contact post. Further, the anode electrode 17 of the GTO thyristor also serves as the cathode electrode of the reverse conduction diode.
ＧＴＯのｐペース層１２と逆導通ダイオードのｐ ）ｕ
１２’とは、エツチングにより形成された溝２０によ
り実質的に電気的分離がなされている。GTO p space layer 12 and reverse conduction diode p)u
12' is substantially electrically isolated by a groove 20 formed by etching.
このようにしないと、ダート電極１６とアノード電極１
９とが短絡してしまい、ＧＴＯサイリスタにタート電圧
を印加することができなくなるためである。ｔ７ｆ ２
θの下には薄いｐ層が残され、このｐ層の高抵抗を利用
して、ｐベースＮ１２とｐＩ音１２′の電気的分離を行
っているのであるが、溝２０ ＠ ｎベース層１１に達
する深さまで形成すれば、電気的分離は完全になる。そ
のようにしないのは、もしｐペース層１２と２層１２′
を完全に分離した場合、アノード電極１７に高電圧が印
加された時にｐペース層１２および２層１２′からそれ
ぞれｎベース層１１および１層１１′側に伸びる空乏層
がこの溝２０の部分で断絶し、ブレークダウン電圧が著
しく低下するためである。If this is not done, the dirt electrode 16 and anode electrode 1
9 will be short-circuited, making it impossible to apply the start voltage to the GTO thyristor. t7f 2
A thin p layer is left below θ, and the high resistance of this p layer is used to electrically isolate the p base N12 and the pI sound 12'. If formed to a depth of , the electrical isolation will be complete. The reason why this is not done is if the p-pace layer 12 and the second layer 12'
If these are completely separated, when a high voltage is applied to the anode electrode 17, a depletion layer that extends from the p-space layer 12 and the second layer 12' to the n-base layer 11 and the first layer 11', respectively, will form in this groove 20. This is because the voltage is disconnected and the breakdown voltage drops significantly.
ところで第１図の構造で大電流の素子を構成した場合、
溝２θの長さが長くなるので、電気的分離を十分なもの
とするためには、溝２０の下に残されるｐ層をできるだ
け薄くすることが必要となる。しかしながら、残される
ｐ層を余り薄くすると、溝２０を形成する際のエツチン
グの不均一性のため場所によって極端に薄くなることが
ある。こうなると、アノード電極１７に高電圧が印加さ
れたときに溝２０の下のｐ層が全て空乏化してしまい、
更に電圧がかかると第１図に破線で示したように、ｎベ
ース層１１．１層１１’側へのびる空乏層が溝２０の下
では薄くなる。溝２０の下のｐ層が完全に空乏化すると
、それ以上電界がかかってもここに負電荷が供給されな
くなるためである。従ってこの１７４２０の下の部分で
は、他の部分に比べて薄い空乏層で同じ電界を保持しな
ければならなくなり、逆耐圧が低下してしまうという問
題があった。By the way, when a large current element is configured with the structure shown in Figure 1,
Since the length of the groove 2θ becomes longer, it is necessary to make the p layer left under the groove 20 as thin as possible in order to ensure sufficient electrical isolation. However, if the remaining p-layer is made too thin, it may become extremely thin in some places due to non-uniform etching when forming the grooves 20. In this case, when a high voltage is applied to the anode electrode 17, the entire p-layer under the groove 20 becomes depleted.
When a further voltage is applied, the depletion layer extending toward the n-base layer 11.1 layer 11' becomes thinner under the groove 20, as shown by the broken line in FIG. This is because when the p-layer under the groove 20 is completely depleted, no negative charge is supplied thereto even if an electric field is applied any further. Therefore, in the portion below the 17420, the same electric field must be maintained by a depletion layer that is thinner than in other portions, resulting in a problem that the reverse breakdown voltage is lowered.
本発明は上記の点に鑑み、大電流素子での逆耐圧の低下
を防止した逆導通ＧＴＯサイリスタ装置を提供すること
を目的とする。In view of the above points, it is an object of the present invention to provide a reverse conduction GTO thyristor device that prevents a reduction in reverse breakdown voltage in a large current element.
本発明は、ＧＴＯと逆導通ダイオードとを溝により分離
して同一半導体ウェハに一体形成するｔ＋Ｉ造において
、溝の表面に絶縁膜を介して制御電極を設け、この電極
の電位をＧＴＯのゲート電極または逆導通ダイオードの
アノード電極と共通′電位に設定したことを特徴として
いる。The present invention provides a t+I structure in which a GTO and a reverse conduction diode are separated by a groove and integrally formed on the same semiconductor wafer, and a control electrode is provided on the surface of the groove via an insulating film, and the potential of this electrode is applied to the gate electrode of the GTO. Alternatively, it is characterized in that it is set at a common potential with the anode electrode of the reverse conduction diode.
本発明によれば、分離溝上の制御電極がいわゆるフィー
ルドプレートと類似の働きをする結果、溝を十分深くし
た場合にも溝の下で空乏層が十分に伸び、従来のような
逆耐圧の劣化が防止される。According to the present invention, as a result of the control electrode on the isolation trench having a similar function to a so-called field plate, even if the trench is made deep enough, the depletion layer is sufficiently extended under the trench, and the reverse breakdown voltage deteriorates as in the conventional method. is prevented.
また本発明によれば、溝の下に薄いｐｍを残すことなく
、溝をｎ層に達する深さに形成してＧＴＯと逆導通ダイ
オードの分離を完全なものとした場合にも、同様にこの
溝の部分で空乏層を伸ばすことができ、逆耐圧の劣化を
少なくすることができる。Furthermore, according to the present invention, even when the groove is formed deep enough to reach the n-layer without leaving a thin PM layer under the groove to completely isolate the GTO and the reverse conduction diode, the same effect can be achieved. The depletion layer can be extended in the groove portion, and deterioration of reverse breakdown voltage can be reduced.
本発明の一実施例の逆導通ＧＴＯサイリスタを第２図に
示す。第１図と対応する部分には同一符号を付して詳細
な説明を省く。第１図と異なる点は、ＧＴＯと逆導通ダ
イオードを分離する溝２０の表面にＳｉＯ２膜等の絶縁
膜２ノを介して制御電極２２を配設していることである
。この実施例の場合、溝２０上の制御電ｔ！ｌ１ｉ２２
はＧＴＯのダート電極１６と連続的に形成され、従って
ダし
一ト電極１６と同電位に保〜れるようになっている。A reverse conducting GTO thyristor according to an embodiment of the present invention is shown in FIG. Portions corresponding to those in FIG. 1 are designated by the same reference numerals and detailed explanations will be omitted. The difference from FIG. 1 is that a control electrode 22 is provided on the surface of a groove 20 separating the GTO and the reverse conducting diode with an insulating film 2 such as a SiO2 film interposed therebetween. In this embodiment, the control voltage t! on the groove 20! l1i22
is formed continuously with the dirt electrode 16 of the GTO, and is therefore kept at the same potential as the dirt electrode 16.
この素子の製造プロセスは、例えばｎ型シリコンウェハ
にｐ型層を拡散形成し、ｐ型層表面にｎエミッタとなる
ｎ層層を拡散形成し、ｎ型層表面にはｐエミッタとなる
ｐ層層および逆導通ダイオードのカソード領域となるｎ
層を拡散形成する。この後、ＧＴＯサイリスタのダート
電極領域を２０〜３０μｍエツチングしてｎエミッタを
複数個に分割し、更にＧＴＯサイリスタと逆導通ダイオ
ードを分離する溝２０をエツチングにより形成する。こ
の後全面に５ＩＯ２膜等の絶縁膜２１を形成し、これに
コンタクト穴を６けてＡｌ膜を蒸着し、ＰＥＰによって
ＧＴＯのカソード電極ｘｓ、ｙｒ−ト電極１６、逆導通
ダイオードのアノード電極１９を形成する。このとき、
ダート電極１６を溝２０の領域をおおうように延在させ
た制御電極２２を同時に形成する。裏面にはＧＴＯのア
ノード電極１７を形成する。The manufacturing process for this element is, for example, to form a p-type layer by diffusion on an n-type silicon wafer, to form an n-layer that will become an n-emitter on the surface of the p-type layer, and to form a p-layer that will become a p-emitter on the surface of the n-type layer. layer and the cathode region of the reverse conduction diode.
Diffusion formation of layers. Thereafter, the dirt electrode region of the GTO thyristor is etched by 20 to 30 .mu.m to divide the n emitter into a plurality of parts, and a groove 20 separating the GTO thyristor and the reverse conduction diode is formed by etching. After that, an insulating film 21 such as a 5IO2 film is formed on the entire surface, 6 contact holes are made in this, an Al film is deposited, and the cathode electrode xs of the GTO, the yr-to electrode 16, and the anode electrode 19 of the reverse conduction diode are formed by PEP. form. At this time,
A control electrode 22 in which the dart electrode 16 is extended to cover the region of the groove 20 is formed at the same time. A GTO anode electrode 17 is formed on the back surface.
このような構造とすれば、溝２０上の制御電極２２は、
高耐圧素子で知られるフィールドグレートと類似の働き
によってその下での空乏層の伸びを助長する。このため
、溝２０を深くしてその下に残されるｐ層の厚みを薄く
した場合にも、アノード側に変電圧が印加されたときの
ｎペース層１１およびｎ層１１′側に伸びる空乏層の先
端が図に破線で示すように直線状につながった状態が得
られる。従って従来のような逆耐圧の劣化を防止するこ
とができる。With such a structure, the control electrode 22 on the groove 20 is
It promotes the expansion of the depletion layer underneath by a function similar to that of the field grating known for high voltage devices. Therefore, even when the groove 20 is deepened and the thickness of the p layer left below is made thinner, the depletion layer that extends toward the n-paste layer 11 and n-layer 11' side when a variable voltage is applied to the anode side. A state in which the tips of the two are connected in a straight line as shown by the broken line in the figure is obtained. Therefore, it is possible to prevent the reverse breakdown voltage from deteriorating as in the conventional case.
上記実施例では、溝２０上の制御電極２２をＧＴＯのダ
ート電極１６と一体形成したが、逆導通グイオート９の
アノード電極１９と一体形成してもよい。またこの制御
電極２２は機械＋７’ｙには他の電極から分離されてい
ても、外部で電気的にダート電極１６ある。いはアノー
ド電極ｔ極１９と同電位に設定されればよい。In the above embodiment, the control electrode 22 on the groove 20 is formed integrally with the dart electrode 16 of the GTO, but it may be formed integrally with the anode electrode 19 of the reverse conduction guide 9. Further, this control electrode 22 is electrically connected to the dirt electrode 16 on the outside even though it is separated from other electrodes in the machine +7'y. Alternatively, it may be set to the same potential as the anode electrode t-pole 19.
また上記実施例では溝２０の下にｐ層を薄く残して、そ
の高抵抗層によりＧＴＯサイリスクと逆導通ダイオード
を分離したが、この発明においては溝２０をｎベース層
に達する深さまで形成してもよい。Furthermore, in the above embodiment, a thin p layer was left under the groove 20, and the high resistance layer separated the GTO silicon risk and the reverse conduction diode, but in the present invention, the groove 20 is formed to a depth that reaches the n base layer. Good too.
第３図は、第２図を変形した実施例で、溝２０をｎイー
１層１ノに達する深さに形成し、かつこの溝２０上の制
御電極２２を逆導通ダイオードのアノード電極１９と一
体形成したものである。FIG. 3 shows an embodiment that is a modification of FIG. 2, in which a groove 20 is formed to a depth reaching one layer and one layer, and a control electrode 22 on this groove 20 is connected to an anode electrode 19 of a reverse conduction diode. It is integrally formed.
この実施例の場合、溝２０の下にｐ層がないが、やはり
制御電極２２によるフィールドプレートの効果によって
この溝２０の下のｎ層にも破線で示すように空乏層が伸
び、逆耐圧の劣化が防止される。逆耐圧劣化の防止効果
は勿論光の実施例に比べると小さいが、ＧＴｏのｐペー
ス層１２と逆導通ダイオードのｐＨ１２’とを完全に分
離して誤動作を確実に防止することができる点で有用で
ある。In this embodiment, there is no p-layer under the groove 20, but due to the field plate effect of the control electrode 22, a depletion layer also extends to the n-layer under the groove 20, as shown by the broken line, and the reverse breakdown voltage increases. Deterioration is prevented. Although the effect of preventing reverse breakdown voltage deterioration is of course smaller than in the optical embodiment, it is useful in that it is possible to completely separate the GTo p space layer 12 and the pH 12' of the reverse conduction diode to reliably prevent malfunctions. It is.
第１図は従来の逆導通ＧＴＯサイリスタの断面構造を示
す図、第２図は本発明の一実施例に係る逆導通ＧＴＯサ
イリスタの断面構造を示す図、第３図は他の実施例に係
る逆導通ＧＴＯザイリスタの断面構造を示す図である。
１１・・・ｎベース層、１１′・・・ｎ層、１２・・・
ｐペース層、１２′・・・ｐ層、１３・・・ｎエミツタ
層、１４・・・ｐエミッタ層、１５・・・ＧＴＯカソー
ド電極、１６・・・ＧＴＯデート電極、１７・・・ＧＴ
Ｏアノード電極（兼ダイオードカソード電極）、１８・
・・ｎ層層、１９・・・ダイオードアノード電極、２ｏ
・・・溝、２１・・・絶縁膜、２２・・・制御電極。FIG. 1 is a diagram showing a cross-sectional structure of a conventional reverse conducting GTO thyristor, FIG. 2 is a diagram showing a cross-sectional structure of a reverse conducting GTO thyristor according to one embodiment of the present invention, and FIG. 3 is a diagram showing a cross-sectional structure of a conventional reverse conducting GTO thyristor. FIG. 3 is a diagram showing a cross-sectional structure of a reverse conduction GTO zyristor. 11...n base layer, 11'...n layer, 12...
p space layer, 12'... p layer, 13... n emitter layer, 14... p emitter layer, 15... GTO cathode electrode, 16... GTO date electrode, 17... GT
O anode electrode (also diode cathode electrode), 18.
...N-layer layer, 19...Diode anode electrode, 2o
...Groove, 21...Insulating film, 22...Control electrode.
Claims (2)
ドとを溝により′眠気的に分離して同ご半導体ウェハに
一体形成してなる装置において、前記溝の表面に絶縁膜
を介して制御電極を設け、この制御？■極の電位を前記
ダートターンオフサイリスタのダート電極または逆導通
ダイオードのアノード電極と共通電位に設定したことを
特徴とする逆導通ケ９−トターンオフサイリスタ装置。(1) In a device in which a dirt turn-off thyristor and a reverse conduction diode are drowsily separated by a groove and integrally formed on the same semiconductor wafer, a control electrode is provided on the surface of the groove with an insulating film interposed therebetween; control? (2) A reverse conduction turn-off thyristor device, characterized in that the potential of the pole is set to a common potential with the dirt electrode of the dirt turn-off thyristor or the anode electrode of the reverse conduction diode.
を極は、前記ダートターンオフサイリスタのダート１ｉ
Ｌ極または逆導通ダイオードのアノード電極ｉ極と連続
的に形成されたものである特許請求の範囲第１項記載の
逆導通ダートターンオフサイリスタ装置。(2) Control H71 provided on the surface of the groove via an insulating film
The pole is the dart 1i of the dart turn-off thyristor
The reverse conduction dirt turn-off thyristor device according to claim 1, which is formed continuously with the L pole or the anode electrode i-pole of the reverse conduction diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5060184A JPS60194563A (en) | 1984-03-16 | 1984-03-16 | Reverse conduction gate turn off thyristor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5060184A JPS60194563A (en) | 1984-03-16 | 1984-03-16 | Reverse conduction gate turn off thyristor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60194563A true JPS60194563A (en) | 1985-10-03 |
Family
ID=12863482
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5060184A Pending JPS60194563A (en) | 1984-03-16 | 1984-03-16 | Reverse conduction gate turn off thyristor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60194563A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62205661A (en) * | 1986-03-05 | 1987-09-10 | Mitsubishi Electric Corp | Manufacture of reverse conducting gto |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5230166A (en) * | 1975-09-03 | 1977-03-07 | Hitachi Ltd | Method for fabrication of semiconductor device |
| JPS5453972A (en) * | 1977-10-07 | 1979-04-27 | Nec Corp | Reverse conducting thyristor |
| JPS55165650A (en) * | 1979-06-12 | 1980-12-24 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor integrated circuit |
-
1984
- 1984-03-16 JP JP5060184A patent/JPS60194563A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5230166A (en) * | 1975-09-03 | 1977-03-07 | Hitachi Ltd | Method for fabrication of semiconductor device |
| JPS5453972A (en) * | 1977-10-07 | 1979-04-27 | Nec Corp | Reverse conducting thyristor |
| JPS55165650A (en) * | 1979-06-12 | 1980-12-24 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor integrated circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62205661A (en) * | 1986-03-05 | 1987-09-10 | Mitsubishi Electric Corp | Manufacture of reverse conducting gto |
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