JPS60194352U - flat semiconductor stack - Google Patents
flat semiconductor stackInfo
- Publication number
- JPS60194352U JPS60194352U JP8271084U JP8271084U JPS60194352U JP S60194352 U JPS60194352 U JP S60194352U JP 8271084 U JP8271084 U JP 8271084U JP 8271084 U JP8271084 U JP 8271084U JP S60194352 U JPS60194352 U JP S60194352U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor stack
- flat semiconductor
- semiconductor
- flat
- stack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Conversion In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例に足る平型半導体スタックの
正面図、第２図、第３図は同スタックのバランス用リア
クタンスの構造を示す図、第４図は並列接続゛された半
導体素子の回路図、第５図は従来の平型半導体のスタッ
クの回路構成を示す図、第６図は従来の平型半導体スタ
ックの正面図である。
１０．１１・・・半導体素子、２０．２１・・・バラン
ス用リアクトル、７０．７１・・・鉄芯、４０．４１・
・・導体、５０，５１，５２，５３・・・冷却ライン、
６０．６２・・・冷却フィンの軸部。Figure 1 is a front view of a flat semiconductor stack that is an embodiment of the present invention, Figures 2 and 3 are diagrams showing the structure of the balancing reactance of the stack, and Figure 4 is a diagram showing semiconductors connected in parallel. A circuit diagram of the device, FIG. 5 is a diagram showing the circuit configuration of a conventional flat semiconductor stack, and FIG. 6 is a front view of the conventional flat semiconductor stack. 10.11...Semiconductor element, 20.21...Balance reactor, 70.71...Iron core, 40.41.
...Conductor, 50, 51, 52, 53...Cooling line,
60.62...Shaft of cooling fin.
Claims (1)
ンス用リアクトルが直列接続された平型半導体スタック
において、前記半導体素子の冷却フィンの突出させた軸
部のまわりに鉄芯を装着することにより前記バランス用
リアクトルを前記半導体素子と一体化したことを特徴と
する平型半導体スタック。 ２ 前記バランス用リアクトルが向き合うようにして２
つの前記半導体素子を配置したことを特徴とする実用新
案登録請求の範囲第１項記戦の平型半導体スタック。[Claims for Utility Model Registration] 1. In a flat semiconductor stack in which a balancing reactor is connected in series to each of a plurality of semiconductor elements connected in parallel, iron is provided around the protruding shaft portion of the cooling fin of the semiconductor element. A flat semiconductor stack, characterized in that the balancing reactor is integrated with the semiconductor element by attaching a core. 2 With the balance reactors facing each other, 2
1. A flat semiconductor stack according to claim 1, characterized in that two of the semiconductor elements are arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8271084U JPS60194352U (en) | 1984-06-04 | 1984-06-04 | flat semiconductor stack |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8271084U JPS60194352U (en) | 1984-06-04 | 1984-06-04 | flat semiconductor stack |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60194352U true JPS60194352U (en) | 1985-12-24 |
Family
ID=30630667
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8271084U Pending JPS60194352U (en) | 1984-06-04 | 1984-06-04 | flat semiconductor stack |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60194352U (en) |
-
1984
- 1984-06-04 JP JP8271084U patent/JPS60194352U/en active Pending
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