JPS6019076B2 - arithmetic device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an arithmetic device for calculating the real time of editing contents in editing work of video tapes, etc.
MPTE (Society of MotionPjc)
The time code (hereinafter simply referred to as the SMPTE code) standardized by tmeandTelevisionEngnee.

) The present invention relates to an arithmetic device that directly performs addition or subtraction by one in the time given by ). N.T.S.
C (Nation Television S)
emCommi e) The frame frequency of the color video signal is set at 2997...HZ, and SMM, E
In the code, the correspondence between time and frames is corrected by creating drop frame addresses for two frames every minute, excluding every 10 minutes.

When performing calculations on the time given by such an SMSPTE code, if the calculations are performed as is, an error of 2 frames due to the above-mentioned dropped frame will occur depending on the calculation conditions. In order to avoid errors caused by the above-mentioned drop frames, conventionally all hours, minutes, seconds, and frames of a given time are converted into the minimum unit of frames, and addition or subtraction operations are performed on the number of frames. , a calculation means is used that returns the calculation results to hours, minutes, seconds, and frames. With such conventional calculation means, the calculation method is simple, but the amount of calculation is extremely large.Moreover, the conversion from hours, minutes, seconds, and frames to the number of frames, and vice versa, is required for the drop frame of the SMPTE code. It must be done according to regularity.
Therefore, in order to construct the arithmetic means, it is necessary to use an arithmetic device having at least the arithmetic ability and speed of a minicomputer. If an arithmetic device is configured using a microprocessor, it is possible to perform arithmetic operations, but the arithmetic operations take too much time and cannot be put to practical use. Therefore, in view of the problems of the conventional method as described above, the present invention makes it possible to directly calculate the time given by the SMPTE code by performing correction processing in accordance with the regularity of drop frames, without converting it into the number of frames. This reduces the amount of calculations and shortens the calculation time, increasing the calculation capacity to 4.
・The aim is to provide a calculation layer with a sufficiently practical configuration using microprocessors and the like. Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment.

The configuration of an embodiment of the present invention is shown in the block diagram of FIG.

In FIG. 1, 1 is a first data input terminal to which a first time data signal X is supplied, 2 is a second data input terminal to which a second time data signal Y is supplied, and 3 are command signal input terminals to which first arithmetic command signals ADD and /SUB for selectively instructing addition or subtraction arithmetic operations for the respective time data signals X and Y are supplied. Here, each of the above-mentioned time data signals is, for example, NTSC.
It shows the time numbered using the SMPTE code on a videotape on which a color video signal is recorded. Furthermore, it is assumed that the first arithmetic command signals ADD, /SUB indicate addition ADD when the logic is "1", and indicate subtraction SUB when the logic is "0". The first operation command signal is the first operation command signal.
V is supplied to the arithmetic circuit 4, the first correction command circuit 5, and the second correction command circuit 6.

The first arithmetic circuit 4 receives first and second time data signals x via first and second data input terminals 1 and 2.
, Y are supplied, and the first arithmetic command signal ADD
, /SUB, the addition or subtraction operation is performed on each of the data signals X and Y according to the logic values "1" and "0" of the signals X and Y, respectively.

This first arithmetic circuit 4 not only has the arithmetic operation function described above, but also detects the presence or absence of a carry or a borrow in the arithmetic operation.
A first calculation output signal Z'' is output from the first output terminal 4a by calculating the first formula, and a carry or a carry between seconds and minutes in the calculation of the first formula is A first digit signal C4/& indicating the presence or absence of digit borrowing is output from the second output terminal 4b, and a second digit signal indicating the presence or absence of carry or digit borrowing between 1 minute and 10 minute units. Signal C
5/B is output from the third output terminal 4c.

That is, the first arithmetic circuit 4 performs an arithmetic operation of summation or subtraction on two input time data corresponding to the SMMm code, and outputs arithmetic output data and a digit signal indicating the presence or absence of a carry or borrow in the arithmetic operation. It constitutes arithmetic means for outputting.

The first calculation output signal Z'' from the first calculation circuit 4 is supplied to the second calculation circuit 7.

Further, the first digit signal C4/& is provided to the first correction command circuit 5. Furthermore, the second digit signal C5/B
5 is supplied to the first correction command circuit 5 and the second correction command circuit 6. Here, each digit signal C4/B
4, C4/B5 indicates with logic "1" that there is a carry or borrow in the calculation of the first equation, and if there is no carry or borrow, it becomes logic "0". The first correction command circuit 5 receives the first calculation command signal ADD. /
SUB,, first and second digit signals C4/B4, Q/&
Then, perform the actions shown in the truth table in Table 1, and get the first result.
The first correction signal P is output from the output terminal 5a of
Output 2/SUB2.

Table 1 The first Tosuzuba Risho is the Urashiki Tawara Here, in Table 1, * indicates which logic is “1” or “0” since the first correction signal P is data “0”. It may be a value.

The first and second output terminals 6a of the correction command circuit 5,
The first correction signal P and second arithmetic command signal ADD2/SUB2 outputted from 5b are fed to the second arithmetic circuit 7.

Here, the second arithmetic command signal ADD2/SUB2 indicates addition ADD2 at logic "1" and indicates subtraction SU "B2" at logic "0". The logical value of the operation instruction signal ADD2/SUB2 is "1""
0'', for the first calculation output signal 〆 and the first correction signal P, Z''P=Z'......
...Performs the calculation operation of addition or subtraction expressed by the second equation, and outputs the second calculation output signal from the output terminal 7a.

That is, the first correction command circuit 5 and the second arithmetic circuit 7 described above perform the calculation when a carry occurs only between seconds and minutes in the arithmetic operation of the upper orbit first arithmetic circuit 4.・12 frames, -2 frames when a carry occurs only between 1 minute and 10 minutes, or 1 frame when a carry occurs only between seconds and minutes. 2
A correction value for 12 frames is applied to the first arithmetic output signal from the first arithmetic circuit 4 when a digit is borrowed only between one minute unit and ten minute unit. This constitutes the first correction means. The second calculation output signal Z' is supplied to the drop frame detection circuit 8 and the third calculation circuit 6. The drop frame detection circuit 8 detects the regularity of the drop frame of the SM circle TE code by detecting the time data indicated by the second calculation output signal Z' that has been subjected to the correction process according to the first correction command circuit 5. This is to detect whether or not the

That is, in the time given by the SMPTE code, *
*hour*0 minute 0 town sand 00 frame or ※※hour*0 minute 0
At a time other than the 0 second 01 frame, 00 frame or 01 frame must not exist in the ※※ hour 3 ※※ minute 0 sand ※※ frame, so the above! 00 frame or 01 during the time indicated by the second calculation output signal Z'
Detects whether the frame corresponds to a drop frame and if it corresponds to a drop frame, the logic
1” and does not support drop frames, the logic is “0”.
” is supplied to the second correction command circuit 6. Then, the second correction command circuit 6 calculates the truth table of the second table from the supplied first operation command signals ADD, /SU]B, second digit signal C5/B5, and detection signal DF. The operation as shown is performed, and the second correction signal Q is output from the first output terminal 6a, and the third arithmetic command signal ADD3/SUB3 is output from the second output terminal 6b.

However, in Table 2, since the second correction signal Q is data "0", * may be either a logical value of "1" or "0".

Table 2 Truth table showing the vehicle material of the second correction command circuit First and second output terminals 6a of the second correction command circuit 6
, 6b and the third arithmetic command signal ADD3/SUB are supplied to the third arithmetic circuit 9.

The third arithmetic circuit 9 outputs a second arithmetic output signal Z' and a second correction signal in accordance with the logic value "1" or "0" of the combined third arithmetic command signal ADD3/SUB3. With respect to

That is, the drop frame detection circuit 8, the second correction command circuit 6, and the third arithmetic circuit 9 use the time data given by the second arithmetic output signal Z' from the second arithmetic circuit 7 as SMPTE. When the code does not conform to the drop frame regularity, if the first arithmetic circuit 4 is performing an addition operation and no carry occurs between the 1-minute unit and the 10-minute unit, the 12th frame , otherwise constitutes a second correction means for applying correction values for one or two frames to the second calculation output signal Z'.

Next, an example of calculation according to the embodiment having the above-mentioned configuration will be shown below.

1st calculation example 2nd calculation example 3rd calculation example 4th calculation example 5th calculation example 6th calculation example 7th calculation example 8th calculation example 9th calculation example 10th calculation example In this embodiment, which performs the calculations shown in the first to tenth calculation examples above, time can be calculated by correcting all errors caused by drop frames of the SMPTE code.

Moreover, since the given time data is directly calculated without converting it into the number of frames, it is possible to reduce the amount of calculation and shorten the calculation time. Note that the above calculation example does not deal with units of 10 minutes or more,
Since the drop frame of the SMPTE code is completed every 10 minutes, calculations can be performed directly for units of 10 minutes or more without correction. As is clear from the description of the embodiments above, according to the present invention, SMP
TE code' A calculation means that performs an addition or subtraction operation on two corresponding input time data and outputs calculation output data and a digit signal indicating the presence or absence of a carry or borrow in the calculation; 12 frames when a carry occurs only between seconds and minutes, -2 frames when a carry occurs only between 1 minute and 10 minutes, or seconds -2 when there is a borrowing only between and the minute unit.
a first correction means for applying a correction value of 12 frames to the calculation output data from the calculation means when a borrow occurs only between frames, 1 minute unit and 10 minute unit; When the calculation output data corrected by the correction means does not conform to the regularity of the drop frame of the SM circle TE code, the calculation means performs an addition operation and the data is added in 1-minute and 10-minute units. drop of the SM circle TE code. The time after correcting all errors caused by frames can be calculated immediately after calculation, and since the time data is calculated directly without converting it to the number of frames, the amount of calculation and calculation time can be reduced, and the calculation power is small. Even when configured using a microprocessor or the like, a sufficiently practical arithmetic device can be provided.

Therefore, the intended purpose can be fully achieved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. 4, 7, 9... Arithmetic circuit, 5... 1st
correction command circuit, 6... second correction command circuit, 8.
...Drop frame detection circuit. Figure 1

Claims (1)

[Claims] 1 A calculation means that performs an addition or subtraction operation on two input time data corresponding to the SMPTE code and outputs calculation output data and a digit signal indicating the presence or absence of carry or debit in the calculation, and +2 frames when a carry occurs only between seconds and minutes, -2 frames when a carry occurs only between 1 minute and 10 minutes, or -2 frames when a carry occurs only between seconds and minutes. A correction value of -2 frames is applied when a borrow occurs only between minute units, and a +2 frame correction value is applied when a borrow occurs only between 1 minute unit and 10 minute units. A first correction means applied to the calculation output data, and when the calculation output data corrected by the first correction means does not conform to the regularity of the drop frame of the SMPTE code, the calculation means performs an addition operation. and a second correction means that applies a correction value of +2 frames to the calculation output data if no carry occurs between the 1-minute unit and the 10-minute unit, and -2 frames in other cases. A computing device comprising: