JPS6018975A - Semiconductor light-receiving element - Google Patents
Semiconductor light-receiving elementInfo
- Publication number
- JPS6018975A JPS6018975A JP58127301A JP12730183A JPS6018975A JP S6018975 A JPS6018975 A JP S6018975A JP 58127301 A JP58127301 A JP 58127301A JP 12730183 A JP12730183 A JP 12730183A JP S6018975 A JPS6018975 A JP S6018975A
- Authority
- JP
- Japan
- Prior art keywords
- light
- layer
- stem
- depletion layer
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 18
- 230000000694 effects Effects 0.000 abstract description 7
- 230000031700 light absorption Effects 0.000 abstract description 5
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 abstract description 3
- 230000003287 optical effect Effects 0.000 abstract description 3
- 230000010355 oscillation Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 6
- 230000005684 electric field Effects 0.000 description 6
- 239000000969 carrier Substances 0.000 description 3
- 230000001133 acceleration Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 240000002329 Inga feuillei Species 0.000 description 1
- 238000000098 azimuthal photoelectron diffraction Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0232—Optical elements or arrangements associated with the device
- H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
(11発明の技術分野
本発明は光通信用半導体受光素子、特にアバランシェフ
ォトダイオード(avalancl+e photo
diode+以下APDと略記する)を形成したチップ
のステムへの取付は角度の改善に関する。Detailed Description of the Invention (11) Technical Field of the Invention The present invention relates to a semiconductor light-receiving element for optical communications, particularly an avalanche photodiode (avalanche photodiode).
Attachment of a chip formed with a diode+hereinafter abbreviated as APD to the stem relates to improvement of the angle.
(2)技術の背景
APDはpn接合に逆方向電圧を印加してそれに隣接し
た高電界領域(空乏層)を形成し、この高電界によって
入射光で化成されたキャリアを加速し、この加速キャリ
アと束縛キャリアとの衝突電離から引き起されるなだれ
現象を利用しC大きな光電流を得る半導体受光素子であ
る。(2) Background of the technology APD applies a reverse voltage to a pn junction to form a high electric field region (depletion layer) adjacent to it, and this high electric field accelerates carriers chemically converted by incident light. This is a semiconductor photodetector that obtains a large photocurrent by utilizing the avalanche phenomenon caused by collision ionization between C and bound carriers.
第1図はインジウム・燐(InP)/インジウム・ガリ
ウム・砒素・燐(InGaAsP )系化合物半導体か
ら形成されるヘテロ構造AI’Dの断面図で、同図にお
いて1はn+形InP半導体基板、2はn形InP M
、3は光吸収層となるn形1nGaAsJ!もしくはI
nGaAsP Iii、 4は増倍層となる1]形In
P層で、上記各層はエピタキシャル成長法によって形成
される。また符号5は表面保護のための酸化膜、6およ
び7は電極、8ばp+拡散屓、9は前記拡散層8の端部
での電界集中を防止し、一様な増倍を行うためのp膨拡
散層からなるガードリング(guard ring)を
示し、このガードリング9の耐圧はp+拡散層8の下に
おける側圧より高くなっている。Figure 1 is a cross-sectional view of a heterostructure AI'D formed from an indium-phosphorus (InP)/indium-gallium-arsenic-phosphorus (InGaAsP)-based compound semiconductor, in which 1 is an n+ type InP semiconductor substrate, 2 is n-type InP M
, 3 is n-type 1nGaAsJ! which becomes the light absorption layer. Or I
nGaAsP III, 4 becomes the multiplication layer 1] type In
The P layer is formed by epitaxial growth. Further, numeral 5 is an oxide film for surface protection, 6 and 7 are electrodes, 8 is a diffusion layer, and 9 is an oxide film for preventing electric field concentration at the end of the diffusion layer 8 and for uniform multiplication. A guard ring made of a p-swelled diffusion layer is shown, and the breakdown voltage of this guard ring 9 is higher than the lateral pressure under the p+ diffusion layer 8.
かかる構造の^PDにおいて電極6が正、電極7が負の
極性となる逆方向高電圧を印加すると、p+拡散屓8の
下にInGaAs1i a内まで三角形に延びる空乏層
11が形成される。When a reverse high voltage is applied such that the electrode 6 has a positive polarity and the electrode 7 has a negative polarity in a PD having such a structure, a depletion layer 11 is formed below the p+ diffusion layer 8 and extends into the InGaAs 1ia in a triangular shape.
受光面10に入射した光hνは主として上記空乏1it
ll中で吸収されて電子−正孔対を生成する。この発生
した光キャリアは、空乏層11中の電界により加速され
ながら結晶原子の束縛キャリアをfljl電撃してなだ
れ現象を発生させる。かくして小さな一次電流から大き
な光電流が得られる、すなわち高い受光感度が得られる
。The light hν incident on the light-receiving surface 10 is mainly caused by the depletion 1it
ll to generate electron-hole pairs. The generated photocarriers are accelerated by the electric field in the depletion layer 11 and fljl electrically impact the bound carriers of the crystal atoms, causing an avalanche phenomenon. In this way, a large photocurrent can be obtained from a small primary current, that is, a high light-receiving sensitivity can be obtained.
ところで空乏層11外で発生した光キャリアは、拡散に
よって空乏層11まで移動した後、上記なだれ現象に寄
与する。従って、空乏層11外での光キャリアの発生が
多いと拡散に時間がとられて受光素子の応答速度が遅く
なる原因となる。そのため空乏層11はできるだけIn
GaAs層3内へ深く延ばして電界加速効果を高めるこ
とが速い応答速度を得るには必要とされる。By the way, photocarriers generated outside the depletion layer 11, after moving to the depletion layer 11 by diffusion, contribute to the avalanche phenomenon described above. Therefore, if a large number of photocarriers are generated outside the depletion layer 11, it takes time for diffusion, which causes a slow response speed of the light receiving element. Therefore, the depletion layer 11 is made of In as much as possible.
Extending the field deeply into the GaAs layer 3 to enhance the electric field acceleration effect is required to obtain a fast response speed.
しかし、空乏層を深くすると空乏層11の耐圧が高くな
りガードリング9との耐圧差が減少する結果、ガードリ
ング9の効果が弱くなる欠点がある。However, if the depletion layer is made deeper, the breakdown voltage of the depletion layer 11 increases and the breakdown voltage difference with the guard ring 9 decreases, resulting in a drawback that the effect of the guard ring 9 becomes weaker.
以上からAPDにおいては、受光面下の空乏層における
耐圧をガードリング領域の耐圧より低くし、かつ光吸収
による電子−正孔対発生を上記空乏層内で起るようにす
ることが必要とされる。From the above, in an APD, it is necessary to make the withstand voltage in the depletion layer under the light-receiving surface lower than the withstand voltage in the guard ring region, and to generate electron-hole pairs due to light absorption in the depletion layer. Ru.
(3)従来技術と問題点
従来APDが形成された半導体デツプは、第2図に示す
如く入射光hνが受光面に対し垂直に入射するようにス
テム22に取りイ」けられている。なおチップ21のス
テム22への取付けは例えば半田など通常の技術によっ
て行われ、また図中の符号23は^110の電極に接続
する配線を示す。(3) Prior Art and Problems The semiconductor depth on which the conventional APD is formed is arranged on the stem 22 so that the incident light hv is perpendicular to the light-receiving surface, as shown in FIG. Note that the chip 21 is attached to the stem 22 by a conventional technique such as soldering, and the reference numeral 23 in the figure indicates the wiring connected to the electrode ^110.
かかる配置であるので入射光は最短距離でInGaAs
N3に到達し、InGaAsJFf 3の上部だけでな
く内部においても電子−正孔対を発生させる。そのため
従来のAPDにおいては深く伸びた空乏層の形成が要求
されるが、空乏層を深く伸ばすと耐圧が高くなるため、
エピタキシャル層の厚さおよびキャリア濃度などの設計
値の余裕がなくなり耐圧設計が難しくなる問題がある。With this arrangement, the incident light can reach InGaAs at the shortest distance.
N3 and generates electron-hole pairs not only on the top of InGaAsJFf3 but also inside it. Therefore, in conventional APDs, it is required to form a depletion layer that extends deeply, but as the depletion layer extends deeply, the withstand voltage increases.
There is a problem in that there is no margin for design values such as the thickness of the epitaxial layer and the carrier concentration, making it difficult to design withstand voltage.
また受光面に垂直に入射した光hνは、反射後光源にも
どるためレーザの発光素子の発振モードを不安定にする
問題もある。Furthermore, since the light hv that is perpendicularly incident on the light receiving surface returns to the light source after being reflected, there is also the problem that it makes the oscillation mode of the laser light emitting element unstable.
(4)発明の目的
本発明は上記従来技術の問題点に鑑み、深い空乏層を必
要とせず、耐圧設計に余裕があり、かつ反射光が光源に
戻ることがない半導体受光素子の提供を目的とする。(4) Purpose of the invention In view of the problems of the prior art described above, the object of the present invention is to provide a semiconductor light-receiving element that does not require a deep depletion layer, has sufficient voltage resistance design, and prevents reflected light from returning to the light source. shall be.
(5)発明の構成
そしてこの目的は本発明によれば、アバランシエフ1
)ダイオードを形成した半導体チップをステムに取り付
けてなる半導体受光素子にして、該アバランシェフォト
ダイオードの受光面が入射光に対し所望の角度を形成す
る如く上記半導体チップを角度を設けてステムに取り付
けたことを特徴とする半導体受光素子を提供することに
よって達成される。(5) Structure of the invention and this object according to the invention
) A semiconductor light-receiving element is formed by attaching a semiconductor chip formed with a diode to a stem, and the semiconductor chip is attached to the stem at an angle so that the light-receiving surface of the avalanche photodiode forms a desired angle with respect to incident light. This is achieved by providing a semiconductor light-receiving element characterized by the following.
(6)発明の実施例 以下本発明実施例を図面により説明す、る。(6) Examples of the invention Embodiments of the present invention will be described below with reference to the drawings.
第3図はチップ31を取り付けたステム32の側面図で
、同図に示す如くステムのチップ取付は面を入射光hν
に対して角度θ(例えば70度)傾けて形成し、この傾
斜面にチップを例えば半田によって取り付ける。FIG. 3 is a side view of the stem 32 with the chip 31 attached. As shown in the figure, when the chip is attached to the stem, the incident light hv
The chip is attached to this inclined surface by, for example, solder.
上述したステム32の構成により、光hνはチップ31
上に形成されたAPDの受光面に従来の垂直方向から角
度θだけずれた入射角をもって入射する。Due to the structure of the stem 32 described above, the light hν is transmitted to the chip 31.
The light enters the light-receiving surface of the APD formed above at an incident angle deviated from the conventional vertical direction by an angle θ.
第4図は上記角度θをもった入射した光の進路を示す八
PDの部分断面図で、同図において第1図と同じ部分は
同じ符号を付して示す。FIG. 4 is a partial cross-sectional view of eight PDs showing the path of the incident light having the above-mentioned angle θ, and in this figure, the same parts as in FIG. 1 are designated with the same reference numerals.
受光面10に角度θをもって入射した光hνは、APD
内を斜めに進んでInGaAsm 3に到達するが、垂
直に入射した場合よりも長い距離を進むため実効的な層
厚が増加し、InGaAsJN 3までの厚さdがこれ
より大(d/cosθ)になる。The light hν incident on the light receiving surface 10 at an angle θ is APD
It travels diagonally inside and reaches InGaAsm 3, but because it travels a longer distance than if it were incident perpendicularly, the effective layer thickness increases, and the thickness d up to InGaAsJN 3 is larger than this (d/cos θ) become.
従って空乏層内を進む距離も増加するとともにInGa
As 3の上層部で光吸収による電子−正孔対の発生が
41で示す浅い空乏層で十分な電界加速効果を得ること
ができる。Therefore, as the distance traveled within the depletion layer increases, the InGa
A sufficient electric field acceleration effect can be obtained in the shallow depletion layer 41 in which electron-hole pairs are generated due to light absorption in the upper layer of As 3 .
かくして、空乏層を深く延ばすことによる耐圧増加をさ
けることができるので、耐圧設計におけるエピタキシャ
ル層め厚さおよびキャリア濃度に余裕をもたせることが
でき、またガードリングの効果および速い応答速度が十
分発揮されるようになる。なおチップの傾斜角度θば凸
円)の特性に応して適宜定める。In this way, it is possible to avoid an increase in breakdown voltage due to extending the depletion layer deeply, so it is possible to have leeway in the epitaxial layer thickness and carrier concentration in breakdown voltage design, and the effect of the guard ring and fast response speed can be fully utilized. Become so. Note that the inclination angle θ of the chip is determined as appropriate depending on the characteristics of the convex circle.
また本発明によれば、入射光のうち受光面で反射した光
が従来のように再び光源に戻ることがなくなるため、光
源の光発振モードが不安定になる問題も同時に解決され
る。Further, according to the present invention, the light reflected by the light-receiving surface out of the incident light does not return to the light source again as in the conventional case, so that the problem of unstable optical oscillation mode of the light source is also solved.
(7)発明の効果
以上詳細に説明した如く、本発明によれば半導体受光素
子の設計、特に耐圧設計に係わるエピタキシャル層の厚
さおよびキャリア濃度などのパラメータを余裕ある範囲
で決定することができるため、受光素子の製造における
歩留りの向」二に’J果がある。また本発明によれば素
子受光面での反射光が光源に戻ることがなくなるため発
光装置の雑音軽減に効果大である。(7) Effects of the Invention As explained in detail above, according to the present invention, parameters such as the epitaxial layer thickness and carrier concentration related to the design of a semiconductor photodetector, especially the breakdown voltage design, can be determined within a comfortable range. Therefore, there is a negative effect on the yield rate in the production of light receiving elements. Further, according to the present invention, reflected light on the light receiving surface of the element does not return to the light source, which is highly effective in reducing noise in the light emitting device.
第1図はアバランシェフォトダイオ−1”(APD)の
構造を示す断面図、第2図は従来における上記へPDを
形成したチップのステムへの取付は状態を示す当該ステ
ムの側面図、第3図は本発明に係わるチップの取付は状
態を示すステムの側面図、第4図は受光面が傾斜したA
PDにおける光吸収を示す当該APDの部分断面図であ
る。
1−n+形1nP半導体基板、2−n形InP層、3−
n形1nGaAs層、4−n形1nP層、5−酸化膜、
6.’l−電極、8−・p+拡散層、9−ガードリング
、1〇−受光面、LL 41.42−空乏層21、31
−一半導体チツブ、22.32−ステム、23−配線
特 許 出願人 富士通株式会社
第1図
第2図
第4図Fig. 1 is a cross-sectional view showing the structure of an avalanche photodiode-1'' (APD), Fig. 2 is a side view of the stem showing how the chip with the PD formed above is attached to the stem in the conventional manner, and Fig. 3 is a side view of the stem. The figure is a side view of the stem showing the state in which the chip is installed according to the present invention, and Figure 4 is a side view of the stem showing the state in which the chip is attached according to the present invention.
FIG. 3 is a partial cross-sectional view of the APD showing light absorption in the PD. 1-n+ type 1nP semiconductor substrate, 2-n type InP layer, 3-
n-type 1nGaAs layer, 4-n-type 1nP layer, 5-oxide film,
6. 'l-electrode, 8-/p+ diffusion layer, 9-guard ring, 10-light receiving surface, LL 41.42-depletion layer 21, 31
-1 Semiconductor chip, 22.32-Stem, 23-Wiring patent Applicant: Fujitsu Limited Figure 1 Figure 2 Figure 4
Claims (1)
プをステムに取り付けてなる半導体受光素子にして、該
アバランシェフォトダイオードの受光面が入射光に対し
所望の角度を形成する如く上記半導体チップを角度を設
けてステムに取り付けたことを特徴とする半導体受光素
子。A semiconductor light-receiving element is formed by attaching a semiconductor chip formed with an avalanche photodiode to a stem, and the semiconductor chip is attached to the stem at an angle such that the light-receiving surface of the avalanche photodiode forms a desired angle with respect to incident light. A semiconductor light-receiving element characterized by being attached.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58127301A JPS6018975A (en) | 1983-07-13 | 1983-07-13 | Semiconductor light-receiving element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58127301A JPS6018975A (en) | 1983-07-13 | 1983-07-13 | Semiconductor light-receiving element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6018975A true JPS6018975A (en) | 1985-01-31 |
Family
ID=14956568
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58127301A Pending JPS6018975A (en) | 1983-07-13 | 1983-07-13 | Semiconductor light-receiving element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6018975A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999035697A1 (en) * | 1997-12-30 | 1999-07-15 | Elpas Electro-Optic Systems Ltd. | Infrared receiver having improved spatial coverage |
-
1983
- 1983-07-13 JP JP58127301A patent/JPS6018975A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999035697A1 (en) * | 1997-12-30 | 1999-07-15 | Elpas Electro-Optic Systems Ltd. | Infrared receiver having improved spatial coverage |
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