JPS601882A - Semiconductor optical integrated circuit - Google Patents

Semiconductor optical integrated circuit

Info

Publication number
JPS601882A
JPS601882A JP10997583A JP10997583A JPS601882A JP S601882 A JPS601882 A JP S601882A JP 10997583 A JP10997583 A JP 10997583A JP 10997583 A JP10997583 A JP 10997583A JP S601882 A JPS601882 A JP S601882A
Authority
JP
Japan
Prior art keywords
fet
light emitting
optical integrated
integrated circuit
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10997583A
Other languages
Japanese (ja)
Inventor
Hiroshi Okuda
奥田 寛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP10997583A priority Critical patent/JPS601882A/en
Publication of JPS601882A publication Critical patent/JPS601882A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/026Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0261Non-optical elements, e.g. laser driver components, heaters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/50Amplifier structures not provided for in groups H01S5/02 - H01S5/30

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Lasers (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To enable to perform the reductions in the weight and size of an optical integrated circuit having a photoamplifying function by forming a light emitting element and two FETs on the same substrate, and providing the functions of a receiver and an amplifier in one FET. CONSTITUTION:A semiconductor laser having a P type InP clad layer 2, a P type InGaAsP active layer 5, and an N type InP layer 8; the first junction type FET having a source 7, a gate 9, a drain 12, and the second juction type FET having a source 10, a gate 11 and a drain 13 are formed on an InP semi-insulating substrate 1. The first FET is a semiconductor laser driver, a suitably voltage is applied to the gate 11 of the second FET to flow a current amplified by the light signal from the exterior. In this manner, the laser produces a laser produces a laser oscillation, and the light signal incident from the exterior is amplified.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体光集積回路に関するものである。[Detailed description of the invention] 〔Technical field〕 The present invention relates to semiconductor optical integrated circuits.

〔背景技術〕[Background technology]

従来より汎く用いられている光増幅回路を第1図に示す
。第1図の回路は発光素子、受光素子、14T等の個々
の素子より構成されている。そのため素子全体のザイズ
は大きく、重111:も重い。実用上軽量コンパクト化
が望まれ、これを実現するには集積化が必要である。
FIG. 1 shows an optical amplification circuit that has been widely used in the past. The circuit shown in FIG. 1 is composed of individual elements such as a light emitting element, a light receiving element, and a 14T. Therefore, the size of the entire element is large and the weight is 111: heavy. In practice, it is desirable to make the device lightweight and compact, and to achieve this, integration is necessary.

〔発明の開示〕[Disclosure of the invention]

本発明は、上記の課題を解決する半導体光集積回路の4
14造を提供するものであり、光増幅機能をそなえた光
集積回路である。
The present invention provides four semiconductor optical integrated circuits that solve the above problems.
It is an optical integrated circuit equipped with an optical amplification function.

本発明は、同一半導体基板」−に1個の発光素子と2個
のFETを形成し、上記FETQ内第10FETは所定
の電流を発光素子に流すドライバーとして用い、この第
10F’ETと並列接続にある第2のFETを受光器か
つ増幅器とした構造を有する光集積回路である。
In the present invention, one light emitting element and two FETs are formed on the same semiconductor substrate, and the 10th FET in the FETQ is used as a driver to flow a predetermined current to the light emitting element, and is connected in parallel with the 10th F'ET. This is an optical integrated circuit having a structure in which the second FET in the second FET serves as both a light receiver and an amplifier.

以下本発明を図面に基づいて説明する。The present invention will be explained below based on the drawings.

第2図は本発明の光集積素子の構造を示丈。Figure 2 shows the structure of the optical integrated device of the present invention.

まず1nP半絶縁基板l」二にp−InPクラッド層2
、p−InGaAsP活性層3、n−1nPクラッド層
1、からなる半導体レーザを形成し、その上にI nG
aAs 動作層5、p−InP )’h ”を有し、ソ
ースS+7+ゲートG19、ドレインD+12 からな
る第1の接合型FETを形成し、そしてソース5210
.ゲー)Gg、11. ドレインD213からなる第2
の接合型FETを形成する。
Firstly, a 1nP semi-insulating substrate 1” and secondly a p-InP cladding layer 2.
, a p-InGaAsP active layer 3, and an n-1nP cladding layer 1.
aAs active layer 5, p-InP)'h'', forming a first junction FET consisting of source S+7+gate G19, drain D+12, and source 5210
.. Game) Gg, 11. The second consisting of drain D213
A junction type FET is formed.

第1の接合型FETは半導体レーザに所定の電流を流す
ドライバーであり、所定の電流例えばレーザ発振しきい
値電流量が得られるようにゲー1−Gx9に電圧を印加
しておく。他方第2の接合型FETにはゲー)G21.
1に適当な電圧例えば電流がピンチオフされる電圧を印
加しておき、ゲー)Ggll近くに外部から光信号を入
射することによりゲー)G211下のN−1nGaAs
 動作層5内空乏層が変調々 を聯11、第2の接合型FETに光信号により増rlJ
された電流が流れるようにする。その結果半導体レーザ
にレーザ発振しきい値電流以上の電流が流れれても良い
The first junction FET is a driver that allows a predetermined current to flow through the semiconductor laser, and a voltage is applied to G1-Gx9 so that a predetermined current, for example, a laser oscillation threshold current amount is obtained. On the other hand, the second junction FET has G21.
By applying an appropriate voltage, for example, a voltage at which the current is pinched off, to G1, and inputting an optical signal from the outside near Ggll, the N-1nGaAs under G211 is applied.
The depletion layer in the active layer 5 is modulated and increased rlJ by an optical signal to the second junction FET.
Allow the current to flow. As a result, a current higher than the laser oscillation threshold current may flow through the semiconductor laser.

以上の本発明の説明においては、説明上接合型FETを
用いたが、シコトキー型FETでも同様の効果が得られ
、この場合p−InPff48を除去した構造となる。
In the above description of the present invention, a junction type FET is used for the sake of explanation, but a similar effect can be obtained with a Shokotoky type FET, and in this case, the structure is such that the p-InPff48 is removed.

又発光素子として、半導体レーゾ“を用いたが、発光ダ
イオードの場合も同様であり、レーザ発振しきい値電流
以下て使用すれば発光ダイオードになる。
Although a semiconductor laser was used as a light emitting element, the same applies to a light emitting diode, and if used below the laser oscillation threshold current, it becomes a light emitting diode.

〔産業上の利用可能性〕[Industrial applicability]

以上述べた如く、本発明に従えば、同−半絶縁性半導体
基板上に1個の発光素子と2個のFETを形成し、その
内1個のFETに受光器かつ増幅器の機能を持たせるこ
とにより、光増幅機能をそなえた光集積回路であり、光
増幅器の軽Ii)、コンバクI・化を実現させることが
可能である。
As described above, according to the present invention, one light emitting element and two FETs are formed on the same semi-insulating semiconductor substrate, and one of the FETs has the functions of a light receiver and an amplifier. As a result, it is an optical integrated circuit equipped with an optical amplification function, and it is possible to realize optical amplifiers such as optical amplifiers.

又この構造は他の半導体材料であるGa l −X A
j’xAs系、In1−xGa)(Ash−ySby系
、Ga1−x/VxAs+ −y Sby系等にも適用
でき容易に類推可能である。1
This structure can also be applied to other semiconductor materials such as Gal-XA
It can also be applied to the j'xAs system, In1-xGa) (Ash-ySby system, Ga1-x/VxAs+ -y Sby system, etc., and can be easily analogized.1

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の光増rlj回路を示す図であり、第2図
は本発明の光集積素子構造を示す図である。 図中、 1・・・InP半絶縁基板 2・・・p−InPクラッド層 3 ・・・p−InGaAsP活性層 4 ・・・n−InGaAsPクラッド層5− n−I
nGaAs 動作層 6・・・p側AuZn 電極 7・・・ソース電極(Sl) 8・・・p−InP層 9・・・ゲート電極(Gl) 10・・・ソース電極(S2) 11・・・ゲート電極(G2) 12 ・・・ ドレイン電極(Dl) 13 ・・・ ドレイン電極(D2) 第1回 第2図
FIG. 1 is a diagram showing a conventional optical multiplication rlj circuit, and FIG. 2 is a diagram showing the optical integrated device structure of the present invention. In the figure, 1...InP semi-insulating substrate 2...p-InP cladding layer 3...p-InGaAsP active layer 4...n-InGaAsP cladding layer 5-n-I
nGaAs operating layer 6... p-side AuZn electrode 7... source electrode (Sl) 8... p-InP layer 9... gate electrode (Gl) 10... source electrode (S2) 11... Gate electrode (G2) 12... Drain electrode (Dl) 13... Drain electrode (D2) 1st Part 2 Figure

Claims (1)

【特許請求の範囲】[Claims] (1)半導体光集積回路において、 (a)同一半絶縁性半導体基板上に1個の発光素子と2
個の電界効果型トランジスク(FET )を形成し、 (b)第]のFETは所定の電流を発光素子に流すドラ
イバーとして用い、 (c)第2のFETは、その動作層のバンドギャップエ
ネルギーを受光の光子エネルギーよりも小さく取ること
により、受光器かつ増rlj器として用い、(d)前記
第1、第20FETは互いに並列に接続し、発光素子に
対し直列に接2続した構造を有するようにしたことを特
徴とする半導体光集積回路。
(1) In a semiconductor optical integrated circuit, (a) one light emitting element and two light emitting elements are placed on the same semi-insulating semiconductor substrate.
(b) The second FET is used as a driver to flow a predetermined current to the light emitting element, and (c) the second FET is used to control the bandgap energy of the active layer. By taking the photon energy smaller than the photon energy of the received light, it can be used as a light receiver and a multiplier, and (d) the first and 20th FETs are connected in parallel to each other and have a structure in which they are connected in series to the light emitting element. A semiconductor optical integrated circuit characterized by:
JP10997583A 1983-06-17 1983-06-17 Semiconductor optical integrated circuit Pending JPS601882A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10997583A JPS601882A (en) 1983-06-17 1983-06-17 Semiconductor optical integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10997583A JPS601882A (en) 1983-06-17 1983-06-17 Semiconductor optical integrated circuit

Publications (1)

Publication Number Publication Date
JPS601882A true JPS601882A (en) 1985-01-08

Family

ID=14523894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10997583A Pending JPS601882A (en) 1983-06-17 1983-06-17 Semiconductor optical integrated circuit

Country Status (1)

Country Link
JP (1) JPS601882A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5422900A (en) * 1994-04-28 1995-06-06 Eastman Kodak Company Integrated laser module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5422900A (en) * 1994-04-28 1995-06-06 Eastman Kodak Company Integrated laser module

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