JPS60187115A - Digital agc circuit - Google Patents

Abstract

PURPOSE:To obtain a stable operation by providing a dead band around an output level with a comparison circuit and a selection circuit, multiplying a prescribed coefficient with a level error in excess of a deal band width and controlling the gain based on the result. CONSTITUTION:An output of a pre-stage variable gain amplifier 21 is outputted from an A/D converter 23 via a sample-and-hold circuit 22. A digital signal at each sampling is squared by a power calculation circuit 24 and a mean value of N times is outputted. Then the result is applied with decibel conversion by a logarithmic converting circuit 25. A subtractor 26 calculates the difference between a real AGC output and a reference level. A coefficient is multiplied with the error output, the gain of the amplifier 21 is controlled by an output of a multiplier 27 and a stable AGC operation is obtained. A selection circuit 28 selects the coefficient. When the comparator circuit 32 detects that the output of the subtractor 36 is within a dead band width not responsive within a prescribed range, a selection circuit 29 gives a zero output zeroing the input signal. When the width is at the outside of the dead band, the signal is given to the output of the multiplier 27 so as to apply feedback.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a digital AGC circuit for modems, facsimiles, etc.

(Technical Background) FIG. 1 shows a conventional digital AGC circuit. In the figure, 1 is a pre-variable gain amplifier, 2 is a Sun-Norhold circuit, 3 is an A/D converter, 4 is a signal level calculation circuit,
5 is a subtraction circuit for calculating the difference from the reference signal level, 6 is an achimulator, and 7 is an adder. The analog input signal is amplified by the pre-variable gain amplifier and converted into a digital signal by the Sun-Norhold circuit 2 and the A/D converter. A signal level calculation circuit 4 calculates the level value of the digital signal, and a subtraction circuit 5 calculates the difference from the reference signal level. The calculated result is fed back to the pre-variable gain amplifier 1 via the aggregator 6 to perform key control and obtain an output at a desired level. However, the AGC output fluctuates due to line signal level fluctuations caused by input noise and modulation on the telephone line, or signal fluctuations caused by gain switching of the pre-variable gain amplifier l, resulting in unstable operation. There was a drawback.

(Object of the Invention) The present invention has been made in view of the above drawbacks, and it is possible to provide a dead band of a certain width at the center of a desired output level by a comparison circuit and a selection circuit, and to prevent a level error exceeding the dead band. The purpose of this method is to obtain stable AGC operation by multiplying by a predetermined coefficient using a multiplier, and using the result as 7 to perform key control. The present invention will be described in detail below using the drawings.

(Structure of the Invention) In a digital AGC circuit that automatically adjusts the gain and outputs it in response to fluctuations in an input signal, the reference signal level and the
means for outputting the difference between the GC outputs; a multiplier for multiplying the output by a coefficient selected by a second selection circuit; and a means for outputting the difference between the multiplier outputs or This is a digital AGC circuit characterized by having a second select circuit that selects zero output.

(Example) FIG. 2 shows an example according to the present invention. 21 in the figure
is a pre-variable gain amplifier, 22 is a sample and hold circuit,
23 is a fitted converter; 24 is a power calculation circuit; 25 is a logarithmic conversion circuit; 26 is a subtracter that calculates the difference from the base ω level;
27 is a multiplier, 28 is a first select circuit that selects a coefficient of the multiplier, 29 is a second select circuit that selects a large sword to an accumulator, 3o (adder), and 31 is an agi.

Mulator 32 is a comparison circuit. First, the analog input signal is amplified by a variable preamplifier 21 by an amount specified by an agiamulator 3). The output (1) of the pre-variable gain amplifier 21 is passed through a sample-and-hold circuit 22 (I) and outputted as a disotal signal (1) by an A/D converter for each Zangling. On the other hand, the dinotal signal for each sampling is divided into two in the first circuit 24 of the power meter, and the average value of N times is outputted. Next, the signal is converted into dimbels (dB) by a logarithmic conversion circuit and then output. This is the average power of the actual AGC output expressed in decibels (dB). The subtracter 26 calculates the difference between the actual AGC output (dB) and the reference level output (dB), and outputs the result.

In other words, the output is the error between the reference level and the actual AGC output. If this error is reflected in the gain of the '1.1 prefix variable gain increase profit increase 1, the operation of λGC will fluctuate and become unstable.

Therefore, the multiplier 27 adds a coefficient α (α≦
1) is multiplied by the output of the multiplier 27 and the pre-variable gain amplifier 2
10-key control is performed to obtain stable AGC operation. The selection circuit 28 selects the coefficient α depending on the state of the line. For example, when the AGC is running up or down, a coefficient of 6 is selected, and when operating in a normal stable region, a coefficient α2 is selected.The multiplier 27 multiplies the output of the subtracter 26 by the coefficient α2, and outputs 0.

On the other hand, the comparison circuit tests whether or not the output of the subtracter is within the range of the non-sensing range (±ΔdB) so that the output of the subtracter is not within a certain range. In this case, the select circuit 29 selects the zero output ■ to make the input signal zero, and controls the select circuit 29 to select the output [F] of the 6 multiplier 27 for the output 4 that exceeds the insensible range. do. When it is within the dead zone created by the comparison circuit 32 and the selection circuit 29, the selection circuit 29 selects the zero output G) as described above. Select circuit, 2
The output (2) of 9 is added to the gain data in the accumulator by an adder 30, and gain control data (2) of the variable preamplifier 21 is output. This digital AGC circuit forms a feedback circuit as a whole, and the AG
It operates so that the C output level becomes a desired level, that is, the error of the output (2) always approaches zero.

FIG. 3 is a diagram illustrating the relationship between the error output (2) of the AGC and the output 0 of the select circuit 29 for key-in control. When the error output [F] is within the imperceptible range, the output ■ indicates zero, and when the value is outside ■, the coefficient α (α≦1)
The output (ri) is determined by the selected value of .

(Effects of the Invention) As explained above, the present invention provides a dead zone created by the comparator circuit and the select circuit, so that when the dead zone is within the dead zone, the select circuit always outputs zero. For level errors exceeding the dead range, the multiplier is multiplied by a predetermined coefficient and key control is performed based on the result, so it is necessary to fluctuate the AGC output, which is unique to dinotal signals. Stable output can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a conventional digital AGC circuit, FIG. 2 is an embodiment of the digital AGC circuit according to the present invention, and FIG. 3 is an explanatory diagram illustrating the relationship between output and (2). 21... Pre-variable gain amplifier, 22... Sample and hold circuit, 23... A/D converter, 24...
Power calculation circuit, 25... Logarithmic conversion circuit, 26... Subtractor, 27... Calculator, 28, 29... Select circuit, 30... Adder, 31... Accumulator, 3
2... Comparison circuit. Patent applicant Oki Electric Industry Co., Ltd. Figure 1 Figure 2

Claims (1)

[Claims] In a digital AGC circuit that automatically adjusts the gain in response to input signal fluctuations and outputs it, the reference signal level and A
means for outputting the difference between the GC outputs; a multiplier for multiplying the output by a coefficient selected by the first selection circuit; and a comparator circuit in which a constant level is set, so that the output of the multiplier or zero output is controlled. A digital AGC circuit characterized by having a second select circuit that selects.