JPS60180482A - Speed controller for motor - Google Patents

Abstract

PURPOSE:To prevent transistors from damaging due to simultaneously conductions of H-shaped bridged transistors by controlling ON or OFF the transistors at a time delay when a motor is inverted from normal to reverse rotation. CONSTITUTION:When signals Sc1, Sc3 become ''1'' and Sc2 becomes ''0'', signals S1, S4 become ''0'', transistors 4, 7 are turned ON, and a positive rotary current IF is flowed. When the signal Sc2 becomes ''1'' in this state, the signal S4 becomes ''1'', and the transistor 7 is turned OFF. When the signal Sd2 becomes ''1'' after the prescribed time, signals S1, S2 respectively become ''0'' and ''1'', the transistor 4 is turned OFF, and 5 is turned ON. When the signal Sc1 becomes ''1'' after the prescribed time is further elapsed, the signal S3 becomes ''0'', the transistor 6 becomes ON, and a reverse rotary current IR is flowed.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a motor for use in which a power transistor that applies a driving voltage to a motor is prevented from deteriorating or being destroyed by overcurrent due to a timing shift between the motor's forward and reverse rotations. The present invention relates to a speed control device.

[Prior art]

As a conventional motor speed control device, there is one shown in FIG. 1, for example. This device includes a control section 1 that operates a lamp carriage (scanning exposure mechanism) of a copying machine.
A switch circuit 8 of an H-bridge consisting of transistors 4, 5, 6 and 7 (each transistor operated via an amplifier 9, 10, 11, 12) switches the current direction of the DC motor 3 which drives the two-pump cartridge 2; ), 4 N
AND gates 13, 14, 15° 16 and inverter 1
It has a logic circuit 18 consisting of 7. The logic circuit 18 is
Lamp carrier.

Start, stop, push signal 8C1 (1” at start)
, ``0'' when stopped) and a 2-ramp carriage movement direction control signal 8C2 obtained via the inverter 17 ('0'' when forward direction indicating lamp carriage scan, 1'' when reverse direction) are input, and the signal S1 as transistor 4
(amplifier 9) and the signal S
Input CI and 8C2, and send signal S2 to transistor 5 (
The signal 8c2 and the lamp carriage speed control signal 8CB (PWM signal) from the lamp carriage speed control circuit 31 are input to the NAND gate 14 which outputs the signal S3 to the transistor 6 (amplifier 10). 11), and a NAND gate 16 which inputs the signal 8C3 and the signal SC2 obtained via the inverter 17 and outputs the signal S4 to the transistor 7 (amplifier 12).

In the above configuration, the control section 1 operates as shown in FIG. In the actual circuit, the speed control signal sea becomes a pulse-mode conversion signal (PWM signal) that causes the speed of the lamp carriage 2 to follow the speed ratio set based on the circumferential speed of the photoreceptor drum. However, for the sake of explanation, the second
The operation shown in the figure (after time t) will be described as 11#.

Now, before the copy operation command (before time t1), the signal Scm
is "o", signal 8Cffi is @1" (the lamp carriage 2 returns to the starting position by the copy operation command, and then moves in the forward direction. When the signal Sc is 10", the signal 8c2 is @1''), and the signal SC3 is the above-mentioned signal ``0'' (becomes ``1#'' after time t□), so the NAND gates 13 to 1
The output signals S□ to S4 of 6 become '1#. For this reason,
Transistors 4 to 7 are turned off. At this time, when a copy operation command is given (time t1), the signal 8C1 becomes @
"l", signal Sc2 becomes "0", signal 8C3 becomes @1", and output signals S1 and S4 of NAND gates 13 and 16 become 10# (NAND gates 14 and 15
The output signals S2 and S3 of
4V → Transistor 4 → DC motor 3 → Transistor 7
→A grounded conduction circuit is constructed, a forward rotating current I flows through the DC motor 3, and the lamp carriage 2 moves in the forward direction (scans). When the lamp carriage 2 reaches the predetermined position (time t2), the signal Scm becomes 1",
The output signals S2 and S3 of the NAND gates 14 and 15 are '0', and the output signal S of the NAND gates 13 and 16 is '0'.
0 and S4 become l'', transistors 4 and 7 are turned off, and transistors 5 and 6 are turned on. Therefore, a conduction circuit of power supply 24V → transistor 5 → DC motor 3 → transistor 6 → ground is formed, and the reverse A rotating current IR flows through the DC motor 3, and the lamp shaft 1 and the knob 2 move in the opposite direction.

In this way, the switch circuit of the H-type bridge is rotated.
・--LA1G humiliation low Q≧f? -Is it 4 years old?
- It is possible to make the two-wheel drive, two-wheel drive, and two-wheel drive move back and forth within a predetermined range.

However, in conventional motor speed control devices, when switching the switch circuit of the H-bridge, due to the timing difference between turn-on and turn-off of the transistor,
If transistors 4 and 6 or 5 and 7 are turned on at the same time, an excessive current flows through the switch circuit, which may deteriorate the transistors and lead to a breakdown mode.

[Object and structure of the invention]

The present invention has been made in view of the above, and is designed to prevent the power transistor from deteriorating or being destroyed due to overcurrent caused by a timing shift between forward and reverse rotations of the motor. Between the power supply negative terminal,
and turn off the power transistors inserted between the motor's reverse terminal and the power supply negative terminal, and then turn on the power transistors inserted between the motor's reverse terminal and the power supply positive terminal. To provide a speed control device for a motor, which turns off a power transistor inserted into a positive terminal of a motor and a positive terminal of a power source, and finally turns on a power transistor inserted into a positive terminal of a motor and a negative terminal of a power source. It is something.

[Embodiments of the invention]

Hereinafter, the motor speed control device of the present invention will be explained in detail.

FIG. 3 shows an embodiment of the invention, in which parts identical to those shown in FIG. 1 are designated by the same reference numerals. The control unit 1 includes an H-bridge switch circuit 8 consisting of transistors 4, 5, 6, and 7 for switching the current direction of the DC motor 3 that drives the lamp carriage 2 (each transistor is connected to an amplifier 9, 10, 11, . 12), 4
NAND gates 21 to 24, delay circuit 2 on the input side
5 (time constant 01B□) EX/NOR gate 26
In addition, there is a delay circuit 27 on the input side (time constant C2z < 0
It is equipped with a logic circuit 30 consisting of an inverter 28 and a buffer amplifier 29 having an inverter 28 and a buffer amplifier 29, which has a lamp carry, a start/stop signal 8cx (when starting
1#, '0'' when stopped), lamp carriage movement direction control signal 8C2 ('o'' when forward direction indicating lamp carry or rescan, '''1'' when reverse direction) and 2 lamp carriage speed control circuit 31 The lamp carriage speed control signal sc3 (PWM signal) is used to operate the lamp carriage. The logic circuit 30 outputs the signal sC2 and the output signal 5dl of the delay circuit 25 (the delay circuit 25 receives the signal S
EX-NOR gate 26 which inputs C2
and an inverter 28 which receives the output signal sd of the delay circuit 27 (signal 8C2 is applied to the delay circuit 27).
and the buffer amplifier 29, the signal sc1 and the output signal of the inverter 28 are input, and the signal S! Transistor 4 (
A NAND gate 21 outputting to an amplifier 9) and a signal S,
and the output signal of the buffer amplifier 29, and the signal s2
to the transistor 5 (amplifier 10), and the EX-NOR gate 2 to which the output signals of the BX/NOR gate 26 and buffer amplifier 29 are input.
(The output signal of 6 is inputted in a form superimposed with the signal SCa), the NAND gate 23 outputs the signal S3 to the transistor 6 (amplifier 11), and the output signals of the EX-NOR gate 26 and the inverter 28 are inputted. Shiku1ilX-
The output signal of the NOR gate 26 is input in a form superimposed on the signal 8c3), and the NAND gate 24 outputs the signal 84 to the transistor 7 (amplifier 12).

On the other hand, the lamp carriage speed control circuit 31
Speed sensor 3 of photoreceptor drum 33 driven by
Input the photoreceptor drum rotational speed signal SS (pulse signal) from 4 and multiply it by N times, for example, 32 times.
The PLL circuit 35 outputs the signal 86 and the copy magnification,
For example, a frequency dividing circuit 36 that outputs the reference signal S7 by dividing the frequency into values corresponding to the skidding and yang speeds based on 0.7, 0.8, and 1.41 times, and the signal S7 and the speed sensor of the lamp carriage 2. Ramp carriage speed signal 8B from 37 (
a phase comparator 38 which inputs a pulse signal) and outputs a signal S9 corresponding to the phase difference between the two signals; and a speed gain setter 39 which is driven by the rising edge of the signal S8 and outputs a timer signal S1° for a set time. (one-shot multivibrator), an eye-pass filter adder 40 that passes through the phase difference signal S9 of the low frequency signal and the timer signal 810 and outputs a signal 8 which is the sum of both signals, and a triangular wave signal serving as a reference signal. It is composed of a triangular wave generation circuit 41 that outputs a triangular wave signal Six, and a comparator 42 that inputs an addition signal S1□ and a triangular wave signal S12, compares both signals, and outputs a pulse width converted signal 8c3 (PWM signal).

In the above configuration, the control section 1 operates as shown in FIG. Note that the initial conditions in FIG. 4, that is, the states of the signals SC1*SC2 before time t1 and the operating signal SCS, are the same as in the case of FIG.
The following description will be made assuming that the potential of each capacitor 5 and 27 is zero (signals Sd□ and 8dg are both 0'').

Under the above conditions, before the copy operation command (before time t1),
The output signals of the FIX-NOR gate 26 and the buffer amplifier 29 are 'On1', and the output signal of the inverter 28 is 'On1'.
1'', the output signals Sl to S4 of the NAND gates 21 to 24 become 'l#, and the output signals Sl to S4 of the NAND gates 21 to 24 become 'l#,
is off. When a copy operation command is given (time 11), the signal set becomes 1" and the signal 8C2 becomes '0".
(Signals 5d1- and Si2 remain 0" and do not change), and signal 5e11 becomes 1" (as mentioned above, the state specified for convenience of explanation), so the input signal of EX/NOR gate 26 is Both output signals change to '1', but the output signals of the inverter 28 and buffer amplifier 29 do not change. Therefore, the NAND gates 21 and 2
The output signals S0 and S4 of 4 become '0' (NAND
The output signals S2 and S3 of the gates 22 and 23 are held at 61''), transistors 4 and 7 are turned on, and a conduction circuit is formed from the power supply 24V → transistor 4 → DC motor 3 → transistor 7 → ground, and the voltage is positive. A rotating current I flows through the DC motor 3, and the lamp carriage 2 moves in the forward direction (scans). When the lamp carriage 2 reaches a predetermined position (time t2), the signal 8C2 becomes 1" (signal 8C1 and SC3 do not change), the signals 8dx and adz change with the slope due to the time constants 0□R1 and C2R2 of the delay circuits 25 and 27, respectively, and the signal Sd2 changes at time t3.
is '1', and the signal Sd1 becomes '1' at time t4.

Therefore, at time t2, F! X-NOR gate 2
The input signals of 6 become "1" and "O", and the output signal becomes '0#' (at this time, the output signals of the inverter 28 and buffer amplifier 29 remain unchanged at 11" and 10#)
. Therefore, the output signal S4 of the NAND gate 24 is '1''
, the transistor 7 is turned off, and the conduction circuit is opened (
(Output signals 8□r of NAND gates 22, 23 and 25
83 and S6 are unchanged).

Next, at time t3, the signal adz becomes '1', so the output signals of the inverter 28 and buffer amplifier 29 become '0' and 1, respectively, and the output signals S□ and NAND gates 21 and 22 become '0' and 1, respectively. S2 becomes '1# and '0#, turning off transistor 4 and turning on transistor 5. Furthermore, at time t4, the signal sd□ becomes 1", so both the input signals of the EX-NOR gate 26 become 1".
Then, its output signal changes to '1'. Therefore, NA
The output signal S3 of the ND gate 23 becomes 0'', turning on the transistor 6, and a conduction circuit is formed from the power supply 24V → transistor 5 → DC motor 3 → transistor 6 → ground, and the reverse rotation current IR flows to the DC motor 3. , the two-four-bucket carriage 2 moves in the opposite direction.

As mentioned above, when the signal SC2, which is the rotation direction switching signal, changes from ``0'' to ``1'', the transistor 7 immediately
is turned off to open the conduction circuit, and after a predetermined delay time (time corresponding to time constant 02R2), transistor 4 is turned off, transistor 5 is turned on, and after a further delay time (time corresponding to time constant 01RI). By turning on the transistor 6 and configuring a new conduction circuit, it is possible to avoid a situation in which each switch of the H-bridge switch circuit is turned on at the same time.

Note that the present invention does not require that the control unit 1 be provided with two delay circuits 25 and 27 having different delay times, but is provided with one delay circuit, and the H-shaped bridge is controlled by the rotation direction switching signal. All switches in the switch circuits may be turned off at the same time, and a predetermined switch may be turned on after a delay time by the delay circuit.

Next, the operation of the speed control circuit 31 will be explained. In the speed control circuit 31, as shown in FIG.
3 is rotated by a copy operation command), that is, the reference signal 87 is generated based on the signal S5 from the speed sensor 34.
(scan speed signal of the lamp carriage 2 corresponding to the circumferential speed of the photosensitive drum 33 according to the copy reduction magnification, the setting value of the speed control circuit 31) and the lamp carriage speed signal S8 from the speed sensor 37 are compared in phase. Phase difference signal 59 (
Delayed based on 2.5V □ Advance phase by Ov1 and advance phase by 2
．． 5V) is output (phase difference θ□, θ2.θ3
). The low-pass filter adder 40 adds the phase difference signal S9 and the timer signal S1° from the speed gain setter 39 (a signal with a time width □ that detects the rising edge of the speed signal S8 and corresponds to the set value). Outputs addition signal S1□.

The comparator 42 receives this addition signal S□! and triangular wave generator 41
The PWM signal 5ea (
outputs a pulse conversion signal).

By the way, in the configuration shown in FIG. 3, the output signal of the BX/NOR gate 26 is superimposed on the signal 8C)1 and becomes the input signal of the NAND gates 23 and 24, so that the output signal of the EX-NOR gate 26 is The output signals of NAND gates 23 and 24 at 11# are (time t□~
12, after time t4), signal S. '1 regulated to 3
” or '0# (When the output signal of the FtX-NOR gate 26 is '0#, the NAND gates 23 and 2
The output signal of signal 8C3 operates independently of the state of signal 8C3).

That is, between times 11 and 12, the transistor 7
It is turned on and off in synchronization with the PWM signal Sea. Therefore, the speed of the DC motor 3 is controlled by a drive voltage according to a predetermined average value of the PWM signal SCS for each unit time. Therefore, the forward speed of the lap carriage 2 can be made to follow the speed ratio set by the frequency dividing circuit 25 based on the circumferential speed of the photosensitive drum 33. Further, after time t4, the transistor 6 operates under the control of the signal 8C2. [Effects of the Invention] According to the motor speed control device according to the present invention, as described above, the motor speed control device is inserted between the forward rotation terminal of the motor and the negative power supply terminal, and between the reverse rotation terminal of the motor and the negative power supply terminal. Turn off the power transistor inserted into the motor's reverse rotation terminal and the power supply positive terminal, turn on the power transistor inserted into the motor's forward rotation terminal and the power supply positive terminal, and finally turn off the power transistor inserted into the motor's forward rotation terminal and the power supply positive terminal. Since the power transistor inserted between the motor's forward rotation terminal and the power supply negative terminal is turned on, excessive current will not flow even if there is a difference in the operating timing of the power transistor when the motor rotates from forward to reverse rotation. Therefore, deterioration or destruction of the power transistor can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing a conventional example, FIG. 2 is an explanatory diagram of the operation of the conventional example, and FIG. 3 is a configuration diagram showing an embodiment of the present invention.
FIG. 4 is an explanatory diagram of the operation of an embodiment of the present invention, and FIG.
It is an explanatory diagram of the operation of the lamp carriage speed control circuit. Explanation of the reference numerals l...control section, 2...lamp carriage, 3゜32
...DC motor, 4 to 7...Transistor, 8.
...Switch circuit, 9 to 12...Amplifier, 13 to 16 and 21 to 24...NAND gate, 17 and 28...Inverter, 18 and 30...Logic circuit,
25 and 27...delay circuit, 29...buffer amplifier, 31...lamp carriage speed control circuit, 33...
... Photosensitive drum, 34 and 37 ... Fast concealment sensor, 3
5... PLL circuit, 36... Branch circuit, 38...
Phase comparator, 39... Speed gain setter, 40...
Low-pass filter adder, 41...triangular wave generator, 4
2... Comparator. Patent Applicant Fuji Xerox Co., Ltd. Agent Patent Attorney Nobuyuki Matsuhara Patent Attorney Seiji Muraki Agent Patent Attorney Taira 1) Tadao Agent Patent Attorney Atsushi Ueshima − Agent Patent Attorney Hitoshi Suzuki Figure 4 Fig. 5 1 Right bow Sc3

Claims (1)

[Claims] first and second power transistors inserted between the forward rotation terminal of the motor and the positive and negative terminals of the power source; and a third power transistor inserted between the reverse rotation terminal of the motor and the positive and negative terminals of the power source. and a fourth power transistor, the speed of the motor being such that when the first and fourth power transistors are turned on, the motor is rotated in the forward direction, and when the third and second power transistors are turned on, the motor is rotated in the forward direction. In the control device, when reversing the motor from normal rotation to reverse rotation, an off signal is output to the second and fourth power transistors, and then an on signal is output to the third power transistor, and the first power transistor 1. A speed control device for a motor, comprising a control circuit that outputs an off signal to the second power transistor, and finally outputs an on signal to the second power transistor.