JPS60180053U - interface device - Google Patents
interface deviceInfo
- Publication number
- JPS60180053U JPS60180053U JP6310584U JP6310584U JPS60180053U JP S60180053 U JPS60180053 U JP S60180053U JP 6310584 U JP6310584 U JP 6310584U JP 6310584 U JP6310584 U JP 6310584U JP S60180053 U JPS60180053 U JP S60180053U
- Authority
- JP
- Japan
- Prior art keywords
- data
- serial
- parallel converter
- interface device
- instruction code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
- Information Transfer Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図ないし第3図はこの考案の一実施例に係るインタ
ーフェイス装置を説明するもので、第1図はインターフ
ェイス装置と計算機装置及び周辺装置との接続間係を示
す図、第2図はデータフォーマットを示す図、第3図は
第1図におけるインターフェイス装置及び周辺装置部分
の詳細を示す図である。
11・・・インターフェイス装置、12・・・計算機装
置、13・・・周辺装置、21・・・S/P (直列並
列)変換器、24.33・・・フリップフロップ、25
・・・命令デコーダ、27・・・タイミングデコーダ、
29・・・ビットカウンタ、31・・・デジットカウン
タ、34・・・P/S (並列直列)変換器。1 to 3 illustrate an interface device according to an embodiment of this invention, in which FIG. 1 is a diagram showing connections between the interface device, a computer device, and peripheral devices, and FIG. 2 is a diagram showing data FIG. 3 is a diagram showing the format, and is a diagram showing details of the interface device and peripheral device portion in FIG. 1. DESCRIPTION OF SYMBOLS 11... Interface device, 12... Computer device, 13... Peripheral device, 21... S/P (serial parallel) converter, 24.33... Flip-flop, 25
...Instruction decoder, 27...Timing decoder,
29... Bit counter, 31... Digit counter, 34... P/S (parallel-serial) converter.
Claims (1)
置において、上記計算機装置から出力されるデータ構成
数を指示する命令コード及びその後に続く制御データを
単位ブロックの直列データとして入力し、この直列デー
タを並列データに変換する直列並列変換器と、この直列
並列変換器を介して上記計算機装置から送られて(る命
令コードを解読し、命令コード及びそれに続く所定構成
数のデータを1ブロツクのデータとして認識する手段と
、この手段の認識結果に従って上記周辺装置の動作を制
御する手段とを具備したことを特徴とするインターフェ
イス装置。In an interface device that connects a computer device and a peripheral device, an instruction code indicating the number of data configurations to be output from the computer device and subsequent control data are input as serial data of a unit block, and this serial data is converted into parallel data. a serial-to-parallel converter for converting the data into a serial-to-parallel converter; and a serial-to-parallel converter for decoding the instruction code sent from the computer device through the serial-to-parallel converter, and recognizing the instruction code and a predetermined number of data following it as one block of data. An interface device comprising: means; and means for controlling the operation of the peripheral device according to the recognition result of the means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6310584U JPS60180053U (en) | 1984-04-28 | 1984-04-28 | interface device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6310584U JPS60180053U (en) | 1984-04-28 | 1984-04-28 | interface device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60180053U true JPS60180053U (en) | 1985-11-29 |
Family
ID=30592938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6310584U Pending JPS60180053U (en) | 1984-04-28 | 1984-04-28 | interface device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60180053U (en) |
-
1984
- 1984-04-28 JP JP6310584U patent/JPS60180053U/en active Pending
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