JPS60176326A - Microwave band high speed fet switch - Google Patents

Abstract

PURPOSE:To detect easily an abnormality, and to cope with the abnormality immediately by executing a decision of a fault by detecting a drain current of an FET switch. CONSTITUTION:A driving circuit 2 is operated by a control signal to a terminal 13, and a microwave signal supplied to an input terminal 11 is switched by FETs 41, 42 and sent out of an output terminal 12. When the FETs 41, 42 are turned on, a voltage drop is generated across a resistance 5, and it is detected by a drain current detecting circuit 3 and supplied to a deciding circuit 4, the correspondence to the control signal of the terminal 13 is checked by the deciding circuit, whether the FET switch is normal or abnormal is decided, and its signal is sent out of a terminal 14. Accordingly, whether the FET switch is normal or abnormal can be diagnosed, and in the event of an abnormality, switching to a stand-by route is executed quickly.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a technology for detecting failures in high-speed FET switches used in microwave band switch matrices, etc., and particularly relates to a technology for detecting failures in high-speed FET switches used in microwave band switch matrices, etc.
Regarding switches.

[Prior art]

Communication satellites have been put into practical use and are now being widely used for various tasks, and as equipment on Earth becomes more diverse, the equipment installed on the satellites is also becoming more complex. In digital communication, information to be exchanged can be sent and received intermittently, so multiple ground stations transmit carrier waves of a predetermined length of time sequentially, and the repeater input on the satellite allows them to be sent and received on the time axis without being superimposed. It is possible to process signals so that they are lined up and configure a route that connects multiple ground stations using a single repeater. Furthermore, communication by time division switching called satellite switched time division multiple access (SSTDMA), in which a switch matrix is mounted on a satellite, is being put into practical use.

The switch matrix on this satellite has a plurality of input ports and a plurality of output ports, and has the function of connecting arbitrary input/output ports by arranging a plurality of switch elements between them. In this way, advances have been made in increasing functionality, but since this switch matrix is mounted on a communication satellite, particularly high reliability is required, and care must be taken to ensure that there is no interruption of information. It won't happen. Therefore, when a switch that makes up a switch matrix fails, it is necessary to detect the location of the failure as soon as possible and immediately switch to a redundant route to quickly restore the functionality of the switch matrix. . Conventionally, in such cases, the location of the switch failure was determined by comparing control signals from the ground and data transmitted and received from ground stations located in each region. The disadvantage was that it was large-scale and took a long time to make decisions.

[Summary of the invention]

The present invention detects signals caused by the actuation of a plurality of switches constituting a switch matrix on a satellite, and performs a self-diagnosis on whether the high-speed FET switches made up of this switch matrix are normal or abnormal to obtain a signal as a result of the determination. This is a high-speed microwave FE that makes up a switch matrix that allows switching to a backup route in a short time in the event that the switch itself fails.
This provides a T-switch.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings. In addition, the same reference numerals are given to items common to each drawing.

FIG. 1 is a block diagram showing one embodiment of the high speed FET switch of the present invention. 1 is a high-speed switch; 2 is a drive circuit that controls the operation of this switch; 3 is a detection circuit that detects the operating state of the switch; and 4 is a determination circuit that determines whether this switch is normal or abnormal. And high speed switch 1
consists of a resistor 5, a capacitor 6,7,8 and a field effect transistor (FET) 41,42. In addition, 11
．． 12 is an input terminal and an output terminal for microwave signals, 13 is an input terminal for a control signal that controls the operation of the high-speed switch 1, 14 is an output terminal for a determination circuit that outputs the result of determining whether it is normal or abnormal, and 15 is a power supply. Terminal 16 is a monitor terminal for monitoring the signal caused by the operation of the high-speed switch 1, 17.
18 is an input terminal of the detection circuit 3 connected to the power supply terminal 15 and the monitor terminal 16, 19 is an input terminal of the determination circuit 4 to which the output of the detection circuit 3 is supplied, and 20 is the input terminal 13
The input terminal of the judgment circuit 40 is connected to the input terminal 1.
3 also serves as an input to the drive circuit 2. Here, the high-speed switch 1 will be further explained. The input terminal 11 is
6 to the first gate 51 of the FET 41,
The drain terminal 55 of the ET 41 is connected to the FET via the capacitor T.
The drain terminal 56 of the FET 42 is connected to the output terminal 12 via the capacitor 8.
The FETs 41 and 42 constitute a two-stage high-speed switch. A first gate 51 and a second gate 53 of the FET 41 and a first gate 52 and a second gate 54 of the FET 42 are connected to the drive circuit 2, respectively. FET41,
Each of the drain terminals 42 is connected to one end 5T of the resistor 5 and a drain current monitor terminal 16, respectively. The other end of the resistor 5 is connected to a power supply terminal 15, the power supply terminal 15 is connected to the input terminal 1T of the detection circuit 30, and
One end 57 of the resistor 5 is connected to the detection circuit 3 via the monitor terminal 16.
The detection circuit 3 is connected to the input terminal 18 of each FET 41.
, 42.

Here, the operation of one embodiment of the present invention configured as described above will be explained. Microwave signal is input terminal 11
The control signal is supplied to the input terminal 13. F
The ETs 41 and 42 have the drive circuit 2 connected to the first gates 51 and 52.
Since the bias voltage is applied to the FET 4 and the control signal of the drive circuit 2 is supplied to the second gate 53 and 54,
1.42 switches the microwave signal under the control of the drive circuit 2 responsive to the control signal, and outputs the microwave signal from the output terminal 12. Now, FET41.42
Since the drain current is supplied from the power supply terminal 15 via the resistor 5, a predetermined voltage is generated across the υ resistor 5 by switching the FETs 41 and 42. This voltage is supplied to input terminals 17, 18 and converted by the detection circuit 3 into a voltage signal proportional to this drain current. This voltage signal is supplied to the input terminal 19, and its correspondence with the control signal supplied to the input terminal 20 is checked by the determination circuit 4.
It is determined whether the high-speed switch 1 is normal or abnormal, and the output terminal 14
A signal indicating the result is sent out.

2 to 4 are time charts for explaining an embodiment of the present invention that operates as shown in (1) and (1), respectively.
) shows the control signal supplied to the input terminal 13, (2) shows the drain current flowing through the resistor 5, (3) shows the output signal of the detection circuit 3, and (4) shows the output signal of the determination circuit 4.

FIG. 2 shows a case where the high-speed switch 1 or the drive circuit 2 is operating normally, and the determination circuit 4 outputs a signal indicating "positive". Figure 3 shows a case where a fault occurs in the high-speed switch 1''! and the height drive circuit 2, and a small amount of drain current flows.In this case, the drain current is small, so the output signal of the detection circuit 3 is not sent out. First, the output signal of the determination circuit 4 indicates "error".

Figure 4 shows a case where a failure occurs in the high-speed switch 1 or the drive circuit 2, and the drain current continues to flow regardless of the control signal. In this case, when the switch is commanded off, The determination circuit 4 outputs a signal indicating "error".

Therefore, the high-speed FET switch can self-diagnose whether it is normal or abnormal, and can quickly switch to a backup route in the event of a failure.

Figures 3 and 4 show an example in which an ``erroneous'' pulse is output only when an ``erroneous'' signal is generated. It is also possible to output a continuous "error" signal from the point in time.

It is also possible to determine whether the drain current is normal or abnormal by determining the output voltage of the detection circuit proportional to the drain current using a plurality of threshold values, and setting the determination as to whether the drain current is normal or abnormal at a fine level.

〔Effect of the invention〕

The present invention detects the drain current of the FET switch, judges the level of this using a judgment circuit having a predetermined threshold value, and performs self-diagnosis by checking the correspondence with the control signal, so if an abnormality occurs, it is immediately sent to the outside. This can be done by outputting a signal that indicates an abnormality.

Furthermore, if the switch according to the present invention is used as a switch itself that is a component of a switch matrix, the number and position of failed switches can be constantly monitored by monitoring the output signal of the determination circuit. Even if the device itself fails, the connection of the switch matrix can be immediately switched to the backup route, and recovery from the failure can be realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG.
FIGS. 3 and 4 are time charts showing the operation of this embodiment. 1...High-speed switch, 2...Drive circuit, 3...
・・Detection circuit, 4φ・Fist・Judgment circuit, 5・−・・Resistance,
6,7,8...Capacity, 11,13゜17.18,1
9,20...Input terminal, 12.14轡...Output terminal, 15--◆・Power terminal, 16 fist and φ・Monitor terminal,
41.42・Bone・・FET. 51.52φ...first gate, 53.54φ...second gate), 55.56...φdray X terminal. Patent applicant: NEC Corporation Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] In a microwave band high-speed FET switch that is operated by a high-speed control signal that supplies a high-speed FET switch to a high-speed drive circuit, a circuit for detecting a drain current of the FET switch is provided; A microwave band high-speed FET switch characterized by comprising a determination circuit that detects a failure of the FET switch by comparing correspondence between a detection signal sent out and the control signal.