JPS60175427A - Etching method - Google Patents

Etching method

Info

Publication number
JPS60175427A
JPS60175427A JP3213284A JP3213284A JPS60175427A JP S60175427 A JPS60175427 A JP S60175427A JP 3213284 A JP3213284 A JP 3213284A JP 3213284 A JP3213284 A JP 3213284A JP S60175427 A JPS60175427 A JP S60175427A
Authority
JP
Japan
Prior art keywords
photoresist film
recess
film
semiconductor
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3213284A
Other languages
Japanese (ja)
Inventor
Kazuyuki Horiuchi
堀内　和志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP3213284A priority Critical patent/JPS60175427A/en
Publication of JPS60175427A publication Critical patent/JPS60175427A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To prevent the pinholes of a photoresist film from occurring by coating a recess shallower than the etching depth formed on a photoresist film coating portion of the surface of a semiconductor with the photoresist film. CONSTITUTION:A recess 2 is formed by a selectively etching method on the surface of a semiconductor 1. The recess 2 is shallower than the etching depth to be objected, and coincides with the photoresist coating film to become a mask. Then, a photoresist film 3 is coated in the recess 2. With the film 3 as a mask the selective etching is executed. Thus, the thickness of the film 3 increased to hardly produce a pinhole.

Description

【発明の詳細な説明】 ビ）産業上の利用分野 本発明は半導体の工・リチング方法に関するう（ロ）従
来技術 半導体表面より選択工・リチングを行なう際、「半導体
集積回路入門」垂井康夫著、株式会社オーム社、昭和４
２年５月２５日発行に記載されている様に、半導体表面
に部分的に被着されたフォトレジスト膜をマスクとして
用いる。[Detailed description of the invention] B) Industrial application field The present invention relates to a method for processing and recessing semiconductors. , Ohmsha Co., Ltd., Showa 4
As described in May 25, 2013, a photoresist film partially deposited on the semiconductor surface is used as a mask.

このとき、常に問題となるのはフォトレジスト膜に発生
するピンホールであり、この様なピン車があると、それ
を通じて不所望な工・リチングがなされてしまう。At this time, pinholes that occur in the photoresist film are always a problem, and if such pinholes are present, undesired etching and recessing will occur through them.

（ハ）発明の目的 本発明は、フォトレジスト膜のピンホール発生を防止し
た工・リチング方法を提供するものである。(c) Purpose of the Invention The present invention provides a processing/riching method that prevents the occurrence of pinholes in a photoresist film.

に）発明の構成 本発明の方法の特徴は、半導体表面のフォトレジスト膜
被首部分に、目的とする工・リチング深さよりも浅い凹
所を設け、該凹所にフォトレジスト膜を被着する。こと
にある。B) Structure of the Invention The feature of the method of the present invention is that a recess shallower than the intended etching/riching depth is provided in the portion of the semiconductor surface covered with the photoresist film, and the photoresist film is applied to the recess. . There is a particular thing.

（ホ））　実施例 第１図に示す如く、半導体（１）の表面に凹所（２）を
周知の選択ニーＪチング法により設ける。この凹所は目
的とする工１チング深さよりも浅く、例えば１〜２μｍ
の深さを有し、かつマスクとなるフォトレジスト膜被着
部分に一致している。(e)) Embodiment As shown in FIG. 1, a recess (2) is formed on the surface of a semiconductor (1) by a well-known selective knee-jetting method. This recess is shallower than the intended machining depth, for example 1 to 2 μm.
, and corresponds to the part where the photoresist film that will serve as a mask is deposited.

続く工程では、第２図に示す如く、凹所（２）内に７オ
トレジスト膜（３）を被着する。この被着方法は、フォ
トレジスト液をスピンナにより半導体（１）の表面に拡
げ、次いで露光、現像により凹所（２）内にのみフォト
レジスト膜を残すものである。このとき上記のスピンナ
塗布時に凹所（２）内にはレジスト液が溜まるので、同
部分のフォトレジスト膜の厚みが大となり、よって凹所
（２）内に形成されたフォトレジスト膜（３）にはピン
ホールは発生し難い。In the next step, as shown in FIG. 2, a 7-photoresist film (3) is deposited inside the recess (2). In this deposition method, a photoresist solution is spread over the surface of the semiconductor (1) using a spinner, and then exposed and developed to leave a photoresist film only in the recesses (2). At this time, since the resist liquid accumulates in the recess (2) during the spinner application, the thickness of the photoresist film in the same area increases, and therefore the photoresist film (3) formed in the recess (2) increases. pinholes are less likely to occur.

最終工程では、第３図に示す如く、フォトレジスト膜（
３）をマスクとして選択上・リチングがなされる。尚、
半導体（１）の側面や裏面にはワ・リクス等が塗布され
て、その部分での工・リチングが防止され勾。斯る選択
上・リチング時、その工・リチング深さが例えば２０μ
ｍといった如く深く、従ってエツチング時間が長い場合
でも、フォトレジスト膜（３）は厚く、ピンホールをも
っていないので、該膜下の半導体は不所望な工・リチン
グを受けない。In the final step, as shown in Figure 3, a photoresist film (
3) is used as a mask for selective retching. still,
The side and back surfaces of the semiconductor (1) are coated with wax, etc. to prevent etching and recessing in those areas. For such selection/riching, the depth of the process/riching is, for example, 20μ.
Even when the photoresist film (3) is thick and has no pinholes, even when the photoresist film (3) is as deep as 100 m and therefore has a long etching time, the semiconductor underneath the film is not subject to undesired etching or etching.

（へ）発明の効果 本発明によれば、耐工・リチングマスクとなるフォトレ
ジスト膜にピンホールが発生しないので、所望とする部
分のみの選択上・リチングを行なうことができる。(f) Effects of the Invention According to the present invention, since no pinholes are generated in the photoresist film that serves as a retching mask, selective retching can be performed only on desired portions.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図乃至第６図は本発明の実施例方法を示す工程別断
面図である。 （１）・・・半導体、（２）・・・凹部、（３）・フォ
トレジスト膜。 出願人三洋電機株式会社 代理人　弁理士　佐野静夫FIGS. 1 to 6 are cross-sectional views showing steps of an embodiment of the present invention. (1)... Semiconductor, (2)... Concavity, (3) Photoresist film. Applicant Sanyo Electric Co., Ltd. Representative Patent Attorney Shizuo Sano

Claims (1)

【特許請求の範囲】[Claims] （１）　半導体表面に部分的に被着されたフォトレジス
ト膜をマスクとして選択工噌チングを行なう際に、上記
表面のフォトレジスト膜被着部分に上記エツチング深さ
よりも浅い凹所を設け、該凹所にフォトレジスト膜を被
着することを特徴とする工・リチング方法。(1) When performing selective etching using a photoresist film partially deposited on the semiconductor surface as a mask, a recess shallower than the etching depth is provided in the portion of the surface where the photoresist film is deposited, and A processing and recessing method characterized by depositing a photoresist film on the recess.
JP3213284A 1984-02-21 1984-02-21 Etching method Pending JPS60175427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3213284A JPS60175427A (en) 1984-02-21 1984-02-21 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3213284A JPS60175427A (en) 1984-02-21 1984-02-21 Etching method

Publications (1)

Publication Number Publication Date
JPS60175427A true JPS60175427A (en) 1985-09-09

Family

ID=12350363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3213284A Pending JPS60175427A (en) 1984-02-21 1984-02-21 Etching method

Country Status (1)

Country Link
JP (1) JPS60175427A (en)

Similar Documents

Publication Publication Date Title
AU3800495A (en) Process for coating electrically non-conducting surfaces with connected metal structures
JPS60175427A (en) Etching method
JPH0137855B2 (en)
JPS6376455A (en) Manufacture of semiconductor device
JPH10135150A (en) Method of treating work piece
JPS5984436A (en) Manufacture of semiconductor device
JPH01109772A (en) Manufacture of semiconductor device
JPS5937494B2 (en) Thin film pattern formation method
JPH04124822A (en) Manufacture of semiconductor device
JPS59165425A (en) Pattern formation
JPS6132421A (en) Manufacture of semiconductor device
JPH01157555A (en) Formation of interlayer insulating film
JPS5898932A (en) Manufacture of semiconductor device
JPH01282503A (en) Formation of diffraction grating
JPH02208944A (en) Manufacture of semiconductor device
JPS63164338A (en) Manufacture of semiconductor device
JPH0358414A (en) Manufacture of semiconductor device
JPS5893330A (en) Manufacture of semiconductor device
JPS628511B2 (en)
JPH023926A (en) Forming method of wiring
JPH01236658A (en) Manufacture of semiconductor device
JPS6321829A (en) Manufacture of semiconductor device
JPS61198632A (en) Formation of resist pattern undercut
JPH03132024A (en) Manufacture of semiconductor device
JPS59191334A (en) Etching method for semiconductor substrate