JPS60170995A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPS60170995A
JPS60170995A JP2754984A JP2754984A JPS60170995A JP S60170995 A JPS60170995 A JP S60170995A JP 2754984 A JP2754984 A JP 2754984A JP 2754984 A JP2754984 A JP 2754984A JP S60170995 A JPS60170995 A JP S60170995A
Authority
JP
Japan
Prior art keywords
solder
wiring board
components
conductive film
anisotropic conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2754984A
Other languages
Japanese (ja)
Inventor
柏原 隆司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2754984A priority Critical patent/JPS60170995A/en
Publication of JPS60170995A publication Critical patent/JPS60170995A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はテレビ、ステレオ、ビデオな(!l’(ID 
一般電気製品に主として用いられる配線基板に関するも
のである。
[Detailed Description of the Invention] Industrial Application Field The present invention is applicable to television, stereo, video (!l'(ID
This invention relates to wiring boards mainly used in general electrical products.

従来例の構成とその問題点 近年2機器の小形軽量化に伴い、それに内装する配線基
板も小形化が要求され、部品の小形化とあいまって高密
度な実装が計られるようになって来た。
Conventional configurations and their problems In recent years, as devices have become smaller and lighter, the wiring boards installed inside them have also been required to be smaller, and together with the miniaturization of components, high-density packaging has begun to be attempted. .

従来、印刷配線基板に抵抗、トランジスタなどの小形チ
ップ部品を接続する方法は、そのほとんどがはんだ付け
でなされている。
Conventionally, most of the methods for connecting small chip components such as resistors and transistors to printed wiring boards have been done by soldering.

その−例を述べると、まず配線基板の部品が搭載される
位置に部品固着用の接着剤を供給し、しかる後に部品を
搭載し、接着剤を固化させ部品が移動脱落しない状態に
なし、それをはんだが溶融しているはんだ槽に浸漬する
か、または溶融はんだが噴流している噴流帯に、配線基
板のはんだ付は面を接触はせ、はんだ付けを行うという
方法がある。
To give an example, first, adhesive for fixing the components is supplied to the position on the wiring board where the components are to be mounted, then the components are mounted, the adhesive is solidified, and the components do not move or fall off. There is a method of soldering a wiring board by immersing it in a solder bath containing molten solder, or by placing its surface in contact with a jet zone where molten solder is flowing.

このような方法によると、まず接着剤を所定の箇所に滴
下する必要があり、さらに部品を載1したあと接着剤を
固化させなければならず、この分だけ生産工程が増加す
る。また、接着剤量が多すぎると、接着剤がはみたし、
はんだ付は電極へ侵入すると、はんだ付は不良の一因と
なる。また部品が、溶融はんだの高熱に直接さらされる
ため、部品の性能が熱によって劣化するなどの問題を有
している。
According to such a method, it is first necessary to drop the adhesive onto a predetermined location, and then the adhesive must be solidified after the parts are mounted, which increases the number of production steps. Also, if the amount of adhesive is too large, the adhesive will leak,
If the soldering penetrates into the electrode, the soldering becomes a cause of failure. Furthermore, since the parts are directly exposed to the high heat of the molten solder, there is a problem that the performance of the parts deteriorates due to the heat.

づらに、溶融はんだ全はんだ付は電極に接触させ、はん
だを供給するというはんだ利は機構であるため、部品間
の間隔がせ捷い所に位置する電極には、はんだの表面張
力が太きいためはんだが侵入せず、したがってはんだ付
けがなされない。
On the other hand, since molten solder is soldered by a mechanism in which the solder is brought into contact with the electrode and the solder is supplied, the surface tension of the solder is large on the electrode located in a place where the distance between parts is narrow. There is no solder intrusion and therefore no soldering.

捷たチップ部品のなかには、部品本体下面にはんだ付は
電極が形成されているものがあり、このような部品に対
しては前述したような方法ではんだ付けすることは事実
上不可能である。捷た部品端子ピッチ間隔、パターン間
隔が狭くなると、はんだブリッジが発生し高密度な実装
には対応できない等数々の欠点を有している。
Some of the shredded chip components have electrodes formed on the bottom surface of the component body, and it is virtually impossible to solder such components by the method described above. When the pitch of the twisted component terminals and the pattern interval become narrower, solder bridging occurs and high-density packaging cannot be accommodated.

捷た他の一例として、基板の部品はんだ付は電極箇所に
、あらかじめスクリーン印刷、ティスペンサなどで必要
量のクリームはんだを供給し、しかる後に部品を搭載し
、それをはんだ付は用雰囲気炉、赤外線炉等に搬入加熱
して、クリームはんだを溶融凝結させ部品をはんだ付け
するという方法がある。
Another example of soldering of components on a board is to supply the required amount of cream solder to the electrodes using screen printing or a dispenser in advance, then mount the components, and solder them using an atmospheric furnace or infrared rays. There is a method in which the solder cream is melted and solidified by heating it in a furnace or the like and then soldering the parts.

このような方法によると、スクリーン印刷でクリームは
んだを供給するため、はんだMk比較的正確に、しかも
位置N度よく微細に載置できるので、先に述べた方法よ
りは高密度な部品実装に対応できる。しかしクリームは
んだを所定置所に載置したあと、クリームはんだの″ダ
レ″゛ニジミ″が必ず発生するので、実装密度が高くな
り電極間隔が狭くなるとクリームはんたの゛ダレ″パニ
ジミ”によって隣接するクリームはんだ間の間隔がきわ
めて狭くなったり、あるいは架橋するという現象が生じ
、このような状態のものを加熱しクリームはんだを溶融
凝結きせると、電極間ではんだブリッジが生じる。した
がって実装密度は、クリームはんだの゛ダレ″パニジミ
”が生じても十分に安全な間隔が確保される密度捷でに
限定はれる。
According to this method, since cream solder is supplied by screen printing, it is possible to place the solder Mk relatively accurately and finely in the N degree position, so it is compatible with higher-density component mounting than the above-mentioned method. can. However, after the cream solder is placed in a designated place, ``sag'' and ``bleeding'' of the cream solder always occur, so when the mounting density becomes high and the electrode spacing becomes narrow, the cream solder ``sag'' and ``bleeding'' will cause the cream solder to sag. A phenomenon occurs in which the gap between the cream solder becomes extremely narrow or crosslinks between the electrodes, and when such a state is heated and the cream solder is melted and solidified, solder bridges occur between the electrodes.Therefore, the packaging density is Even if the cream solder sag, it is limited to a density that ensures a safe distance.

また部品の固定には特に接着剤を用いず、クリームはん
だの粘着性で保持しているため、加熱によりクリームは
んだが溶融流動化すると、これの動きで部品が移動し、
電極からずれてはんだ付は不良となったり、@9の電極
と短絡するなどの問題点を有している。
In addition, no special adhesive is used to fix the parts, but the adhesiveness of the cream solder is used to hold them in place, so when the cream solder melts and fluidizes due to heating, the parts move due to the movement of the cream solder.
There are problems such as deviation from the electrode, resulting in poor soldering, and short circuit with the @9 electrode.

発明の目的 本発明は前述したような従来例の欠点を解消し、ζらに
高密度で信頼性の高い部品実装を可能にした配線基板を
提供するものである。
OBJECTS OF THE INVENTION The present invention eliminates the drawbacks of the prior art as described above and provides a wiring board that enables high-density and highly reliable component mounting.

発明の構成 本発明の配線基板は、基板表面に配線パターンが形成さ
れた配線基板の、上記配線パターンの上に膜厚方向に導
電性を有する異方性導電膜を貼付し、さらに前記異方性
導電膜上に電子部品を搭載固定し、上記配線パターンと
上記電子部品との間で、電気導通性を持たせるように構
成したものであり、これによりはんだによる電子部品の
機械的固着と電気的接続を不用とし、さらに電子部品が
、はんだ付けのように高温度にさらされないので、熱に
よる部品性能の劣化を紹〈ことなく、きわめて簡素な作
業で信頼性の高い、高密度な部品実装を可能としたもめ
である。
Structure of the Invention The wiring board of the present invention includes a wiring board having a wiring pattern formed on the surface of the board, an anisotropic conductive film having conductivity in the film thickness direction on the wiring pattern, and further comprising: Electronic components are mounted and fixed on a conductive film to provide electrical continuity between the wiring pattern and the electronic components. Furthermore, since electronic components are not exposed to high temperatures like soldering, it is possible to achieve highly reliable and high-density component mounting with extremely simple work without introducing deterioration of component performance due to heat. This is the conflict that made it possible.

実施例の説明 以下本発明の一実施例について、図面を参照にしながら
説明する。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明における実施例の分解構成図である。符
号1は配線基板で、2は配線基板1の表面に形成された
配線パターンである。3は異方性導電膜で、4はチップ
形電子部品である。チップ部品4の両端には電極4aが
形成されている。第2図は部品実装後の状態を示したも
のである。捷ず、配線基板10表面に形成された配線パ
ターン2を覆うように、異方性導電膜3を貼付し、その
上から配線パターン2に対応した位置にチップ部品4を
搭載する。異方性導電膜3には熱硬化性捷たけ紫外線照
射によって硬化する元硬化性接着剤またはその両者を含
有させて、常温において貼着性を伺与しておき、チップ
部品4を搭載と同時に押圧し、仮固定を行う。このよう
にチップ部品4が仮固定された配線基板1に、力n熱ま
たは紫外線照射を行い、接着剤を硬化させ、搭載部品の
本固定を行う。異方性導電膜3は膜厚方向にのみ電気的
導通が成されるので、チップ部品4を搭載し押圧するこ
とで、配線パターン2とチップ部品4の電極4aとの電
気的接続は、すでに完了している。
FIG. 1 is an exploded configuration diagram of an embodiment of the present invention. Reference numeral 1 is a wiring board, and 2 is a wiring pattern formed on the surface of the wiring board 1. 3 is an anisotropic conductive film, and 4 is a chip-shaped electronic component. Electrodes 4a are formed at both ends of the chip component 4. FIG. 2 shows the state after the components are mounted. An anisotropic conductive film 3 is attached so as to cover the wiring pattern 2 formed on the surface of the wiring board 10 without being separated, and a chip component 4 is mounted on the anisotropic conductive film 3 at a position corresponding to the wiring pattern 2. The anisotropic conductive film 3 is made to contain a thermosetting adhesive and/or both that are cured by ultraviolet irradiation to provide adhesive properties at room temperature. Press to temporarily fix. The wiring board 1 on which the chip components 4 are temporarily fixed in this manner is subjected to force, heat or ultraviolet irradiation to harden the adhesive and permanently fix the mounted components. Since the anisotropic conductive film 3 is electrically connected only in the film thickness direction, by mounting and pressing the chip component 4, the electrical connection between the wiring pattern 2 and the electrode 4a of the chip component 4 is already established. Completed.

発明の効果 以上の説明から明らかなように、本発明は異方性導電膜
を用い、これに貼着性を付与することで、従来のような
はんだによる部品の電気的1機械的接続を不用としてい
る。従ってはんだブリッジによるショート、はんだ不足
による導通不良が皆無となり、実装密度の飛躍的向上が
計れる。また搭載部品は仮固定されるので、はんだ付は
時に生じる搭載部品のゆがみ、浮き上がり等が発生する
ことなく、さらに基板の両面にもきわめて簡単に部品の
搭載が可能であり、下面側の部品が脱落することもない
。またはんだ付は時のように部品が高温にさらされるこ
とがないので、熱による部品特性の劣化を招くことがな
く、きわめて簡素な構成で、しかも短い工程で信頼性の
高い、高密度な部品実装を可能とした配線基板を提供す
るものである。
Effects of the Invention As is clear from the above explanation, the present invention uses an anisotropic conductive film and imparts adhesive properties to it, thereby eliminating the need for electrical and mechanical connections of parts using solder as in the past. It is said that Therefore, short circuits due to solder bridges and conduction defects due to insufficient solder are completely eliminated, and packaging density can be dramatically improved. In addition, since the mounted components are temporarily fixed, there is no distortion or lifting of the mounted components, which sometimes occurs during soldering, and components can be mounted extremely easily on both sides of the board, making it possible to easily mount components on both sides of the board. It won't fall off. Since the parts are not exposed to high temperatures as in the case of soldering, there is no deterioration of the parts' characteristics due to heat, and the structure is extremely simple, and it is possible to produce highly reliable, high-density parts in a short process. The present invention provides a wiring board that can be mounted.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の配線基板の一実施例を示す分解構成図
、第2図は配線基板への部品実装後の状態を示す断面図
である。 1・・・・配線基板、2・・・・・配線パターン、3・
・・・・・異方性導電膜、4・・・・・・チップ部品、
4a・・・・・・電極。
FIG. 1 is an exploded configuration diagram showing one embodiment of the wiring board of the present invention, and FIG. 2 is a sectional view showing the state after components are mounted on the wiring board. 1... Wiring board, 2... Wiring pattern, 3...
...Anisotropic conductive film, 4...Chip parts,
4a... Electrode.

Claims (1)

【特許請求の範囲】 (1)基板表面に配線パターンが形成された配線基板の
上記配線パターンの上に、膜厚方向に導電性を有する異
方性導電膜を貼付し、さらに前記異方性電膜上に電子部
品を搭載固定し、上記配線パターンと上記電子部品との
間で、膜厚方向にのみ電気導通性を持たせたことを特徴
とする配線基板。 (2)異方性導電膜に貼着性を伺加したことを特徴とす
る特許請求の範囲第1項記載の配線基板。 (i)異方性導電膜に熱硬化性樹脂を含有させたことを
特徴とする特許請求の範囲第1項記載の配線基板。 (4)異方性導電膜に光硬化性樹脂を含有させたことを
特徴とする特許請求の範囲第1項記載の配線基板。
[Scope of Claims] (1) An anisotropic conductive film having conductivity in the film thickness direction is pasted on the wiring pattern of a wiring board having a wiring pattern formed on the surface of the board, and A wiring board characterized in that electronic components are mounted and fixed on an electrical film, and electrical conductivity is provided only in the film thickness direction between the wiring pattern and the electronic components. (2) The wiring board according to claim 1, wherein the anisotropic conductive film has adhesive properties. (i) The wiring board according to claim 1, wherein the anisotropic conductive film contains a thermosetting resin. (4) The wiring board according to claim 1, wherein the anisotropic conductive film contains a photocurable resin.
JP2754984A 1984-02-16 1984-02-16 Circuit board Pending JPS60170995A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2754984A JPS60170995A (en) 1984-02-16 1984-02-16 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2754984A JPS60170995A (en) 1984-02-16 1984-02-16 Circuit board

Publications (1)

Publication Number Publication Date
JPS60170995A true JPS60170995A (en) 1985-09-04

Family

ID=12224146

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2754984A Pending JPS60170995A (en) 1984-02-16 1984-02-16 Circuit board

Country Status (1)

Country Link
JP (1) JPS60170995A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6269481A (en) * 1985-09-20 1987-03-30 松下電器産業株式会社 Element to be heated for induction heating cooking device
JPS62194693A (en) * 1986-02-12 1987-08-27 信越ポリマ−株式会社 Electronic parts
JPS62194692A (en) * 1986-02-14 1987-08-27 信越ポリマ−株式会社 Electronic parts

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6269481A (en) * 1985-09-20 1987-03-30 松下電器産業株式会社 Element to be heated for induction heating cooking device
JPS62194693A (en) * 1986-02-12 1987-08-27 信越ポリマ−株式会社 Electronic parts
JPH0332237B2 (en) * 1986-02-12 1991-05-10 Shinetsu Polymer Co
JPS62194692A (en) * 1986-02-14 1987-08-27 信越ポリマ−株式会社 Electronic parts

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