JPS60166295U - Reversible interlock circuit - Google Patents
Reversible interlock circuitInfo
- Publication number
- JPS60166295U JPS60166295U JP1984053530U JP5353084U JPS60166295U JP S60166295 U JPS60166295 U JP S60166295U JP 1984053530 U JP1984053530 U JP 1984053530U JP 5353084 U JP5353084 U JP 5353084U JP S60166295 U JPS60166295 U JP S60166295U
- Authority
- JP
- Japan
- Prior art keywords
- reverse
- signal
- input
- rotation
- interlock circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の可逆インターqツクを示す回路図、第2
図はこの考案の一実施例を示す可逆インターロック回路
の回路図、第3図は第2図の動作状態を示スタイムチャ
ートである。なお、各図小同一符号は同一又は相当部分
を示すものとする。
.X?,X2、:指令接点、SSCP,SSCR:ソリ
ットステートコンタ名夕。Figure 1 is a circuit diagram showing a conventional reversible interq;
The figure is a circuit diagram of a reversible interlock circuit showing an embodiment of this invention, and FIG. 3 is a time chart showing the operating state of FIG. 2. Note that the same reference numerals in each figure indicate the same or corresponding parts. .. X? ,X2,: Command contact, SSCP, SSCR: Solid state contour.
Claims (1)
ッドステートコンタクタを駆動する回路において、正転
から逆転または逆転から正転に切り換るときに、設定さ
れたインターロック時間により正転側と逆転側のソリツ
ドステートコンタクタの相間短絡を防止すると共に、先
に入力された正転または逆転信号が優先となり、後から
入力された逆転または正転信号は、先に入力され冫こ信
号がオフとなり、かつインタ」、ロック時間が経過する
まで無効となるように構成したことを特徴どする可逆イ
ンターロック回路。In a circuit that drives a solid-state contactor on the forward or reverse side using a forward or reverse signal, when switching from forward to reverse or from reverse to forward, the set interlock time will cause the switch to switch between the forward and reverse sides. In addition to preventing phase-to-phase short circuits of the solid-state contactor on the reverse side, the forward rotation or reverse rotation signal that is input first has priority, and the reverse rotation or forward rotation signal that is input later is input first and the second signal is turned off. A reversible interlock circuit is characterized in that it is configured to be disabled until a lock time has elapsed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984053530U JPS60166295U (en) | 1984-04-13 | 1984-04-13 | Reversible interlock circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984053530U JPS60166295U (en) | 1984-04-13 | 1984-04-13 | Reversible interlock circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60166295U true JPS60166295U (en) | 1985-11-05 |
JPH0420000Y2 JPH0420000Y2 (en) | 1992-05-07 |
Family
ID=30574482
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984053530U Granted JPS60166295U (en) | 1984-04-13 | 1984-04-13 | Reversible interlock circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60166295U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63146490U (en) * | 1987-03-16 | 1988-09-27 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5543939A (en) * | 1978-09-20 | 1980-03-28 | Toshiba Corp | Reversible operation controller |
-
1984
- 1984-04-13 JP JP1984053530U patent/JPS60166295U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5543939A (en) * | 1978-09-20 | 1980-03-28 | Toshiba Corp | Reversible operation controller |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63146490U (en) * | 1987-03-16 | 1988-09-27 |
Also Published As
Publication number | Publication date |
---|---|
JPH0420000Y2 (en) | 1992-05-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS60166295U (en) | Reversible interlock circuit | |
JPS58131413U (en) | tape deck | |
JPS59104633U (en) | Multifunctional electronic switch | |
JPS58178724U (en) | Gain switching circuit in amplifier | |
JPS5933113U (en) | Tape recorder switching device | |
JPS6127220U (en) | Load tap switching device for reactor | |
JPS58189629U (en) | Day reset circuit using analog switch | |
JPS6116631U (en) | Power cutoff device for computer peripheral storage devices | |
JPS606329U (en) | Power amplifier protection circuit | |
JPS59147327U (en) | Switching input judgment circuit | |
JPS59125141U (en) | switching circuit | |
JPS58100490U (en) | Motor control circuit | |
JPS60177521U (en) | Power switching circuit | |
JPS58183657U (en) | Tape recorder switching circuit with reverse function | |
JPS5956638U (en) | double tape deck | |
JPS5823038U (en) | Commander recording mode release prevention device | |
JPS5953404U (en) | sequence circuit | |
JPS61170129U (en) | ||
JPS61136621U (en) | ||
JPS583793U (en) | magnetic disk device | |
JPS58186633U (en) | Switcher control circuit | |
JPS58116195U (en) | Operation control device in press | |
JPS59169147U (en) | Deck power supply priority circuit | |
JPS60124842U (en) | Relay operation mode switching circuit | |
JPS5947896U (en) | electronic clock |