JPS59169147U - Deck power supply priority circuit - Google Patents
Deck power supply priority circuitInfo
- Publication number
- JPS59169147U JPS59169147U JP6274783U JP6274783U JPS59169147U JP S59169147 U JPS59169147 U JP S59169147U JP 6274783 U JP6274783 U JP 6274783U JP 6274783 U JP6274783 U JP 6274783U JP S59169147 U JPS59169147 U JP S59169147U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- line
- power supply
- power
- deck
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Circuits Of Receivers In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1−図は従来例を示す回路図、第2図、第4図、第5
図および第6図は本考案実施例を示す回路図、第3図は
本考案を説明するためのパターン図である。
1・・・共通電源、2・・・ステレオデツキ回路、3・
・・ラジオ回路、4・・・制御回路、5・・・チューナ
回路、6・・・増幅回路、L工・・・第1の電源ライン
、L2・・・第2の電源ライン、1□・・・第1のライ
ン、1□・・・第2のライン、T1〜T6・・・端子、
SWl、 SW2.5W3−・・スイッチ。Figure 1 is a circuit diagram showing a conventional example, Figures 2, 4, and 5.
6 and 6 are circuit diagrams showing an embodiment of the present invention, and FIG. 3 is a pattern diagram for explaining the present invention. 1... Common power supply, 2... Stereo deck circuit, 3.
...Radio circuit, 4...Control circuit, 5...Tuner circuit, 6...Amplifier circuit, L construction...First power line, L2...Second power line, 1□- ...First line, 1□...Second line, T1-T6...Terminal,
SWl, SW2.5W3-...Switch.
Claims (1)
回路を動作させるようにした電源優先回路において、共
通電源に直接に接続され得る第1の電源ラインおよび共
通電源にステレオデツキ回路を介して接続された第2の
電源ラインがラジオ回路に接続されるように構成したこ
とを゛特徴とするデツキ電源優先回路。 2 上記第1の電源ラインがステレオデツキ回路内に設
けられたスイッチを介してラジオ回路に接続されてなる
ことを特徴とする実用新案登録請求の範囲第1項記載の
デツキ電源優先回路。 3 上記第1の電源ラインおよび第2の電源ラインが制
御回路を介してラジオ回路に接続されてなることを特徴
とする実用新案登録請求の範囲第1項又は第2項記載の
デツキ電源優先回路。 4 上記ラジオ回路がチューナ回路および増幅回路を含
むことを特徴とする実用新案登録請求の範囲第2項記載
のデツキ電源優先回路。 5 上記制御回路が、第1の電源ラインに接続されかつ
チューナ回路に電源を供給し得る第1のラインおよび増
幅回路に電源を供給し得る第2のラインと、第1の電源
ラインおよび第2の電源ラインに接続されかつ上記第2
のラインの導通状態を制御するための第1のスイッチン
グ素子および第2の電源ラインに接続され上記第1のラ
インの導通状態を制御するための第2のスイッチング素
子とを含むことを特徴とする実用新案登録請求の範囲第
4項記載のデツキ電源優先回路。 6 上記第1のラインおよび第2のラインを介して第1
の電源ラインからの電源が各々チューナ回路および増幅
回路に供給されている時、上記 −ステレオデツキ
回路を動作させることにより第2の電源ラインからの電
源によって上記第1のスイッチング素子および第2のス
イッチング素子を動作させ、第2のラインのみを導通さ
せて上記第1の電源ラインからの電源を増幅回路に供給
するように構成したことを特徴とする実用新案登録請求
の範囲第5項記載のデツキ電源優先回路。[Claims for Utility Model Registration] ■ In a power supply priority circuit in which a stereo deck circuit and a radio circuit are operated by a common power supply, the stereo deck circuit is connected to a first power supply line and a common power supply that can be directly connected to the common power supply. A deck power supply priority circuit characterized in that the second power supply line connected through the radio circuit is configured to be connected to a radio circuit. 2. The deck power priority circuit according to claim 1, wherein the first power supply line is connected to a radio circuit via a switch provided in the stereo deck circuit. 3. The deck power priority circuit according to claim 1 or 2 of the utility model registration claim, characterized in that the first power line and the second power line are connected to a radio circuit via a control circuit. . 4. The deck power supply priority circuit according to claim 2, wherein the radio circuit includes a tuner circuit and an amplifier circuit. 5 The control circuit connects a first line that is connected to the first power line and can supply power to the tuner circuit, a second line that can supply power to the amplifier circuit, a first power line and a second line. connected to the power line of the second
a first switching element for controlling the conduction state of the line; and a second switching element connected to the second power supply line and for controlling the conduction state of the first line. A deck power supply priority circuit according to claim 4 of the utility model registration claim. 6 The first line via the first line and the second line.
When the power from the power supply line is supplied to the tuner circuit and the amplifier circuit, respectively, the first switching element and the second switching element are operated by the power from the second power supply line by operating the stereo deck circuit. The deck according to claim 5 of the utility model registration, characterized in that the device is configured to operate the device and make only the second line conductive to supply power from the first power supply line to the amplifier circuit. Power priority circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6274783U JPS59169147U (en) | 1983-04-25 | 1983-04-25 | Deck power supply priority circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6274783U JPS59169147U (en) | 1983-04-25 | 1983-04-25 | Deck power supply priority circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59169147U true JPS59169147U (en) | 1984-11-12 |
Family
ID=30192936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6274783U Pending JPS59169147U (en) | 1983-04-25 | 1983-04-25 | Deck power supply priority circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59169147U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5536418B2 (en) * | 1973-01-11 | 1980-09-20 |
-
1983
- 1983-04-25 JP JP6274783U patent/JPS59169147U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5536418B2 (en) * | 1973-01-11 | 1980-09-20 |
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