JPS6016104B2 - How a thyristor circuit works - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an emitter region and a gate in the form of a notched emitter gate structure, a gate region tangentially connected to the gate, and a gate region that is less doped than the gate region and the anode region. a base region in which the gate region has no short circuit to an electrode contact-connected to the emitter region bridging the PN junction between the gate region and the emitter region; comprises a first and a second layer, the first layer adjacent to the gate region and using at least one thyristor that is doped less than the second layer; using biasing means for supplying an alternating current having a voltage across the thyristor of the type described above, and a gate circuit for supplying a predetermined potential across the thyristor for selectively firing the thyristor;
A method of operating a thyristor circuit comprising a load and at least one thyristor connected in series with the load.

A circuit of the type described above is available from "International Journal Electronics 36" (lnt.JElectro
nics) (1974) P. 399-416.

A switch circuit used in this type of circuit is, for example, "Syristollen" (1970, Germany), published by P. 131-133
or “Fundament of a Pulse with Modulated / War Circuit” (197
2. US) P. 266-275 or “Militium Stromrichter Handbuch” (1971 Switzerland) P
．． 197-201. lnt. J. Electronics 36 (1974) P. The thyristor of the circuit known from No. 399-416 has a turn-off time of less than 2 Sec, a permissible voltage rise rate or dv/dt value of 600 V/msec, a forward and reverse blocking voltage of 650 V and a switch of 10 msec. Has a frequency. A short turn-off (recovery) time is effectively achieved by controlling the gate as follows.

In the case of a P-gate region, the negative potential of the gate thus serves to rapidly deplete the passing carriers to be blocked from the gate and base regions. This principle is known as "gate-assisted turn-off" (GATO).

However, if the semiconductor component to be blocked has a large diameter, there is a risk that the current will crowd into the small diameter channels, causing overheating and damage there. To avoid this, a notch-shaped emitter gate structure is provided. This structure allows the negatively polarized gate to rapidly affect all portions of the P-gate region. The additionally high conductivity of the P-gate region aids this action. In the case of a P-gate region, it is not permissible to provide shorted emitters that short-circuit the PN-junction on the cathode side. This is because the presence of short emitters may prevent negatively gated gates from working effectively. Rather, the PN junction must have a sufficiently satisfactory blocking ability. This is because this blocking ability limits the negative potential of the gate. The notched emitter gate structure is important not only for turn-off but also for turn-off.

This is because the firing from the gate is thereby quickly propagated to all active parts of the thyristor. Without a notched emitter structure, the switching losses are significantly higher and the permissible current rate is lower. Indeed, there are strong limitations in this regard in that high firing forces and very narrow cathode strip widths are required to uniformly fire long cathode greens.

When the full power of the cathode surface is ignited within 1 French sec, an ignition current on the order of the passing current is required, and the cathode strip width is about 300 mm.

In practice, however, this kind of solution is not suitable, since many active surfaces are destroyed by this. lnt. J. Electronics 36 (1974) P. The electrical circuit known from No. 399-416 is also not suitable for high blocking voltages of, for example, 1000 V or more.

This is because a high blocking voltage requires a thick and highly resistive base region of the thyristor. However, this type of base region can be improved by inserting recombination centers, for example by doping with gold.
Unless the lifetime of J is significantly reduced, the carriers are prevented from being depleted far enough from the transit state to be blocked. This type of recombination center is however undesirable since it gives rise to a high forward voltage drop. Therefore, a thyristor circuit is desired which has a high forward blocking voltage and a high value of current capacity and voltage rise rate at a minimum turn-off time (recovery time) and low turn-off losses.

As mentioned at the beginning, this type of thyristor circuit is the following thyristor circuit.

i.e. with a thyristor for a switching frequency of more than 10 KHz at a typical blocking voltage of more than 500 V, the thyristor having a notch-shaped emitter gate structure, a gate region in contact with the gate, and a lower doping than the gate region. When the thyristor is turned off, the gate remains at a potential with a polarity opposite to that of the majority carrier in the gate region and has a PN relationship with the emitter region adjacent to the gate region.
An electrical circuit having no breakdown to the electrode contacting the emitter region to short-circuit the junction, the base region being double-layered such that the layer adjacent to the gate region is lower doped. An electrical circuit with a high frequency thyristor is used, consisting of: Circuit means for such countermeasures are known from "IEE. Conference Publication 123" (1974, English), pages 13-19.

This allows the thickness of the base region to be significantly reduced without reducing the forward blocking voltage. The high-resistance layer in the base region is completely depleted of free carriers even at relatively low voltages, while the low-resistance layer serves to avoid widening of the blocking layer and thus "punch-through".
The gate and base regions approximately form a PIN-structure. In the P-river structure, the electric field distribution is rectangular instead of triangular. A highly doped second emitter region (
If the N-doped base region is followed by an anode layer), the overall structure is particularly easy to manufacture.

However, this arrangement can only block very low voltages, for example 25V, in the reverse direction. However, this is not a drawback for practical switch circuits. This is because the thyristors must in any case be bridged by anti-parallel diodes in the reverse blocking direction. (See also the documents cited at the outset in connection with known circuits.) The object of the invention is therefore to provide an advantageous method of operating an electrical circuit with a thyristor as described above.

According to the present invention, this problem is solved as follows.

that is, biasing means are provided between the emitter region and the anode region of said at least one thyristor for supplying an alternating current having a frequency higher than 10 KHz and a voltage higher than 500 V to the thyristor, and during the forward blocking condition for said thyristor. maintaining the potential of the gate such that the PN junction between the gate region and the adjacent emitter region is gated in the blocking direction, and the biasing means generating a leakage current in the forward blocking state;
and the thyristor is operated with the leakage current during the positive load current period, and the potential of the gate is set to a value between zero and a value of opposite polarity to the potential of the gate during the blocking period. setting or opening the gate circuit, and after the alternating current has reached its negative load current period, the potential of the gate is again set to its previous value. According to the method of operation of the present invention, rather than being ignited by applying a potential to an otherwise substantially neutral gate, as in the prior art, the gate circuit is opened. A thyristor which is already capable of breakover firing when the voltage is small in the forward state is held in the blocked state via the gate and then fired by opening the gate circuit or reversing the polarity of the potential at the gate. be done.

According to the invention, the entire active part of the syringe is thus ignited very quickly. The ignition is then no longer effected by a laterally flowing gate-ignition force current, but by an axially flowing reverse current which occurs in the high-resistance layer in the base region during the formation of the blocking layer. The thyristor is easily ignited due to the absence of short emitters, which is desirable for the method of operation of the invention, but which would otherwise be a disadvantage. The usefulness of the functionality of the method of operation according to the invention was not foreseen.

This is because the reverse current used for ignition is strongly temperature dependent. However, this temperature dependence is not really a problem. This is because the current generated at the PN junction between the gate region and the adjacent emitter region has the same temperature dependence. Next, the present invention will be described in detail based on embodiments shown in the drawings.

Figure 1 shows a series resonant circuit load RLC, e.g. a high frequency induction furnace L with a series capacitor C, an anti-parallel diode D
, , m2, T thyristor circuit according to the invention bridged in the reverse blocking direction by D2, D3, D4
h3, shows an inverter with TL.

For example, an intermediate circuit inverter is used, in which case a direct voltage is supplied during the day. As shown in FIG. 2, a voltage U is applied each time to the main terminal pair of each thyristor Th, to m4.

A control voltage UG is applied to the gate terminal G. The curve of the control voltage for a thyristor with a P-control region and an N-base region is shown in FIG. UG is the first member and therefore the thyristor is shut off. If at time Z, for example, the gate voltage UG of the thyristors m and m4 of the circuit is set to zero or a positive value, this thyristor pair is fired and a current 1^K flows through Th and T~. This current changes its conductivity at time W. This current also flows through anti-parallel diodes ○ until the thyristor pair of circuits Th2 and Th3 is fired at time T and conducts current.
, and D4. At this point T, the circuit T
h, and the voltage U at the thyristor TL rises again. In order to cut off this voltage, between time points W and T, the thyristor Th and the gate G of m4 are again set to a negative potential. In this way, a rectangular alternating current voltage UL and a phase-shifted alternating current 1 are generated at the load L. By using the thyristor circuit according to the invention, the inverter can be constructed with semiconductor components even at high frequencies, for which hitherto only electron tubes have been used. 3, the first emitter region 1, the gate region 2, the base region having the high resistance layer 3a and the low resistance layer 3b, the second emitter region 4 and the first main electrode 5. , a gate electrode 6 , and a second main electrode 7 .

PN junction J. between regions 1/2, 2/3a, and 3a/4. ，
There are J2 and J3. The terminal of the main electrode 5 is E, and the terminal of the main electrode 7
The terminal of the gate electrode 6 is indicated by E2, and the terminal of the gate electrode 6 is indicated by G. Since no cut-off voltage is applied to the PN junction J3, a particularly advantageous positive beveling (lEEE transaction, ED-11 (19
64) P313) is provided.

It can be seen in FIG. 4 that the thyristor of FIG. 3 has a notched emitter gate structure.

The stripe width of the emitter region 1 is indicated by b, and the stripe width of the gate region 2 is indicated by g. Relatively high power losses occur in continuously operating high frequency thyristors.

This power loss is designed based on the operating temperature of 37 dishes. Epitaxial N-type base thyristor No. 5
The figure shows the doping progress for the thyristor (the relationship between the distance X from the end face and the value of the doping concentration N).

This thyristor is manufactured using epitaxial technology on a substrate. This thyristor has the following layers. The acceptor concentration N^ in the P+ substrate (corresponding to the second emitter region 4 in FIG. 3) is 1 and 9 arc-3, for example 300 arc-3, although the layer thickness is not critical for the function. The donor concentration No. in the N layer (corresponding to layer 3b in FIG. 3) is 2.1 and 6 arc-3, and the layer thickness is 30 mounds.

The donor concentration No in the N layer (corresponding to layer 3a in FIG. 3) is 1.1 and 4-3, and the layer thickness is 70 mm.
The acceptor concentration N^ in the P layer (corresponding to gate region 2 in Fig. 3) is 4.1 and 6 -3, and the layer thickness is 10.
It's A's. In the N+ layer (corresponding to the first emitter region in FIG. 3) with alloyed metallization (5/6 in FIG. 3) the donor concentration N.

is within the range of 5.1 and 8 to 5.1 and 9 skin-3, and the thickness of the layer is 10 to 20 skin. This N+ layer can also be produced by diffusion into a P layer of corresponding thickness. layer 3a, to reduce the lifetime of the injected carrier;
In 3b, gold is diffused by known methods to a concentration of about 6.1 and 3 -3, resulting in a lifetime of 0.7 m.s.

The voltage when the entire N-layer 3a is depleted of free carriers is UP=400y.

Maximum for silicon. The electric field strength of 2.1 and V/skin reaches the PN-junction J2 at a forward blocking voltage of UB=1000V.

In the reverse direction, the breakdown voltage of Nr junction J3 occurs at 35V. A maximum of 20 V can be applied to the N0P junction J, between the gate region 2 and the emitter region 1. N+
When the current density through the P junction J, is greater than the current generated in this junction, the cathode E, injects electrons into the P base 2.

As the blocking voltage at junction J2 increases, the reverse current increasingly exceeds the current generated by J, and as soon as the forward blocking voltage exceeds 130 V, the thyristor is fired uniformly by interrupting the gate circuit. This value is actually temperature dependent, since the reverse current and the generated current of the N0P junction J, have almost the same temperature dependence. The minimum firing current density with 37 sails is 3 mA/, and the maximum reverse current density with a forward voltage of 1000 V is 20 wA/.

When a uniform current density i flows from the N-- region 3a to the P- layer 2 and reaches the gate below the cathode strip of width b, a phantom maximum voltage drop occurs.

However, d is the thickness of the P layer 2, and p is the specific resistance of the P layer 2. This allows the cathode E, with a negative gate voltage of 10 V and a stripe width of two stripes, to conduct a current with a maximum current density of 4 A/ground without injecting electrons. This value is 300 times greater than the maximum reverse current density, thus ensuring that ignition is dominated by the reverse current. The maximum current density that can be passed through the gate G is approximately 1000 V/r at the base 3a/3b of about 2
The dv/dt value in sec must be acceptably high. The turn-off time of this thyristor is 1.5 to 2 French seconds. The above-mentioned thyristor operates with the following data, for example.

Periodic peak cutoff voltage: 800V Continuous time limit current: 100A Critical voltage rise rate: 200 Normal critical kick rise rate: 20 Normal switch frequency: 50KHz Gate potential at cutoff: -10V, gate potential at ignition: 0 to 11 IVP-type one-base thyristors FIG. 6 shows the doping sequence for a P-type base thyristor.

It can be manufactured from a silicon disk approximately 200 mm thick with a P doping concentration of 2.1 and 3 arc-3 (7000 mm).

From one side, a P-shaped portion and an N-domain region approximately 70 mm deep are diffused. From the other side, 4.1 and 63-3
An N layer of approximately 30 ridges thick is formed epitaxially with a doping of . Continuing to this N layer, a P-shaped portion is diffused. Gold is 6.1 and 3 in all samples.
3, resulting in a lifetime of 0.7 French seconds. Regions 1, 2 of the thyristor in Fig. 3,
3a, 3b, and 4 are the P ten layer, N layer, P- layer, and P layer in this case.
Corresponding in the order of layers and N+ layers.

At a forward voltage of 200y the blocking layer extends through the entire P-layer.

As the forward voltage further increases, this blocking layer further expands to 20 degrees in the next P layer 3b. The maximum forward blocking voltage is 2200V. The breakdown voltages of the PW junction and the PN ten junction (J and J3) are 20V and 35V as in the above example. The minimum forward voltage for breakover firing is then 30V. This reduction is achieved by making the blocking layer of the PN junction J2 wider due to the lower doping. The maximum reverse current density at a forward voltage of 2200V and an operating temperature of 37V is then 5
5 A/Suddenly.

The conductivity of the N layer 2 with a thickness of loAm is the same as that of the P layer 2 in the above example.
almost three times higher than in

Therefore, the cathode strip width b is expanded approximately three times so that b=3.3 at this time. There is a turn-off time of approximately 3 Asec for the syringe switch in this embodiment.

The operating data of the thyristor of this embodiment is as follows.

Periodic peak cutoff voltage: 1500V Continuous limit current: 100A Critical voltage rise rate 200 Normal critical current rise Total 20 Normal switch frequency: 3 Hz Gate potential at time of cutoff: -10V and potential at time of ignition is 0 It is.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a switching circuit with a circuit configured as an inverter for generating high frequencies;
The figures are voltage and current waveform diagrams of the switching circuit in Figure 1, Figure 3 is a schematic cross-sectional view of the circuit's forward-blocking PN junction positive bevel thyristor taken along line S-S in Figure 4, and 4 is a schematic plan view of the gate side of the thyristor of FIG. 3; FIG. 5 is a graph showing the doping progress for a thyristor having an N-doped base region;
FIG. 6 is a graph showing the doping profile for a thyristor with a P-doped base region. 1, 4... emitter region, 2... gate region, 5, 7... main electrode, 6... gate electrode. FIG. IFIG. 2 FIG. 3 FIG・muFIG. 5 FIG. 6

Claims (1)

[Claims] 1 an emitter region and a gate in the form of a notched emitter-gate structure, a gate region in contact with the gate, and a base region that is lower doped than the gate region and the anode region; the region has no short circuit to an electrode contact-connected to the emitter region bridging a PN junction between the gate region and the emitter region, and the base layer consists of a first and a second layer. using at least one thyristor, the first layer adjacent to the gate region and doped lower than the second layer, supplying an alternating current to a thyristor of the type with a frequency higher than 10 KHz and a voltage higher than 500V; a load and at least one thyristor connected in series with the load using biasing means for selectively firing the thyristor and a gating circuit for applying a predetermined potential to the thyristor for selectively firing the thyristor. A method of operating a thyristor circuit comprising: said biasing means being provided between an emitter region and an anode region of said at least one thyristor; and an adjacent emitter region such that the PN junction between the thyristor and the adjacent emitter region is polarized in the blocking direction, and the biasing means generates a leakage current in the forward blocking condition and biases the thyristor during a positive load current period. Using the leakage current and the potential of the gate,
The potential of the gate during the forward blocking period is ignited by setting it to a value between a value of opposite polarity and zero or by opening the gate circuit, and the alternating current is at its negative polarity. A method of operating a thyristor circuit, characterized in that the potential of the gate is set again to its previous value after a load current period has started.