JPS6016086A - Color demodulating circuit for color television - Google Patents

Abstract

PURPOSE:To reduce the number of a circuit element by devising the control of a clock generating circuit so as to demodulate two axes by a single demodulating circuit. CONSTITUTION:The input control for a multiplier input data to a multiplication circuit 4 and for data registers 11, 12 is conducted in the same timing. Further, when the output signals from the data registers 11, 12 are outputted in the same timing where both R-Y and B-Y color difference signal data are arranged, an output phase error between the R-Y and B-Y color difference signals is eliminated apparently.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a color demodulation circuit for color television signals.

Conventionally, a color demodulation circuit for a color television (hereinafter abbreviated as OTV) signal obtains a color difference signal as a demodulated output from a carrier color signal and a color subcarrier through analog processing. Recently, the processing of analog signals using digital methods has progressed.
It became possible to digitize the signal color demodulation circuit. An object of the present invention is to propose an optimal circuit for a digitized color demodulation circuit.

FIG. 1 shows a block diagram of a conventional color demodulation circuit using analog processing, and its operation will be briefly described below. In the figure, 1 is a color subcarrier generation circuit, 2 is a phase shift circuit ■, 3 is a phase shift circuit ■, 4 is a color demodulation circuit ■, 5 is a color demodulation circuit ■, and 6 is a matrix circuit. Terminal α is the burst input terminal, b is the carrier color signal input terminal, C is the R-Y color difference signal output terminal, d is the B-Y color difference signal output terminal, and e is the G-Y color difference signal output terminal. When a burst signal is applied to terminal α, the one-color subcarrier generation circuit generates a color subcarrier (N
In the Tso method, approximately &58MHz') is used for adult cows. The signal becomes the input of phase shift circuits ■ and ■, and phase shift circuit 1
Now, the phase shift circuit 2 is phase-advanced by 90 degrees with respect to the color subcarrier.
Now, create a reference signal with a 180° phase advance. These signals are the demodulation axis of R-Y and the demodulation axis of B-Y, respectively, and become input signals to color demodulation circuits 4 and 5, respectively. On the other hand, the color demodulation circuits 4 and 5 are input with carrier color signals through terminals, and color difference signals R-Y and B-Y are input according to the respective demodulation axes.
is output. The process is shown in a formula. Now, let the carrier color signal be the following equation (1), and let the R-Y demodulation axis be the equation (2),
The demodulation axis of B-Y is expressed as equation (3).

ER-BY XcasWt””X sin Wt
-= (1) KI K2 fish wt (2) sin w t - (8) In equation (1), 1 is the red signal amplitude compression ratio and usually takes 1.14. K2 is a green signal amplitude compression ratio and usually takes a value of 2.03.

W is the angular frequency of the color subcarrier.

The color difference signal RY is demodulated using the following equation.

= ” (”' ” + ”” cosZwt+” ”
5in2u+t)2 KI KI K2 Here, when the high-frequency component is attenuated by a low-pass filter, it becomes 1 1itR-BY K1, which is equivalent to 1/2 the amplitude of the color difference signal RY.

To obtain the color difference signal B - Y, C08wt in equation (4)
DB-B in the same way by applying 5inu+t instead of
Obtain Y 2 K2. This is equivalent to 1/2 the amplitude of the color difference signal B-Y.

From the R -Y and B -Y color difference signals obtained in this manner, the G -
Y=-(0,51(It-Y)+(Li2(B-y))
(6) The above is a two-axis type color demodulation circuit, and in short, demodulation is performed by performing multiplication on each axis. The present invention is characterized in that two-axis demodulation is performed using a single demodulation circuit.

FIG. 2 shows a color demodulation circuit according to the present invention.

In the figure, 1' is a color subcarrier generation circuit, 2' is a multiplier table, 4' is a multiplication circuit, 6' is a matrix circuit, 11 is a data register, and 12 is a data register. ■, and 13 is a D/A conversion circuit■
, 14 is the D/h conversion circuit ■, and 15 is the A
/ is a D conversion circuit, and -16 is a clock generation circuit. Terminal α' is the burst input terminal, b' is the carrier color signal input terminal, C' is the R-Y color difference signal output terminal, and dl is the B
-Y color difference signal output terminal, / represents the G -Y color difference signal output terminal. Note that circuits and terminals that have the same functions as conventional circuits are identified by the same symbols and a dash.

When a burst signal is applied to the input terminal α', a color H transmitted wave having the same phase as the burst is generated in the color subcarrier generating circuit 1'. The color subcarrier is routed to a 16 clock generation circuit. In synchronization with the color subcarrier, the clock generation circuit 16 divides the -period into a certain time, and calculates the amplitude data of the R-Y and B-Y demodulation axes corresponding to the time by using the 2' multiplier table as the first R- Y data, then B -Y
Control the output of data. In the conventional method, the color subcarrier is phase-shifted by 90° or 180° to obtain the signal that should be the reference for the demodulation axis, but originally, the signal that should be the reference for the demodulation axis and the color subcarrier are phase-shifted. Since the signals differ only in information, the signal to be used as the reference for the demodulation axis can be uniquely determined based on the phase of the color subcarrier. Considering this point, the color subcarrier can be time-divided and the corresponding demodulation axis data can be determined, and the demodulation axis data shown in equations (2) and (8) above can be used as a multiplier table, for example. ROM (R81L(l 0n1y Memory
) etc. FIG. 3 shows the phase relationship between the color subcarrier and the two axes RY and BY. Since the phase relationship shown in this figure is always constant, for example, the data on the two axes at the time of the hour can be determined as -i. Although the waveform is shown as a sine wave in the figure, it may be a rectangular wave in practice.

Now, the two-axis data of the color subcarrier at a certain time becomes one input of the 4' multiplier circuit. The other input of the 4′ multiplier circuit is
The carrier chrominance signal input to terminal b' is A/D converted data at the same timing as the time-divided chrominance subcarrier from the 16 clock generation circuit. The 4' multiplication circuit digitally multiplies the data. As for the results, the multiplication results regarding the R-ymm fine axis are stored in the 11th data register, and the multiplication results regarding the B-Y axis are stored in the 12th data register. The control is performed by a 16-clock generating circuit so that the RY data is stored first, and then the B-Y data is stored in this order.

Then, data is simultaneously input to the D/A circuit from data registers ■ and ■ using clocks of the same phase.
After D/A conversion, it becomes an analog signal. Demodulation output R-
Y and B Y become inputs to the 6' matrix circuit, and G Y color difference signal outputs are generated by the same means as in the conventional system.

The feature of the present invention is that the 4' multiplication circuit shown in FIG. 2 requires only one circuit, whereas in FIG. This is possible by controlling the multiplier input data to the multiplier circuit and the input to the data register at the same timing. Also, the output signals from the data register are RY and B-Y
At the timing when both color difference signal data are complete,
If they are output at the same timing, there will be no apparent output phase error between the R-Y and B-Y color difference signals.

In this way, by devising control in the clock generation circuit, only one multiplication circuit is required, making it possible to reduce the number of circuit elements.

[Brief explanation of the drawing]

Figure 1 is a conventional color demodulation circuit diagram, where 1 is a color subcarrier generation circuit, 2 is a phase shift circuit, 3 is a phase shift circuit, 4 is a color demodulation circuit, and 5 is a color demodulation circuit.
6 is a color demodulation circuit, 6 is a matrix circuit, terminal α is a burst input terminal, terminal is a carrier color signal input terminal, terminals c, d,
g represents R-Y, B-Y, and G-Y color difference signal output terminals, respectively. FIG. 2 is a color demodulation circuit diagram of the present invention, in which 1' is a color subcarrier generation circuit, 2' is a multiplier table, 4' is a multiplication circuit, 6' is a matrix circuit, 11 is a data register, and 12 is a data register. 2.13 is a D/A conversion circuit 1.14 is a D/MU conversion circuit 2.15 is an A/D conversion circuit, 16 is a clock generation circuit, terminal α' is a burst input terminal, and b' is a carrier color signal input terminal. 1. / , d/ , , / are respectively RY,
B-Y. G-Y color difference signal output terminal is shown. FIG. 3 is a diagram showing the phase relationship between color subcarriers and the RY and BY demodulation axes. Applicant Suwa Seikosha Co., Ltd. Agent Patent Attorney Mogami Mujiku 3 Figure 6' 502-

Claims (1)

[Claims] In the color demodulation circuit of a color television receiver, R-
Same demodulation circuit (multiplying circuit) for Y-axis and B-Y-axis color demodulation
A color demodulation circuit for a color television, characterized in that data is stored in subsequent data registers in a time-division manner, and output from the data registers is performed at the same timing.