JPS60147711A - Auto-focus device - Google Patents

Abstract

PURPOSE:To use a clock signal line as a transfer line of a lens driving indication signal by applying the lens driving indication signal to a clock terminal when it is detected that a digital value of a lens driving quantity operated on a basis of a distance measured output is transferred through a data terminal. CONSTITUTION:Distance measured data from a light receiving part is outputted in time series and is inputted to a CPU through an AD converter. The CPU operates the lens driving quantity as a digital value, and the operated driving quantity is outputted to a signal transmitting circuit CMC from output ports PA0-PA3 and is transferred to a lens driving circuit LP in serial by clocks of a clock generator CG2. The end of this data transfer is detected by a counter CNT2, and the lens driving indication signal is applied to an input port PB7 of the CPU through a clock signal line CLOCK to inhibit the distance measuring operation. When lens driving is terminated, the counter CNT2 is reset, and the lens driving indication signal disappears. Thus, the signal line CLOCK is used for transfer of the lens driving indication signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is an automatic camera comprising a camera having a distance measurement function via a TTL optical system, and a lens equipped with a lens drive circuit that drives the lens based on lens drive amount information from the camera. This invention relates to a focus device.

In the above type of system, since the distance measurement information while the lens is being driven does not represent an accurate distance measurement value, it is necessary to prohibit the distance measurement operation while the lens is being driven. Therefore, the connection terminal between the camera and lens in the above type of system includes a data line for transmitting the amount of lens drive to the lens side, and a line for transmitting the signal indicating that the lens is being driven to the camera. I need.

Furthermore, in the case where the lens driving amount data is transferred as a digital value, the data line has many pits, so a serial transfer method is used, but in this case,
Because of serial transfer, it is necessary to send a synchronization PC in addition to data from the camera to the lens, which requires at least the three lines mentioned above, which has the disadvantage of increasing the number of connection points between the lens and camera. The present invention has been made in view of this point, and solves the above problem by transmitting the signal indicating that the lens is being driven to the camera side via the line that sends out the clock, thereby making the line dual-purpose. This is what I did.

The present invention has a configuration to achieve the above-mentioned object, in particular, calculates a lens driving amount in a distance measuring operation, sends a signal representing the lens driving amount to the lens to drive the lens, and also performs lens driving while driving the lens. An autofocus device that transmits a lens drive signal to the camera and prohibits distance measurement operation while the lens is driving includes an arithmetic circuit that calculates the lens drive amount as a digital value based on the distance measurement circuit output, and a A lens drive circuit that provides a data terminal for serially transmitting a digital value and a clock terminal for transmitting a click pulse for serially transmitting the digital value, and drives the lens based on the digital value. Then, it detects the end of transfer of the digital value input through the data terminal and applies a lens driving signal to the clock terminal, and also detects the end of lens driving based on the digital value and outputs the lens driving signal. A signal forming circuit for eliminating the light is provided on the lens side.

Next, an autofocus device according to the present invention will be explained.

The first is a principle diagram showing an example of a distance detection method employed in a camera to which a transmission device according to the present invention is applied.

In the figure, reference numeral 1 denotes a subject, and an image from the subject is formed on a film surface 3 via a photographing lens 2. The image is formed as a secondary image via a secondary optical system 4 on two line sensors CR and CF formed of COD or the like.

The above-mentioned seven circuits C is a part of the standard A as shown in Fig. 1(b). -A, consists of 04 sense parts, CF is B O
It consists of 18 sense sections, NB 1G and B-1 to B. In the above (d-format), the subject image is secondaryly formed at a predetermined position on each sensor CF according to the image formation state.For example, when the subject is in focus state N1ff in front of the focus, 5
(See Figure 1(b)(C)) Sense parts B2 to E
When the image is focused on the Sta side, and conversely in the so-called rear bin state, the sense parts B, ~, as shown in 7 (see Fig. 1 (b) (C)).
When the image is focused on the horse side and in focus, it is 6 (Fig. 1 (
b) Sense part B as shown in (C)). ps-B, imaged on. Therefore, the thread condition (distance value) to the sensor position
will be detected and attached.

The distance detection method described above is well known, and the present invention is not directed to the distance detection operation itself, and any type may be used, so the description of the distance detection method will be limited to the above.

FIG. 2 is a block diagram showing an embodiment of a camera and lens to which a transmission device according to the present invention is applied.

In the figure! indicates the camera side, and I indicates the lens side.

The CCDP on the camera side ■ is the above-mentioned sensors CB and C.
This is a light receiving section provided with a sensor AC for detecting brightness for measuring the average amount of light incident on F and each sensor section.

The light receiving section is driven in a known manner by a clocked taber DR that forms two-phase clocks jl, , Jil+ and a reset clock pR based on the clock from the p-clock generator CG1. C1 is a capacitor charged by the output of the sensor AC, CP
, is a comparison circuit that compares the charge amount of the capacitor with the reference voltage Mop and generates a comparison output (high level) when the output of the capacitor CP reaches the voltage Vat, ON,
is a one-shot circuit that outputs the transfer pulse T with the above comparison output, and the pulse jlLrr causes the light receiving unit CCDP
The photocharges accumulated in each sensing portion of the strawberry sensor C and CP are transferred to the analog shift register of the sensor to complete the accumulation operation, and the photocharges transferred to the analog shift register are transferred to the pulses 911, 0. is output in chronological order.

AD is an A-D conversion circuit for sequentially converting the accumulated charge of each sense section output in time series from the light receiving section CCDP into a 4-bit digital value.

The CPU is a central processing unit for performing arithmetic processing and sequence control of each operation, which will be described later. A reset terminal RES of the CPU is connected to a switch SW that is turned on by the first step operation of the release operation member. A normal high level (hereinafter referred to as level) is applied to the reset terminals 1 (18), and the program counter of the CPU is set to zero, specifying the start step described later.Also, a low level is applied to the reset terminal. (
Hereinafter referred to as L level. ) is input, the program (described later) is executed from the start step.

For No, an H level signal opens the integration clear gate of the sensor of the light receiving section to clear the accumulated charge, turns on the transistor 'IB, resets the capacitor 〇, and furthermore, an L level signal opens the above transistor Tr is turned off and capacitor C
This is a terminal that outputs a signal for controlling the storage operation to start the charging of 0 and also to start the photocharge storage operation by each centuary.

D0 to D are input terminals connected to the output end of the A/D conversion circuit AD and inputting a digital value corresponding to the A/D converted charge accumulated in each sense section. PAo-PA is an output port that outputs calculated values, etc., which will be described later, PBoNPB is an input port that inputs name data, which will be described later, and PC is a display W.
This is a terminal for transmitting focal state information such as the driving direction of the lens to the DISP.

CMC is the output capo of the CPU) PAoNPA.

This is a signal transmission circuit for connecting PB0 to PBγ and a lens drive circuit LP provided on the lens side, which will be described later.

The lens drive circuit LP is provided on the lens side (2) to drive the motor M based on the distance value and direction signal sent from the camera 2 side, and the distance value of the lens is driven in conjunction with the motor M to reach the distance value. Automatic distance adjustment is performed based on this.

Figure 3 shows the signal transmission circuit CMC and lens drive circuit L.
FIG. 2 is a circuit diagram showing an example of P.

In the signal transmission circuit CMC of FIG. 3, CG.

is the clock generator, and CN'r is the above CG.

It is a binary counter that counts the rising signal of the four clock pulses, and its output terminal (4, is the OR gate G
, and the inner pull terminal 18.
Connected to NABLFJ. The other input terminal of the OR gate G3 is connected to the generator CG. In the above configuration, from or gate G, counter Q
, until the H level is sent out, the generator CG,
A clock pulse is sent out, and thereafter an H level signal is sent out. The pulse from the gate G is transmitted to the lens drive circuit via the open collector buffer G4 and the terminal connecting the lens side and the camera side. is a data selector, which connects the control terminals A'' and B to the output terminals Q+ and Q2h of the counter, and when the inputs of the control terminals A and B are both at L level, the data at the input terminal is When A=H level and B=L level, input the data at the input terminal, when A-=L level, B==i (level), input the data at input terminal D2, and when both A and B are at H level, input the data at the input terminal. The data at the end D3 is sent out from the output end Y.As mentioned above, the counter CNT is a binary counter, so with the above configuration, the CPU output counter PAo
Data from the NPAs is output from PAo to FA in the order of synchronization with the clock. Output capo) PA0
~PA is an output port that outputs a signal representing the amount of lens drive to the in-focus point, and FA.

is an output port that outputs a signal representing the driving direction.

G is the output Q of the counter CN, whose input is the above-mentioned counter CN.

and a buffer (an AND gate connected to 14, the output of which is connected to the CPU's capacitor) PI37 via an inverter G6. It(E gate G.

is the lens driving signal (hereinafter referred to as JSY f) as described later.
It is called t4. ) above) PI3. It is intended to convey to the

SH1 is a shift register that inputs and shifts serial data (zoom ratio information and lens type information) from terminal r>h'rhlN as described later in synchronization with the falling signal of the nose signal from the gate G3. be. The output Q of the register Sll. -Q, are connected to C, L'U input ports (PB0 to PB3) for inputting the zoom ratio information.

G2 is the output terminal Q of the register 8H. This is an AND gate whose input terminal is connected to ~Q3, and this gate detects whether or not the lens attached to the camera is a normal manual lens.

G1 is the output of the register SH, Q1:5 Qo~Q
, the input end of which is connected to the Noah gate, which detects whether the lens attached to the camera is a lens that includes a distance measuring circuit and has a function of automatically adjusting the distance to the lens itself.

In the lens drive circuit LP, CN'l' is a binary counter that counts in synchronization with the rising edge signal of the clock sent via the buffer G4. The output terminals Q, , Q of the counter CNT2 are connected to the input terminal AB of the data selector DS2, and the selector DS2, like the selector DS1, is connected to the input terminal in synchronization with the counting operation of the counter. - Signal input to D3. -D3 are sequentially sent out from the output terminal Y.

ZP is displaced according to the setting state of the zoom ratio, and is the input end of the selector DS. , D, and the terminals zM1 to ZM3
This is a zoom plate made of a conductor that comes into contact with a predetermined position of the zoom plate. Zoom ratio information is input using the information from the plate, and the amount of lens drive is corrected in accordance with the zoom ratio information.

Further, the output terminal Q3 of the counter CNT is inputted to the inverting oven collector gate G1. The output of is connected to the clock inputs CI, K of the counter CNT.

8H, input terminal S:N is data outline DATA
This is a shift register connected to the output terminal Y of the selector 1)S through OUT. The clock terminal CLK of the register is connected to the buffer G4 via the line CLOK, and input information is shifted in synchronization with the falling signal of the clock input via the buffer.

Further, the G terminal is a control terminal for inhibiting subsequent shift operations when an H level is input.

LTl is composed of D-type 7 ribflops.

A latch circuit for latching the driving direction signal, and the clock terminal CK of this circuit is the Q of the counter CNT.

It is connected to the output terminal, and an H level signal from the terminal latches the output signal of the output terminal Q3 of the shift register. OPl is an operational amplifier for amplifying the output of the latch circuit, and the signal amplified by the amplifier is sent to the switch 8Wm.
The direction signal is inputted to the motor forward/reverse control circuit MD via the motor forward/reverse rotation control circuit MD, and the motor M is rotated forward/reverse based on the direction signal latched by the latch circuit.

DEC has its input terminals D0 to D2 as the output terminal Q of the register. -Q, is a down counter connected to Q. The down counter inputs the input signal by a rising signal to the terminal LOAD, counts down the input clock to the clock terminal CLK, and when the count value becomes zero, outputs an H level signal from the terminal DT≦0. Output. The terminal DT≦0 is connected via an inverter G to the other input terminal of an AND gate G0, which has one input terminal connected to the output terminal Q of the counter CNT, and the gate G,
When the output is at H level, the switch SWm is turned on. FP is a contact plate that is slid by the contact piece BR in conjunction with the motor M, and a number of pulses corresponding to the motor drive it are generated by turning on and off the plate and the contact piece. The autofocus operation by the applied camera and lens system will be explained using the flowchart shown in FIG. 4 and the waveform diagram shown in FIG. 5.

It is now assumed that power is being supplied to the circuits in the camera and lens, and the first stroke of the release button of the camera is performed. This causes the CPU to execute the program from 'tTART. Note that when the input to the terminal RES is at H level, the CPU resets the program counter to zero and holds the program steps at 8TAB,T.

When the first stroke operation is performed as described above, switch SW1 is turned on and the input to terminal Rg8 of the CPU becomes L level, so the holding of the 5TART step is released and the program moves to the next step PUC. . In this step, the CPU sends out a negative pulse from the output port PA and sends the negative pulse to the lens drive circuit LP through the PUC terminal of the contact of the mount, thereby performing initial setting of the lens drive circuit. At this point K, the counter CNT shifts to its initial state. After this, the CPU moves to the next dummy communication data setting step. In this step, CP
U outputs all L level signals to output ports PA0 to PA. Data 5 output from PA as described above
IGN is data indicating the direction in which the lens is driven, PAoNPA, color output signal VAL
0~VAL.

is data representing the driving amount. After this data setting step is performed, the step moves to a communication routine call step. In this step, a communication routine to be described later is read, and information on the lens side is read without driving the lens using the dummy communication data.

In the communication routine, first, the output port P of CP and U
A clear pulse, CL (FIG. 5), is output from A, and the counter CNT1 is reset. As a result, the input to the ENABLE terminal of the counter CNT becomes L level, so that the counter is connected to the clock pulse generator CG.
, counts the pulses from , and outputs Q, , Q, ,
Q is changed as shown in the fifth diagram. The outputs Q, , Q, of the above counter are input to the input terminals A, H of the data selector DS1, and the selector D8□ changes the time according to the output change (binary change) of the terminals Q, , Q, of the counter. CPU output sequentially in series) PA0 to PA
, is sent out from the output terminal Y.

Further, the clock pulses from the i-clock pulse generator CG are inputted to the shift register 8H□ via the gate G, and the clock pulses are inputted to the counter C via the open collector buffer G4 and the mount contact.
NT and shift register 8H.

Therefore, the data of the CPU output ports FA, PA, sent in time series from the selector DS1 is transferred to the shift register SH. Also, counter CN
Data selector DS2 by counting operation by T.
The data at the input terminals D0 to D3 are transmitted in time series from the output terminal Y to the shift registers 81-1. through the transmission line DATAIN. The data applied to the input terminal of the data selector is transferred to the shift register S1 (,).

In the process of data transfer as described above, when an H level is output from the output terminal Q3 of the counter CN'I', the H level is input to the 1iiNABLE terminal of the counter, so that the above 1 transfer is performed. When the count ends (point 54 in FIG. 5), the counter CNT1 stops counting. Further, the Q3 output of the counter CNT is transmitted as an EOC signal to the input port FB of the CPU, and the CPU inputs the input information of the input ports PB, -PB.

Furthermore, when the data transfer is completed as described above, the Q3 output of the counter CN'l' is also at the H level as shown in FIG. 5, so the output of the inverting open collector gate G1 is also at the L level. Therefore, one input signal of AND gate G becomes H level via inverter G.

The other input of the AND gate GI+ sends out the H level of the counter, and transmits it to the input port PB of the CPU. □ Also, when the Q output of the counter CNT becomes H level, the latch circuit LT latches the Q output information of the shift register 8H2 in response. At this time, the Q3 output of the counter ON'r2 is also transmitted to the l, OA, l) terminals of the counter 11]C, so that the counter DEC is in a loaded state and the shift register Q is loaded. −
Set Qt information.

As mentioned above, C in the dummy communication signal data set step.
Since the data output from PU (output capo) PAo-PA is at the L level, all data transferred to the shift register SO in the data transfer described above is at the L level.

Therefore, in the above operation, the counter DI(C, also corresponds to L)
Level data is loaded. Since the counter sends out the H level from the terminal DT≦0 when the count value is (≦0), the output of the inverter G becomes the L level, and the gate G also outputs the L level. Therefore, the switch SWm remains off, and the motor drive circuit MD remains inactive. Also, the one-shot circuit ON is triggered in response to the H level from the DT≦0 terminal of the counter and generates a negative pulse, and this negative pulse is transmitted to the counter CNT and 0CLR terminal via the gate G7, and the counter cNT2 is will be reset. When the counter CNT is set, an L level is sent from the output terminal Q3, and the CLOCK terminal becomes an H level.
The L level is transmitted to AND gate G via G6.

Therefore, G sends out the L level, and the above BUOY
All 4 signals are on.

In this way, in the communication signal routine after the dummy communication data set step, only the operation of inputting the information (input capo) PBo to PB to the CPU is performed, and then the process moves to the return step, the communication routine ends, and the next step is performed. Move to direction display off step. In this step, CP
A prohibition signal for prohibiting the operation of the display device DISP is sent from the PC board of U, and the display device DISP is made inactive.

After this, the program moves to the BUOY step. In this step, it is detected whether the input to the CPU's input port PB is at the H level or not, and the input port PB is detected as being at the H level.
As long as the input of 1 is at H level, the state is maintained and the port P
j3? This is a waiting step in which the next step is made when the input of the step shifts to the L level.

As mentioned above, the J3USY signal is at the L level at this point, so the step immediately shifts to the next accumulation clear step. In this step, the CPU N
Outputs level 1-[ from the O port to open the integration clear gate of the light receiving unit CCDP, clearing the accumulated charge in the sensors CH, CF, and turning on the transistor Tr to clear the charge in the capacitor 〇. After this, the step moves to an accumulation start step. In this step, the signal from the NO port of the CPU is set to the L level and the sensor CR is activated.

The charge storage operation by CF is started and the transistor is turned off. As a result, each sensor accumulates an image signal according to the imaging state, and the capacitor C1 is charged by the output of the sensor AC that measures the average amount of light of the front claw that enters each sensor.

In the process in which the image signal is accumulated in the sensor in this way, when the charge level of the capacitor CI exceeds the reference level ■OP, an H level is sent from the comparator CP□, and in response to this H level, one shot The circuit ON1 creates a.

This one-shot circuit is ON, and the pulse from the CPU is 0.
The CPU senses the pulse and moves to the next data store step. Also, the above one-shot circuit is ON.

The pulse from
The photo charges accumulated in the sensor are transferred to the analyzer shift register of the sensor, and the charges accumulated in each sense section of each sensor are transferred to the pulse X1. It is sent out from the light receiving unit in chronological order at ^.

When you move to the data store step as above,
In this step, the CPU sequentially stores the input data to the data boats D0 to D in the internal memory. As mentioned above, each sense part (A (1 to A
3. B. Since the photocharges accumulated in A to B-7) are sequentially sent out to each sense unit and input to the converters A and B-7), the data storage step is performed by the data ports A and B-7). −D3 is the imaging optical signal of each sense part A
The D-converted digital values are transmitted to each sense section in chronological order and are sequentially stored in internal memory.

After the data storage step is performed in this manner, the process moves to the next direction detection calculation step.

In this step, an autofocus direction detection calculation is performed based on the individual information (digital value according to the amount of charge of the imaging light) of each sensing section 13-7 to A of the sensor stored in the internal memory. is executed.

This calculation uses the scratch image detection method described in FIG.
The digital value of each accumulated charge of B-, is expressed by the same symbol As-B
-7. ) is performed. The sign of the calculated value in equation (1) represents the direction to the in-focus point (front bin, back bin), and the direction to the in-focus point is detected by this calculation. Note that this calculation itself is not directly related to the present invention, so its explanation will be omitted.

After this, the step moves to F EXTX desp 5.

In this step, the CPU uses the communication routine described above.
By detecting the information input to PB, it is determined whether the lens attached to the camera is an autofocus function lens which itself has a distance measurement function.

In the autofocus function lens used in the present invention, as shown in FIG. 6(a), the contacts for the camera contacts PUC, CLOCK, and DATAOUT are open, and the camera contacts G are open.
The contacts connected to ND and DATAIN are in a short-circuited state. Therefore, when the autofocus lens is attached, the shift register SH is set in the communication routine.

All the data transferred to is at L level, so an H level signal is sent from gate G1 and input to this I (level is human capo) PB4.

In this communication routine, the H level input to the CPU via PB4 is detected in this step.

Now, assuming that a lens with an autofocus function is attached as described above, the above H level is detected,
The step moves to the above-mentioned accumulation clearing step, and thereafter the steps from the accumulation clearing step to the FEXT step are repeatedly executed. Therefore, if the attached lens has an autofocus function, distance measurement and autofocus operations are performed by the lens itself, and the camera side does not perform autofocus operations or display directions at all. Become.

Further, if the attached lens is other than a lens having an autofocus function, the H level is not detected in the FEXT step, and the step shifts to the next direction display step.

When facing this direction display terrace, a signal representing the direction toward the in-focus point described in the direction detection calculation step is transmitted to the display DISP to indicate the in-focus direction.

In this way, when the lens does not have an autofocus function, the focusing direction is instructed on the display DISP, and then the step shifts to the FMAN step.

This step is a step for detecting whether or not the attached lens is a normal lens.

In this step, the CPU uses the communication routine described above.
It detects whether the data input to the input port FB is at H level or not, and identifies whether the attached lens is a normal lens or not. That is, as shown in FIG. 6(b), a normal lens does not have any contacts to be connected to the contacts of the camera, so all of the lenses are in an open state. Therefore, in the above communication routine, shift register 8
All data transmitted by H and Ic is at H level,
In the above communication routine, the H level from gate G is CP
UQ entry capo) PI3. is being entered. Therefore, in the above F MAN step, by detecting the level, it is determined that the attached lens is a normal lens.
In this case, the step returns to the accumulation clearing step, and thereafter the operations from the accumulation clearing step to the F MAN step are repeatedly executed, and the focusing direction is repeatedly calculated and the direction is displayed. The photographer can manually adjust the distance by operating the photographic lens in a direction according to the focusing direction instruction.

In addition, if the attached lens is a dedicated lens shown in Figure 3 that automatically performs focusing operations based on signals from the camera, H level detection is not performed by the above F VAN step, and the step is as follows. Proceed to the predict calculation step. In this step, the digital values corresponding to the individual accumulated charges of the sense units and ~B-7 stored in the internal memory of the CPU in the data store step described above are stored in the following well-known manner. The predict amount calculation formula is used to calculate the shift amount to the in-focus point.

The amount of shift until focusing corresponds to the value of i that minimizes equation (2), and this equation is used to calculate the shift (shift)ffl, but the above method for calculating the amount of shift itself is not known. However, since it is not directly related to the present invention, its explanation will be omitted. After this, the step shifts to a ZOOM correction step.

In this step, the shift amount calculated in the predict calculation step is corrected according to the zoom position of the lens, so that accurate focusing is always performed regardless of the zoom state.

Generally, in a zoom lens with a front lens focus, the sensitivity differs depending on the zoom position, and even if the lens is driven by the same amount of drive, the amount of image plane movement cannot be made constant. On the other hand, since the shift wind calculated in the predict calculation step is the amount of movement of the image plane, the zoom position must be taken into account when determining the amount of lens drive corresponding to the amount of movement of the image plane.

Therefore, in this step, the CPU
Based on the data input to PIIoNPB, the shift amount calculated in the predict calculation step, that is, the image plane movement amount is corrected.

That is, in the above communication routine, the input port PB of the CPU is
, NPB, has seven data DS.

input. -D, the application data is input.

The input end of this selector Da. ID1 has input ends, , D, and ZM depending on the zoom ratio of the lens.

A zoom plate is provided which connects to a predetermined position of ~ZM, so that in the above communication routine (0,1) depending on the zoom ratio of the lens.

Either (0,0) or (1,0) zoom information is CP
It is input to input terminals PB0 to PB1 of U.

In this step, when this zoom 1 # information is (0, 1), the divisor is 1, when it is (0, 0), the divisor is 1.5, and when it is (1, 0), it is the divisor 2, which is calculated in the above predict calculation step. Divide the shift lid by the above divisor to calculate the actual lens drive amount from the amount of movement in one image plane. After this, the step moves to a predict communication data set step.

In this step, the corresponding output port PA of the CPU.

A signal representing the lens driving amount determined in the above steps is sent from PA to PA, and a signal representing the driving direction of the lens toward the in-focus point is output from the output port PA3.

The step then moves to a communication routine call step, where the above-described communication routine is executed again.

This communication routine rC is as described above. The data at the output port PAoNPA3 of the CPU is transferred to the shift register 88. latch circuit LT and counter DE
C, and the zoom play above 1), Z
P zoom ratio information is input to the CPU) PB0 to PB
, is input.

Further, when the above transfer is completed, the gate G outputs an H level as a BUSY signal.

Furthermore, as mentioned above, since the data of the output capo) PAoNPA represents the lens drive n, the counter DE
When the lens drive set signal is transferred to C, the output terminal DT≦
The L level is sent from the gate 0, and the H level is transmitted to one input terminal of the gate 0 via the inverter 08. This gate G.

The other input terminal of the counter CNT is connected to the output terminal Q of the counter CNT, and as mentioned above, the output terminal Q sends out the level I at the end of the data transfer, so that the above data transfer is completed. When the process is completed, an H level signal is sent from the gate G, the switch SWm is turned on, and the motor drive circuit M1) is activated.

In addition, data from the CPU's output port (PA) is transferred to the output end Q of the shift register SH2 in the above transfer, and since this data indicates the driving direction of the lens as described above, the latch is The lens drive direction signal is latched in the circuit LT at the time when the transfer of the above data is completed, and the lens drive direction signal is transmitted to the motor drive circuit MP via the amplifier OF1, and the motor moves in the instructed direction. Drive helen k.

The contact piece BR moves in conjunction with the lens drive)F
P, the number of pulses corresponding to the lens drive amount is input to the counter DEC, and the counter counts down the input pulses from the set lens drive amount signal, and the content of the counter becomes zero. DT when reached
Sends H level from ≦0. Due to this H level, an L level is generated from the gate Gll, the motor drive circuit MD becomes inactive, the lens drive is stopped, and the one-shot circuit ON is triggered, and as described above, the counter CNT is reset. CLOCK terminal has H
When a level is generated, Gi sends out an L level, and the BUSY signal disappears.

In this way, the communication routine is executed, and in this routine, the transfer glue input to the lens via the CLOCK terminal.
The lens driving amount signal is transferred in synchronization with the lock pulse, the lens is driven based on this transferred data, and after the lens moves to the in-focus point, the step shifts to accumulation clear again, and from then on, The operations from the rear step to the communication routine step are repeatedly executed, and an autofocus operation that follows the movement of the subject is executed.

As described above, in the present invention, when the lens is being driven, the BUSY
Since the signal is input to the camera and the distance measuring operation by the light receiving section is prohibited, lens driving based on the imaging information of the light receiving section during lens driving is prohibited, and lens driving based on this information can be prevented, and the above-mentioned BUSY Since the CLOCK terminal is also used as a terminal for sending signals to the camera, the number of connection terminals between the camera and the lens can be reduced to a minimum of four.

[Brief explanation of the drawing]

FIG. 1(a) is a principle diagram showing the distance measurement principle applied to the autofocus device of the present invention, FIG. 1(1))'. (C) is an explanatory diagram thereof, FIG. 2 is a circuit diagram showing an embodiment of an autofocus device according to the present invention, FIG. 3 is a circuit diagram showing main parts in FIG. 2, and FIG. , an explanatory diagram showing 70- for explaining the operation of the circuit shown in the third diagram, and a fifth diagram.
FIG. 6(a) is a waveform diagram for explaining the operation of the circuit shown in FIG. 3. (b) is a circuit diagram showing a connection terminal section when connecting the camera shown in the third figure to a lens other than the dedicated lens. CNT,...Counter G4...
...Oven collector buffer patent applicant Canon Co., Ltd.

Claims (1)

[Claims] The lens driving distance is calculated during the distance measurement operation, and a signal representing the lens driving amount is sent to the lens to drive the lens. Also, when the lens is being driven, a lens driving signal is transmitted to the camera, and a signal representing the lens driving amount is transmitted to the camera. In an autofocus device that prohibits distance measurement operation, an arithmetic circuit that calculates a lens drive amount as a digital value based on an output of the distance measurement circuit, and a data terminal for serially transmitting the digital value from the arithmetic circuit; 2) A lens drive circuit that sends out clock pulses for serial transfer of the digital values and provides a p-tock terminal on the camera, drives the lens based on the digital values, and inputs the data through the 1 terminal. a signal forming circuit that detects the end of transfer of the digital value and applies a lens driving signal to the clock terminal, detects the end of lens driving based on the digital value, and eliminates the lens driving signal; An autofocus device characterized by being installed in.