JPH0123762B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention inputs a signal from a camera, and according to the input signal drives a motor in an auxiliary device to drive a movable member, and also transmits information in the auxiliary device to the camera to operate the camera. The present invention relates to an auxiliary device used in a camera system that controls a camera system. In order to perform communication between the auxiliary device and the camera using the minimum number of terminals in the above camera system, it is conceivable to provide two data terminals and a clock terminal to perform bidirectional serial data communication by clock synchronization.

On the other hand, the data transmitted from the auxiliary device to the camera includes a signal indicating that the movable member is being driven by the motor, and if this signal is transmitted to the camera through the bidirectional serial communication, the driving state cannot be transmitted in real time.

The present invention has been made in view of the above circumstances, and in the accessory device that performs data communication with the camera through the bidirectional communication, a specific level signal is applied to the clock terminal while the movable member is being driven by the motor. The objective is to provide an auxiliary device that transmits the motor drive status to the camera in real time.

FIG. 1 is a principle diagram showing an example of a distance detection method employed in a camera to which an accessory device according to the present invention is attached.

In the figure, reference numeral 1 denotes a subject, and an image from the subject is formed on a film surface 3 via a photographing lens 2. The image is formed as a secondary image via a secondary optical system 4 on two line sensors CR and CF formed of CCD or the like.

The above sensor CR is the reference sensor part in Figure 1b.
It consists of four sense sections A ₀ to _{A 3} as shown in the figure, and the CF is
It consists of 18 sense sections B ₀ to B ₁₀ and B _-1 to B ₇ . With the above configuration, a subject image is secondarily formed at a predetermined position on the sensor CF depending on the imaging state. For example, when the focus is in the so-called front focus state, the sense section as shown in 5 (see Fig. 1 b, c))
When the image is focused on the B ₂ to _{B 10} side, and on the other hand, when the image is in the so-called rear pin state, the sensing section 7 (see Fig. 1 b, c)
Images are formed on the B ₁ to B _-7 side, and when in focus, images are formed on the sense sections B ₀ to B ₃ as shown in 6 (see FIG. 1 b and c). Therefore, by detecting the sensor CF imaging position, it is possible to detect the front or rear focus state (lens driving direction) and the deviation state (distance value) to the in-focus position.

The distance detection method described above is well known, and the present invention is not directed to the distance detection operation itself, and any type may be used, so the description of the distance detection method will be limited to the above.

FIG. 2 is a block diagram showing an embodiment of a camera system using an accessory device according to the present invention.

In the figure, the camera side and the lens side are shown. The CCDP on the camera side is a light receiving section that is provided with the above-mentioned sensors CR and CF as well as a sensor AC for detecting brightness to measure the average amount of light incident on each sensor section. The light receiving section is driven in a known manner by a clock driver CDR which forms two-phase clocks φ ₁ and φ ₂ and a reset clock φ _R based on the clock from the clock generator CG ₁ . C ₁ is a capacitor charged by the output of the sensor AC, CP ₁
is a comparison circuit that compares the charge amount of the capacitor with the reference voltage V _CP and generates a comparison output (high level) when the output of the capacitor CP ₁ reaches the above voltage V _CP , and ON ₁ is transferred by the above comparison output. This is a one-shot circuit that outputs a pulse φ _T. The pulse φ _T transfers the photoelectric charge accumulated in each sense section of the sensors CR and CF of the light receiving section CCDP to the analog shift register of the sensor, and ends the accumulation operation and transfers the photo charges to the analog shift register of the sensor. The photocharges transferred to the shift register are output in time series using the pulses φ ₁ and φ ₂ .

AD is an A/D conversion circuit for sequentially converting the accumulated charge of each sense section, which is output in time series from the light receiving section CCDP, into a 4-bit digital value.

The CPU is a central processing unit for performing arithmetic processing and sequence control of each operation, which will be described later. Reset terminal RES of the CPU
is connected to switch SW ₁ which is turned on by the first step operation of the release operating member. Above reset terminal
Normally, a high level (hereinafter referred to as H level) is applied to RES, the program counter of the CPU is set to zero, and a start step, which will be described later, is specified. Further, when a low level (hereinafter referred to as L level) is input to the reset terminal, the program to be described later is executed from the start step.

NO opens the integration clear gate of the sensor of the light receiving section with the H level signal, clears the accumulated charge, and also opens the transistor TR.
is turned on, the above capacitor _C1 is reset, and the above transistor is turned on with an L level signal.
This is a terminal that outputs a signal for controlling the storage operation to turn off the Tr, start charging the capacitor _C1 , and start the photoelectric charge storage operation by each sensor.

D ₀ to _{D 3} are input terminals connected to the output terminals of the A/D conversion circuit AD and inputting digital values corresponding to the accumulated charge of each A/D converted sense. PA ₀ ～
PA ₅ is an output port that outputs calculated values, etc., which will be described later.
PB ₀ to _{PB 7} are input ports for inputting various data described later, and PC is a terminal for transmitting focal state information such as lens drive direction to the display device DISP.

CMC is the input/output port PA ₀ to _{PA 5} of the CPU,
This is a signal transmission circuit for connecting PB ₀ to PB ₇ and a lens drive circuit LP provided on the lens side, which will be described later.

The lens drive circuit LP is provided on the lens side to drive the motor M based on the distance value and direction signal sent from the camera side, and the distance value of the lens is driven in conjunction with the motor M based on the distance value. Automatic distance adjustment is executed.

FIG. 3 is a circuit diagram showing an embodiment of the signal transmission circuit CMC and lens drive circuit LP.

In the signal transmission circuit CMC shown in Fig. 3, CG ₂ is a clock generator, CNT ₁ is a binary counter that counts the rising signal of the clock pulse from CG ₂ , and its output terminal Q ₃ is one input of OR gate G ₃ . It is connected to the end and also to the enable terminal ENABLE. The other input terminal of the above OR gate G ₃ is connected to the above generator CG ₂
It is connected to the. ORGATE G ₃ with the above configuration
From then on, clock pulses from the generator _CG3 are sent out until an H level signal is sent out from the counter _Q3 , and thereafter an H level signal is sent out. the gate
The pulse from _G3 is transmitted to the lens drive circuit via the open collector buffer _G4 and a terminal connecting the lens side and camera side.

DS ₁ is a data selector, which connects control terminals A and B to the output terminals Q ₁ and Q ₂ of the counter, and when the inputs of the control terminals A and B are both at L level, the input terminals are connected.
When the data of _D0 is A=H level and B=L level, the data of input terminal _D1 is A=L level,
When B=H level, the data of input terminal _D2 is also
When both A and B are at H level, data from input terminal _D3 is sent out from output terminal Y, respectively. As mentioned above, counter CNT ₁ is a binary counter, so in the above configuration, CPU output ports PA ₀ to _{PA 3}
The data from PA ₀ to PA 3 are output in order from PA 0 to PA ₃ in synchronization with the above clock. Output port PA ₀ ~ _{PA 2}
is an output port that outputs a signal representing the amount of lens drive to the in-focus point, and PA ₃ is an output port that outputs a signal representing the driving direction.

G ₅ has its input as the output of counter CN ₁ above Q ₃
and an AND gate connected to buffer G ₄ through inverter G ₆ , and the output of this gate is connected to CPU
Connected to input port PB ₇ . The gate G ₅
is for transmitting a lens driving signal (hereinafter referred to as BUSY signal) to the input port _PB7 , as will be described later.

_SH1 is a shift register that inputs and shifts serial data (zoom ratio information and lens type information) from a terminal DATAIN as described later in synchronization with the falling pulse signal from the gate _G3 . The outputs Q ₀ to _{Q 3} of the register SH ₁ are input ports PB ₀ of the CPU for inputting the above zoom ratio information.
~Connected to PB ₃ .

_G2 is an AND gate whose input terminal is connected to the output terminals _Q0 to _Q3 of the register _SH1 , and this gate detects whether or not the lens attached to the camera is a normal manual lens.

G ₁ is a Noah gate whose input terminal is connected to the output terminals Q ₀ to _{Q 3} of the register SH ₁ , and this gate has a function in which the lens attached to the camera includes a distance measuring circuit and performs automatic distance adjustment operation on a single lens. Detection is performed to determine whether the lens has a

In the lens drive circuit LP, _CNT2 is a binary counter that counts in synchronization with the rising edge signal of the clock sent via the buffer _G4 . The output end Q ₁ of the counter CNT ₂ ,
Q ₂ is connected to the input terminal AB of the data selector DS ₂ , and the selector DS ₂ is connected to the above selector DS _1.
Similarly, in synchronization with the counting operation of the counter, the signals input to the input terminals _D0 to _D3 are sequentially sent out from the output terminal Y in the order of _D0 to _D3 .

ZP is displaced according to the zoom ratio setting state, and is connected to the input terminals D ₀ and D ₁ of the selector DS ₂ and ZM ₁
It is a zoom plate formed of a conductor that comes into contact with a predetermined position of ~ _ZM3 . Zoom ratio information is input using the information from the plate, and the amount of lens drive is corrected in accordance with the zoom ratio information.

The output terminal _Q3 of the counter _CNT2 is input to an inverting open collector gate _G10 , and the output of the gate _G10 is connected to the clock input terminal CLK of the counter _CNT2 .

SH ₂ is input terminal S:N as data outline
This is a shift register connected to the output terminal Y of the selector _DS1 via DATAOUT. The clock terminal CLK of the register is connected to the above line.
It is connected to buffer _G4 via CLOK, and input information is shifted in synchronization with the falling edge signal of the clock input via the buffer. Also, the G terminal is H
This is a control terminal for inhibiting subsequent shift operations by inputting a level.

_LT1 is a drive direction signal latch circuit composed of a D-type flip-flop.The clock terminal CK of this circuit is connected to the _Q3 output terminal of the counter _CNT2 , and the H level signal from this terminal causes the Latch the output signal of the shift register output terminal _Q3 . OP ₁ is an operational amplifier for amplifying the output of the latch circuit, and the signal amplified by this amplifier is input to the motor forward/reverse control circuit MD via switch SW _n , and the direction latched by the latch circuit is input to the motor forward/reverse control circuit MD. The motor M is rotated in forward and reverse directions based on the signal.

DEC ₁ is a down counter whose input terminals D ₀ -D ₂ are connected to the output terminals Q ₀ -Q ₂ of the register. The down counter loads the input signal with a rising signal to the clock terminal.
When the input clock to CLK is counted down and the count value becomes zero, an H level signal is output from the terminal DT≦0. The terminal DT≦0 is an AND gate whose one input terminal is connected to the Q ₃ output terminal of the counter CNT ₂ through the inverter G ₈ .
G ₉ is connected to the other input terminal of the gate G ₉
When the output is at H level, the above switch
Turn on SW _n . FP is a contact plate that is slid by the contact piece BR in conjunction with the motor M, and a number of pulses corresponding to the drive amount of the motor are formed by turning on and off the plate and the contact piece.

Next, the autofocus operation by the camera system using the accessory device according to the present invention will be explained using the flowchart shown in FIG. 4 and the waveform diagram shown in FIG.

Now, assume that power is being supplied to the circuits in the camera and lens, and perform the first stroke operation of the camera's release button. This causes the CPU to
Run the program from START. Note that when the input to the terminal RES is at H level, the CPU resets the program counter to zero and holds the program step at START.

When the first stroke operation is performed as described above, switch SW ₁ is turned on, and the CPU terminal RES
Since the input to the START step becomes L level, the holding of the START step is released and the program moves to the next step. In this step, the CPU sends out a negative pulse from the output port _PA5 and sends the negative pulse to the lens drive circuit LP through the PUC terminal of the contact of the mount, thereby performing the initial setting of the lens drive circuit. With this, counter CNT ₂ shifts to the initial state. After this, the CPU moves to the next dummy communication data set step. In this step
The CPU outputs L level signals to all output ports _PA0 to _PA3 . As mentioned above, the data SIGN output from PA ₃ represents the direction in which the lens is driven, and the data output from PA ₀ to _{PA 2}
VAL ₀ to VAL ₂ are data representing the driving amount.
After this data set step is performed, the step moves to a communication routine call step.
In this step, a communication routine to be described later is read, and information on the lens side is read using the dummy communication data without driving the lens. In the communication routine, first the CPU's output port
A clear pulse CLR (Figure 5) is output from PA ₄ and counter CNT ₁ is reset. With this, the input to the ENABLE terminal of counter CNT ₁ is low.
level, the counter counts the pulses from the clock pulse generator CG ₂ and outputs Q ₁ ,
Change Q ₂ and Q ₃ as shown in the fifth diagram. The outputs Q ₁ and Q ₂ of the above counter are data selector DS ₁
is input to input terminals A and B, and selector DS ₁
outputs the outputs of the output ports PA ₀ to _{PA 3} of the CPU from the output terminal Y in time series in accordance with the output changes (binary changes) of the terminals Q ₁ and Q ₂ of the counter.

Furthermore, the clock pulses of the clock pulse generator _CG2 are sent to the shift register via the gate _G3 .
In addition to being input to SH ₁ , the clock pulses are input to counter CNT ₂ and shift register SH ₂ via open collector buffer G ₄ and mounting contacts.

Therefore, the data of the output ports PA ₀ to _{PA 3} of the CPU sent in time series from the selector DS ₁ is transferred to the shift register SH ₂ . Also, by the counting operation of the counter CNT ₂ , the data selector DS ₂ sends out the data from the input terminals D ₀ to _{D 3} in time series from the output terminal Y via the sending line DATAIN.
The data applied to _the input terminal of the data selector is transferred to the shift register _SH1 .

In the process of data transfer as described above, the output terminal _Q3 of the counter _CNT1 is
When the level is output, the corresponding H level is input to the counter terminal, so when the above transfer is completed (at point _J4 in Figure 5), the counter
CNT ₁ stops counting operation. In addition, the Q ₃ output of the counter CNT ₁ is transmitted to the input port PB ₆ of the CPU as an EOC signal, and the CPU is transmitted to the input port PB ₀ of the CPU.
~Enter the input information for PB ₅ .

Furthermore, when the data transfer is completed as described above, the _Q3 output of counter _CNT2 also becomes H as shown in Figure 5.
Since the output of the inverting open collector gate _G10 is also at the L level, the AND gate is connected via the inverter _G6 .
One input signal of _G5 becomes H level. The other input of the AND gate _G5 is the counter _CNT1 mentioned above.
Since the AND gate _G5 is connected to _Q3 of the
Sends out the level and tells it to input port PB ₇ of the CPU.

Further, when the _Q3 output of the counter _CNT2 becomes H level, the latch circuit _LT1 latches the information of the Q output of the shift register _SH2 in response. At this time, the _Q3 output of the counter _CNT2 is also transmitted to the terminal of the counter _DEC1 , so the counter _DEC1 enters the load state and sets the information in the shift registers _Q0 to _Q2 .

As mentioned above, the data output from the output ports PA ₀ to _{PA 3} of the CPU in the dummy communication signal data set step is at L level, so all the data transferred to shift register SH ₂ in the above data transfer is at L level. It is becoming. Therefore, in the above operation, the counter DEC ₁ is also loaded with the L level data. Since the counter sends out an H level from the terminal DT≦0 when the count value is (≦0), the output of the inverter _G8 becomes an L level, and the gate _G9 also outputs an L level.
Therefore, the switch SW _n remains off, and the motor drive circuit MD remains inactive.
Also, for one shot circuit ON ₂ , counter DT≦
It is triggered in response to the H level from the 0 terminal to generate a negative pulse, and this negative pulse is transmitted to the terminal of the counter CNT ₂ via the gate _G7 , and the counter CNT ₂ is reset. the counter
When CNT ₂ is reset, an L level is sent from the output terminal _Q3 , the CLOCK terminal becomes H level, and the L level is transmitted to the AND gate _G5 via _G6 .
Therefore, gate _G5 sends out the L level, and the above
Eliminate the BUSY signal.

In this way, input ports PB ₀ to _{PB 5} are input in the communication signal routine after the dummy communication data set step.
It only performs the operation of inputting the information to the CPU, and then moves to the return step, where the communication routine ends and the step moves to the next direction display off step. In this step, a prohibition signal for prohibiting the operation of the display device DISP is sent from the PC port of the CPU, and the display device DISP is rendered inactive.

After this, the program moves to the BUSY step. In this step, it is detected whether the input to input port PB ₇ of the CPU is at H level or not, and this state is maintained as long as the input to input port PB ₇ is at H level, and the input to port PB ₇ is at L level. This is a waiting step that causes the transition to the next step when the transition occurs.

As mentioned above, since the BUSY signal is at L level at this point, the step immediately shifts to the next accumulation clear step. In this step, an H level is output from the NO port of the CPU to open the integration clear gate of the light receiving section CCDP, clearing the accumulated charges in the sensors CR and CF, and turning on the transistor Tr to discharge the charge in the capacitor _C1 . Clear. After this, the step moves to an accumulation start step.
In this step, the signal from the NO port of the CPU is set to L level to start the charge accumulation operation by the sensors CR and CR, and to turn off the transistors. As a result, each sensor accumulates image signals depending on the image formation state, and the capacitor
_C1 is charged by the output of sensor AC, which measures the average amount of light incident on each sensor.

During the process in which image signals are accumulated in the sensor in this way, when the charge level of the capacitor _C1 exceeds the reference level _VCP , the comparator
An H level is sent from CP ₁ , and one shot circuit ON ₁ is activated in response to this H level.

Pulse CPU from this one-shot circuit ON ₁
The CPU senses the pulse and moves to the next data store step. Also, the pulse from the one-shot circuit ON ₁ is input to the light receiving unit CCDP as a transfer pulse, and the light receiving unit uses the transfer pulse to detect the sensor CR,
The photocharges accumulated in the CF are transferred to the analog shift register of the sensor, and the charges accumulated in each sense section of each sensor are sent out from the light receiving section in time series with pulses φ ₁ and φ ₂ .

When the process moves to the data store step as described above, in this step the CPU sequentially stores the input data to the data ports _D0 to _D3 in the internal memory. As mentioned above, from the light receiving section, the photocharges accumulated in each sensing section (A ₀ to _{A 3} , B ₁₀ to B _-7 ) of the sensor are sequentially sent out from each sensing section and input into the AD converter AD. Therefore, in the data store step, data ports D ₀ to _{D 3}
The digital values obtained by AD converting the imaging optical signals from each sense section are transmitted to each sense section in time series and stored in the internal memory in sequence.

After the data store step is performed in this manner, the process moves to the next direction detection calculation step. In this step, autofocus direction detection is performed based on the individual information (digital values corresponding to the amount of charge of the imaging light) of each sense section B _-7 to _A3 of the sensor stored in the internal memory. Detection calculations are performed.

In this _{embodiment ,} ^the misaligned _{image detection} method explained in _FIG . ...(1) (However, the digital values of the image-forming accumulated charges of the sensor sections A ₃ to B _-7 are denoted by the same symbols A ₃ to B _-7 .) The following calculation is performed. The sign of the calculated value in equation (1) represents the direction to the in-focus point (front focus, back focus), and the direction to the in-focus point is detected by this calculation. Note that this calculation itself is not directly related to the present invention, so its explanation will be omitted.

After this, the step moves to the _FEXT step.

In this step, the information input to the input port PB ₄ of the CPU in the communication routine described above is detected and it is determined whether the lens attached to the camera is an autofocus lens that has a distance measurement function. It is done.

In the autofocus function lens used in the present invention, as shown in FIG. 6a, the contacts for the camera contact, CLOCK, and DATAOUT are open, and are connected to the camera contacts GND and DATAIN. The contacts are shorted. Therefore, when the autofocus lens is attached, all data transferred to shift register _SH1 in the communication routine is at L level, and therefore, an H level signal is sent from gate _G1 . This H level is input to input port _PB4 .

This communication routine connects the CPU via port PB ₄ .
In this step, the H level input to the terminal is detected.
Now, assuming that a lens with an autofocus function is attached as described above, the H level described above is detected, the step moves to the accumulation clear step described above, and the steps from the accumulation clear step to the F _EXT step are repeated. It will be executed again.
Therefore, if the attached lens has an autofocus function, distance measurement and autofocus operations are carried out by the lens itself, and the camera side does not perform any autofocus operations, nor does it perform any direction display, etc. It will not be possible.

Further, if the attached lens is other than a lens having an autofocus function, the H level is not detected in the _FEXT step, and the step proceeds to the next direction display step.

In this direction display step, a signal representing the direction toward the in-focus point determined in the direction detection calculation step is transmitted to the display DISP to indicate the in-focus direction.

In this manner, when the lens does not have an autofocus function, the focusing direction is instructed on the display DISP, and then the step shifts to the _FMAN step.

This step is a step for detecting whether or not the attached lens is a normal lens. In this step, the communication routine described above
The data input to input port PB ₅ of the CPU is H.
It detects whether the level is high or not, and identifies whether the attached lens is a normal lens or not. That is, as shown in FIG. 6b, a normal lens does not have any contacts to connect with the contacts of the camera, so all of the lenses are in an open state. Therefore, in the above communication routine, all the data transmitted to shift register _SH1 is at H level, and in the above communication routine, the H level from gate _G2 is transmitted to the CPU.
input to input port PB ₅ . Therefore, the above
By detecting the H level at the F _MAN step, it is determined that the attached lens is a normal lens, and in this case, the step returns to the accumulation clear step, and from then on, the process returns to the accumulation clear step.
The operations up to the F _MAN step are executed repeatedly,
The focusing direction is calculated and the direction is displayed repeatedly, and the photographer can manually adjust the distance by operating the photographic lens in the direction corresponding to the focusing direction instruction.

In addition, if the attached lens is a dedicated lens shown in Figure 3 that automatically performs focusing operations based on signals from the camera, H level detection is not performed in the F _MAN step described above, and the step is not performed. Move to the next predict calculation step.

In this step, the digital values corresponding to the individual accumulated charges of the sense sections _A3 to B _-7 , respectively stored in the internal memory of the CPU in the data store step described above, are calculated using the following known predict amount calculation formula. The amount of shift to the in-focus point is calculated.

₃ 〓 ^N=0 | A _N −B _N+1 | (i=-7 to 7) ...(2) The amount of shift to focus corresponds to the value of i that minimizes formula (2). The shift amount is calculated using this formula, but the method for calculating the shift amount itself is well known and has no direct relation to the present invention, so a description thereof will be omitted. After this the steps are
Move to ZOOM correction step.

In this step, the shift amount calculated in the predict calculation step is corrected in accordance with the zoom position of the lens, so that normal focusing is always performed regardless of the zoom state.

Generally, in a zoom lens that focuses on the front lens, the sensitivity differs depending on the zoom position, and even if the lens is driven by the same amount of drive, the amount of image plane movement cannot be made constant. On the other hand, since the shift amount calculated in the predict calculation step is the image plane movement amount, the zoom position must be taken into account when determining the lens drive amount corresponding to the image plane movement amount.

Therefore, in this step, the shift amount calculated in the predict calculation step, that is, the image plane movement amount, is corrected based on the data input to the input ports PB ₀ to _{PB 3} of the CPU in the communication routine. It's summery.

That is, in the above communication routine, the data applied to the inputs _D0 to _D3 of the data selector _DS2 are input to the input ports _PB0 to _PB3 of the CPU.
The input ends D ₀ , D ₁ of this selector DS ₂ have input ends D ₀ , D ₁ and ZM ₁ to _{ZM 3} depending on the zoom ratio of the lens.
A zoom plate is provided which connects to a predetermined position of the lens, and as a result, in the above communication routine, depending on the zoom ratio of the lens, (0, 1), (0, 0),
Any zoom information (1, 0) is input to the input terminals PB ₀ to PB ₁ of the CPU.

In this step, when the zoom information is (0, 1), the divisor is 1, when it is (0, 0), the divisor is 1.5, (1,
0), the shift amount calculated in the predict calculation step is divided by the divisor with a divisor of 2 to obtain the actual lens drive amount from the image plane movement amount. After this, the step moves to a predict communication data set step.

In this step, the CPU output ports PA ₀ ~ PA ₂
A signal representing the amount of lens driving determined in the above step is sent from the output port PA3, and a signal representing the driving direction of the lens toward the in-focus point is output from the output port _PA3 .

The step then moves to the communication routine call step to re-execute the communication routine described above.

This communication routine is as described above.
The data of the output ports PA ₀ to _{PA 3} of the CPU is transferred to the latch circuit LT ₁ and the counter DEC ₁ via the shift register SH ₂ , and the zoom ratio information of the zoom plate ZP is transferred to the input port of the CPU.
Input to PB ₀ to PB ₃ .

Also, when the above transfer is completed, from gate _G5
An H level signal is sent as a BUSY signal.

Furthermore, as mentioned above, since the data of the output ports PA ₀ to _{PA 2} represents the lens drive amount, when the lens drive amount signal is transferred to the counter DEC ₁ , an L level is sent from the output terminal DT≦0. , the H level is transmitted to one input terminal of the gate _G9 via the inverter _G8 . The other input terminal of this gate G ₉ is connected to the Q ₃ output terminal of the counter CNT ₂ , and as mentioned above, the H level is sent from this output terminal Q ₃ at the end of data transfer, so the above When data transfer is completed, gates _G9 to H
The level is sent and switch SW _n is turned on.
The motor drive circuit MP becomes operational.

In addition, the data from the output port PA ₃ of the CPU is transferred to the output terminal Q ₃ of the shift register SH ₂ in the above transfer, and since this data indicates the driving direction of the lens as described above, the latch circuit
The lens drive direction signal is latched in LT ₁ when the above data transfer is completed, and the lens drive direction signal is transmitted to the motor drive circuit MP via amplifier OP ₁ , and the motor moves in the instructed direction. Drive the lens.

The contact piece BR slides on the contact piece plate FP in conjunction with the driving of the lens, and a number of pulses corresponding to the lens driving amount are input to the counter DEC ₁ , and the counter receives the signal from the set lens driving amount signal. The input pulse is counted down, and when the contents of the counter reach zero, an H level is sent out from DT≦0. Due to this H level, an L level is generated from the gate _G9 , the motor drive circuit MD becomes inactive, the lens drive is stopped, and the one shot circuit ON ₂ is triggered, as described above.
Counter _CNT2 is reset, H level is generated at the CLOCK terminal, gate _G5 sends out L level, and the BUSY signal disappears.

In this manner, the communication routine is executed, and in this routine, the lens drive amount signal is transferred in synchronization with the transfer clock pulse input to the lens via the CLOCK terminal, and the lens drive amount signal is transferred based on this transferred data. After the lens has moved to the in-focus point, the step shifts again to accumulation clearing, and thereafter, the operations from the accumulation clearing step to the communication routine step are repeatedly executed.
An autofocus operation that follows the movement of the subject is executed.

As described above, in the present invention, during lens driving,
Since the BUSY signal is input to the camera, it is possible to prevent the lens from being driven based on the image formation information of the light receiving section while the lens is being driven as in the example above, and also to prevent the above-mentioned
The above terminal is used to send the BUSY signal to the camera.
Since it doubles as a CLOCK terminal, the number of connection terminals between the camera and lens can be minimized.

[Brief explanation of drawings]

Fig. 1a is a principle diagram showing the distance measurement principle applied to the autofocus device of a camera to which the accessory device of the present invention is attached, Figs. 1b and c are explanatory diagrams thereof, and Fig. 2
The figure is a circuit diagram showing one embodiment of a camera system device that employs an accessory device according to the present invention, and FIG.
A circuit diagram showing the main parts in the figure, Figure 4 is Figure 2,
FIG. 5 is a waveform diagram for explaining the operation of the circuit shown in FIG. 3, and FIGS. 6 a and b are diagrams showing the operation of the circuit shown in FIG. FIG. 7 is a circuit diagram showing a connection terminal section when connecting a lens other than a dedicated lens. CNT ₁ ...Counter, G ₄ ...Open collector battle.

Claims (1)

[Scope of Claims] 1. A processing circuit for controlling photographing operations, a data output terminal for serially transmitting signals from the processing circuit to the outside using clock pulses, and a signal input to the processing circuit serially using the clock pulses. A first terminal connected to the data output terminal, a first terminal connected to the data input terminal, and a first terminal connected to the data output terminal; a second terminal, a third terminal connected to the clock terminal, an electric drive source that drives the movable member according to a signal inputted through the first terminal;
and a control circuit that applies a signal at a specific level to the third terminal while the movable member is being driven by the electrical drive source. Ancillary equipment.