JPS60144353U - signal detection circuit - Google Patents
signal detection circuitInfo
- Publication number
- JPS60144353U JPS60144353U JP3242184U JP3242184U JPS60144353U JP S60144353 U JPS60144353 U JP S60144353U JP 3242184 U JP3242184 U JP 3242184U JP 3242184 U JP3242184 U JP 3242184U JP S60144353 U JPS60144353 U JP S60144353U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- outputs
- output
- signal detection
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の信号検出回路を示すブロック図、第２図
ａ、 ｂはその動作を示す波形図、第３図は本考案によ
る信号検出回路の実施例を示すブロック図、第４図ａ、
ｂは第３図において適切な入力レベルの時とレベルが
低下した時の各々の場合を示す波形−である。
１・・・・・・帯域ろ波回路、２・・・・・・整流回路
、３゜３′・・・・・・レベル判定回路、６・・・・・
・時間判定回路、７・・・・・・論理回路。Figure 1 is a block diagram showing a conventional signal detection circuit, Figures 2a and b are waveform diagrams showing its operation, Figure 3 is a block diagram showing an embodiment of the signal detection circuit according to the present invention, and Figure 4a. ,
b is a waveform in FIG. 3 that shows the cases when the input level is appropriate and when the level has decreased. 1... Band filter circuit, 2... Rectifier circuit, 3゜3'... Level judgment circuit, 6...
・Time judgment circuit, 7...Logic circuit.
Claims (1)
せる帯域戸波回路と、その出力を整流する整流回路と、
その出力を互いに異なるしきい値によってレベル判定す
る２つのレベル判定回路と、それら出力の立上りの時間
差、立下りの時間差を判定し所定の時間以上になると警
報を出力する時間判定回路と、前記時間判定回路の出力
のうち、より早く立上る（立下る）時点で立上り、より
遅く立下る（立上る）時点で立下る出力を得る論理回路
とを有することを特徴とする信号検出回路。A bandpass circuit that passes only the frequency band of the input burst signal once, and a rectifier circuit that rectifies its output.
two level determination circuits that determine the level of the output using different thresholds; a time determination circuit that determines the time difference between the rise and fall of these outputs and outputs an alarm when the time difference exceeds a predetermined time; A signal detection circuit comprising: a logic circuit that obtains an output that rises at an earlier rising (falling) point and falls at a later falling (rising) point among the outputs of the determination circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3242184U JPS60144353U (en) | 1984-03-07 | 1984-03-07 | signal detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3242184U JPS60144353U (en) | 1984-03-07 | 1984-03-07 | signal detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60144353U true JPS60144353U (en) | 1985-09-25 |
Family
ID=30533919
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3242184U Pending JPS60144353U (en) | 1984-03-07 | 1984-03-07 | signal detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60144353U (en) |
-
1984
- 1984-03-07 JP JP3242184U patent/JPS60144353U/en active Pending
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