JPS5963513U - Detection circuit - Google Patents

Detection circuit

Info

Publication number
JPS5963513U
JPS5963513U JP15750882U JP15750882U JPS5963513U JP S5963513 U JPS5963513 U JP S5963513U JP 15750882 U JP15750882 U JP 15750882U JP 15750882 U JP15750882 U JP 15750882U JP S5963513 U JPS5963513 U JP S5963513U
Authority
JP
Japan
Prior art keywords
circuit
detection circuit
detection
intermediate frequency
conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15750882U
Other languages
Japanese (ja)
Inventor
菅原　和明
小井沼　博
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP15750882U priority Critical patent/JPS5963513U/en
Publication of JPS5963513U publication Critical patent/JPS5963513U/en
Pending legal-status Critical Current

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Landscapes

  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図・・・従来知られている復調回路、第２図・・・
この考案の一実施例である検波回路、第３図・・・他の
実施例の検波回路。Fig. 1... Conventionally known demodulation circuit, Fig. 2...
A detection circuit according to one embodiment of this invention; FIG. 3 shows a detection circuit according to another embodiment.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 中間周波増幅回路に接続され、周期カウント回−路、演
算回路、Ｄ−Ａ変換回路および検波部から成り、中間周
波増幅回路の出力信号の周期を時間カウントし演算処理
した後Ｉ）−Ａ変換することにより検波出力を発生させ
ることを特徴とする検波回路。It is connected to the intermediate frequency amplification circuit and consists of a period counting circuit, an arithmetic circuit, a D-A conversion circuit, and a detection section, and performs I)-A conversion after time counting and arithmetic processing of the period of the output signal of the intermediate frequency amplification circuit. A detection circuit characterized in that it generates a detection output by.
JP15750882U 1982-10-20 1982-10-20 Detection circuit Pending JPS5963513U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15750882U JPS5963513U (en) 1982-10-20 1982-10-20 Detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15750882U JPS5963513U (en) 1982-10-20 1982-10-20 Detection circuit

Publications (1)

Publication Number Publication Date
JPS5963513U true JPS5963513U (en) 1984-04-26

Family

ID=30347241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15750882U Pending JPS5963513U (en) 1982-10-20 1982-10-20 Detection circuit

Country Status (1)

Country Link
JP (1) JPS5963513U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS564904A (en) * 1979-06-25 1981-01-19 Toshiba Corp Method and device for demodulating frequency-modulated wave

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS564904A (en) * 1979-06-25 1981-01-19 Toshiba Corp Method and device for demodulating frequency-modulated wave

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