JPS60142452A - Storage protecting system - Google Patents

Abstract

PURPOSE:To protect an area to be inhibited from writing of data precisely by setting up a flag bit for displaying whether data writing in said area is to be permited or not in accordance with the area having a fixed size. CONSTITUTION:When the IPL of a control program to a storage device 2 is ended, the end is informed to a flag writing control part 4 by a signal S and an address control part 1 generates an address in an area to be inhibited from writing. The data concerned are stored in a register 5. At that time, the control part 4 generates a flag, stores the flag in a flag setting part 6 and rewrites the flag on the formed address position in the storage device 2. Consequently, the flag is displayed in a flag display part 3 corresponding to the address concerned. After repeating said operation and ending the writing of all flags, the status is informed to the control program by a signal E and the system is opened. Then, the data writing to the storage device 2 is inhibited by the contents of a flag detecting part 7.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) The present invention relates to a method for protecting important areas such as an interrupt activation address area in a storage section of a communication control processing device.

(2) Prior Art and Problems Conventionally, there has been a key comparison method as a method for protecting data in a storage unit in a communication control processing device. In this method, a key is set for a certain storage area, and access to the storage section is restricted by comparing it with the protection key held by the program being executed. In reality, it monitors accesses caused by low-priority programs (such as user programs) or cycle steals, and takes measures by generating an interrupt when these programs attempt to access beyond the constraints. ing.

The storage section of the communication control processing device is allocated with an "interrupt start address area" in which programs for processing various interrupts are stored with levels determined in order of priority. Since this area is an important area, its storage is protected using the key comparison method described above, but when accessed by a program with a high priority (for example, a program running in supervisor mode), The problem was that they would gain weight if not protected.

If the contents of the above-mentioned "interrupt activation address area" were to be destroyed, it would be extremely difficult to investigate the cause due to its nature.

However, communication control programs have many opportunities for debugging to improve performance and add functions, and system generation (SG) to change terminal accommodation, and there are many opportunities for debugging to improve performance and add functions, and system generation (SG) to change terminal accommodation. A situation can often occur in which the υinclusive startup address area is destroyed by an erroneous access.

In such cases, the traditional key comparison method.

The drawback is that it is impossible to protect important areas such as the "interrupt activation address area" from unauthorized access.

(3) Purpose of the Invention In view of the above-mentioned drawbacks of the conventional art, the present invention solves the problem of an important area such as an "interrupt start address area" in the storage section of a communication control processing device, and if such an area is destroyed, it will have a negative impact. The purpose of this invention is to provide a method that can reliably protect areas that are not only large in size, but also for which it is extremely difficult to find the cause.

(4) Structure of the Invention According to the present invention, this object is to store a control program of a certain size in a storage device for storing a control program of an information processing device or a communication control processing device. A flag bit is provided that corresponds to each area and indicates whether writing of data is permitted or denied in that area, and after the initial program load of the control program is completed, the indication of the flag bit is written in hardware. This is accomplished by a memory protection method characterized by comprising means for inhibiting data from being written to an area corresponding to the flag bit when the flag bit indicates a write-rejected state.

(5) Embodiment of the invention FIG. 1 is a block diagram of an embodiment of the invention, in which 1 is an address control section, 2 is a storage device, 3 is a flag display section, and 4 is a block diagram of an embodiment of the invention.
is a flag write control unit, 5 is a register, and 6 is a flag write control unit.
The set part, 7 represents a flag detection part, S is a signal issued when the IPL of the control program is completed, and E
is a signal that notifies the control program that flag writing has been completed, and is a signal that notifies that a flag writing refusal state has been detected. A indicates an "interrupt start address area", which is an area in which writing is prohibited after the IPL of the control program is completed.

In FIG. 1, the IP of the control program to the storage device 2 is
When L ends, the flag writing control unit 4 is notified by the signal S, and the address control unit 1 generates the address of the area (indicated by A in FIG. 1) where glutes should be prohibited, and writes the data. is read and stored in register 5.

At this time, the flag write control unit 4 generates a flag (“1#”), stores it in the flag set unit 6, and writes these data and the flag again to the address location from which the data was read in the storage device 2. As a result, 11'' is displayed on the flag display section 3 of the address. By repeating this operation, each flag on the flag display section 3 in the area indicated by A will display "1#." The size of the area to which each flag corresponds may be adjusted as necessary. Although it can be set arbitrarily, in this example, it is set so that every 4 bytes has a flag. When all the flags for area A have been written, the control program is notified by signal E and the system is opened.

After that, when writing data to the storage device 2,
The flag at the address is read out by the flag setting section 6 of the register 5 and checked by the flag detection section 7. If the flag is "1#", the signal engineer blocks the writing and Generates an interrupt and controls program 2
Notify Mu. All these controls are performed by hardware.

(6) Effects of the Invention As explained in detail above, according to the system of the present invention, the IP address of the control program is stored in a storage device, etc.
After L, the hardware will reliably protect the area where you want to prohibit writing data, so important areas will not be destroyed due to bugs during software debugging or SG, so the effect is great. be.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. 1...Address control unit, 2...Storage device, 3...
Flag display section, 4...Flag writing control section, 5...
・Register, 6...Flag setting section, 7...Flag detection section Fig. 1

Claims (1)

[Claims] In a storage device that stores a control program for an information processing device or a communication control processing device, a flag bit is provided that corresponds to each area of a certain size and indicates whether writing of data to that area is permitted or denied. means for writing an indication of the flag bit in hardware after the initial program loading of the control program is completed;
1. A storage protection system comprising means for prohibiting data from being written to an area corresponding to a flag bit when the flag bit indicates a write-rejected state. .