JPS60141577U - Video waveform shaping circuit - Google Patents

Video waveform shaping circuit

Info

Publication number
JPS60141577U
JPS60141577U JP2847184U JP2847184U JPS60141577U JP S60141577 U JPS60141577 U JP S60141577U JP 2847184 U JP2847184 U JP 2847184U JP 2847184 U JP2847184 U JP 2847184U JP S60141577 U JPS60141577 U JP S60141577U
Authority
JP
Japan
Prior art keywords
circuit
waveform shaping
video waveform
shaping circuit
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2847184U
Other languages
Japanese (ja)
Other versions
JPH0412471Y2 (en
Inventor
河西 萬智朗
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP2847184U priority Critical patent/JPS60141577U/en
Publication of JPS60141577U publication Critical patent/JPS60141577U/en
Application granted granted Critical
Publication of JPH0412471Y2 publication Critical patent/JPH0412471Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Manipulation Of Pulses (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はソーナー装置の受信表示部を示すブロック図で
あり、第2図は第1図に示した回路の入出力信号波形図
を示し、第3図は第1図に示した表示部4に表示される
表示図である。、第4図は従来の波形整形回路を示す回
路図である。第5図及び第7図は本考案の一実施例を示
す回路図である。第6図は第4図及び第5図に示した゛
回路の入出力信号波形図である。 1・・・・・・方位検出部、2・・・・・・ビデオ検波
部、3・・・・・・ビデオ波形整形回路、4・・・・・
・表示部、5・・・・・・受信信号、6・・・・・・方
位信号、7・・・・・・検波信号、8・・・・・・ビデ
オレベル信号、11・・・・・・ダイオード、127・
・・・・・抵抗器、13・・・・・・コンデンサ、21
・・・・・・トランジスタ、22・・・・・・ダイオー
ド、23・・・・・・定電圧電源、24・・・・・・抵
抗器、25,26・・・・・・抵抗器、35・・・・・
・受信信号波形、36・・・・・・方位信号波形、37
・・・・・・検波信号波形、38・・・・・・ビデオレ
ベル信号波形。
FIG. 1 is a block diagram showing the reception display section of the sonar device, FIG. 2 shows an input/output signal waveform diagram of the circuit shown in FIG. 1, and FIG. 3 shows the display section 4 shown in FIG. 1. FIG. , FIG. 4 is a circuit diagram showing a conventional waveform shaping circuit. 5 and 7 are circuit diagrams showing an embodiment of the present invention. FIG. 6 is an input/output signal waveform diagram of the circuit shown in FIGS. 4 and 5. 1... Direction detection section, 2... Video detection section, 3... Video waveform shaping circuit, 4...
・Display section, 5...Received signal, 6...Direction signal, 7...Detection signal, 8...Video level signal, 11...・Diode, 127・
...Resistor, 13 ...Capacitor, 21
...Transistor, 22...Diode, 23...Constant voltage power supply, 24...Resistor, 25,26...Resistor, 35...
・Received signal waveform, 36... Direction signal waveform, 37
...Detection signal waveform, 38...Video level signal waveform.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ソーナー装置の表示制御に用いられるビデオ波形竪型回
路において、抵抗器とコンデンサによって成る充電時定
数を設定する充電回路と、トランジスタおよびそのベー
スをバイアスするための定電圧電源と少なくとも2本の
抵抗器により構成されるバイアス回路入力信号レベルと
出力信号レベルの差により前記トランジスタを0N10
FFさせ、ビデオ信号の放電時定数を設定する放電回路
とを有することを特徴とするビデオ波形整形回路。
A video waveform vertical circuit used for display control of a sonar device includes a charging circuit that sets a charging time constant consisting of a resistor and a capacitor, a constant voltage power supply for biasing a transistor and its base, and at least two resistors. The bias circuit configured by
1. A video waveform shaping circuit comprising: a discharging circuit for FF and setting a discharging time constant of a video signal.
JP2847184U 1984-02-29 1984-02-29 Video waveform shaping circuit Granted JPS60141577U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2847184U JPS60141577U (en) 1984-02-29 1984-02-29 Video waveform shaping circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2847184U JPS60141577U (en) 1984-02-29 1984-02-29 Video waveform shaping circuit

Publications (2)

Publication Number Publication Date
JPS60141577U true JPS60141577U (en) 1985-09-19
JPH0412471Y2 JPH0412471Y2 (en) 1992-03-25

Family

ID=30526373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2847184U Granted JPS60141577U (en) 1984-02-29 1984-02-29 Video waveform shaping circuit

Country Status (1)

Country Link
JP (1) JPS60141577U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11467242B2 (en) 2019-05-29 2022-10-11 Nec Corporation Direction-of-arrival estimation apparatus, method, and non-transitory medium

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991179A (en) * 1972-12-28 1974-08-30
JPS58179020A (en) * 1982-04-15 1983-10-20 Matsushita Electric Works Ltd Delay circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991179A (en) * 1972-12-28 1974-08-30
JPS58179020A (en) * 1982-04-15 1983-10-20 Matsushita Electric Works Ltd Delay circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11467242B2 (en) 2019-05-29 2022-10-11 Nec Corporation Direction-of-arrival estimation apparatus, method, and non-transitory medium

Also Published As

Publication number Publication date
JPH0412471Y2 (en) 1992-03-25

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