JPS60138780A - Method for handling write inhibition - Google Patents

Method for handling write inhibition

Info

Publication number
JPS60138780A
JPS60138780A JP24685483A JP24685483A JPS60138780A JP S60138780 A JPS60138780 A JP S60138780A JP 24685483 A JP24685483 A JP 24685483A JP 24685483 A JP24685483 A JP 24685483A JP S60138780 A JPS60138780 A JP S60138780A
Authority
JP
Japan
Prior art keywords
storage area
write
logical
maintenance
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24685483A
Other languages
Japanese (ja)
Inventor
Yoshiki Hata
芳樹 畑
Makoto Deguchi
誠 出口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24685483A priority Critical patent/JPS60138780A/en
Publication of JPS60138780A publication Critical patent/JPS60138780A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain much advantages on maintenance by inhibiting the write when write inhibition is indicated by a protection indication means and the address corresponds to a conventional storage area. CONSTITUTION:When an output of an inverting circuit 5 is logical ''1'', a write signal WR attains write through an AND gate 6. When the switch 1 is opened, an exclusive OR circuit 4 outputs respectively logical ''0'' and logical ''1'' depending on the logical ''1'' and logical ''0'' of the user storage area usage. The logical value is inverted by the inverting circuit 5 and logical values ''1'' and ''0'' are inputted to the AND gate 6. As a result, when the switch 1 is opened, the user's area is possible for write and the maintenance storage area is inhibited for write. Thus, the write of the maintenance storage area due to mistake of the user is inhibited so as to prevent destruction.

Description

【発明の詳細な説明】 (al 発明の技術分野 本発明は情報処理システムに用いられる記憶装置、特に
磁気ディスク装置に於ける保守用記憶域の書き込み禁止
の取扱い方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a storage device used in an information processing system, particularly to a method for handling write protection in a maintenance storage area in a magnetic disk device.

(b) 従来技術と問題点 情報処理システムに情報を記憶する手段とじて磁気ディ
スク装置が盛んに使用されている。此の磁気ディスク装
置は、記憶データを破壊から護る為に記憶域への書き込
みを禁止する手段、例えばプロテクト・スイッチが設け
である。ところが、此のプロテクト・スイッチを操作す
ると、装置全体の記憶域の書き込みを禁止し、又此のス
イッチを解除すると全記憶域の書き込みが可能となる。
(b) Prior Art and Problems Magnetic disk drives are widely used as means for storing information in information processing systems. This magnetic disk device is equipped with a means, such as a protect switch, for prohibiting writing to the storage area in order to protect the stored data from destruction. However, when this protect switch is operated, writing to the entire storage area of the device is prohibited, and when this switch is released, writing to the entire storage area becomes possible.

従って、保守員が何等かの理由に依って保守用記憶域に
書き込みを行う場合に、プロテクト・スイッチを解除す
ると全記憶域が解除されて、保守用記憶域のアドレス指
定に誤りを生ずると、ユーザ用記憶域のデータを破壊す
ることが生しると言った欠点があった。
Therefore, if maintenance personnel write to the maintenance storage area for some reason, releasing the protect switch will clear the entire storage area and cause an error in the address specification of the maintenance storage area. The drawback was that data in the user storage area could be destroyed.

(C1発明の目的 以上、従来の欠点に鑑み本発明は、保守を行う時に使用
する保守記憶域のみ宿き込み禁止の解除が行える書き込
み禁止の取扱い方法を提供することを目的とするもので
ある。
(C1 Beyond the purpose of the invention, in view of the conventional drawbacks, the present invention aims to provide a write protection handling method that can cancel the write protection only in a maintenance storage area used when performing maintenance. .

(di 発明の構成 簡単に述べると本発明は、一般の記憶域と保守用の記憶
域を有し、記憶域の書き込み禁止機能を持つ磁気記憶装
置に於いて、記憶すべきアドレスが一般の記憶域か保守
用の記憶域かを判定する手段と、保守用のプロテクト指
示手段とを有し、該プロテクト指示手段によって、書き
込み禁止が指示されたときに前記アドレスが一般の記憶
域に対応するものであるときは、其の書き込みを禁止す
ることを特徴とするものである。
(di) Structure of the Invention Briefly stated, the present invention provides a magnetic storage device that has a general storage area and a maintenance storage area, and has a write-protection function for the storage area, in which an address to be stored is in the general storage area. means for determining whether the storage area is a storage area or a storage area for maintenance, and a protection instruction means for maintenance, and the address corresponds to a general storage area when write protection is instructed by the protection instruction means. , the writing thereof is prohibited.

(e) 発明の実施例 以下、本発明の実施例を図釘依って詳細に説明する。(e) Examples of the invention Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は本発明の書き込み禁止の取扱い方法の一実施例
の回路図、第2図は本発明による他の実施例を示す回路
図である。
FIG. 1 is a circuit diagram showing one embodiment of the write protection handling method of the present invention, and FIG. 2 is a circuit diagram showing another embodiment of the present invention.

解読回路2は、磁気ディスク装置が保守用記憶域のアド
レスを指定すると、論理値例えば“0゛を出力し、ユー
ザ用記憶域を指定すると論理値。
The decoding circuit 2 outputs a logical value, for example, "0" when the magnetic disk device specifies the address of the maintenance storage area, and outputs a logical value when the user storage area is specified.

l”を出力する。スイッチ1は従来から使用されている
プロテクト用のスイッチであり、スイッチlを投下する
と記憶域の書き込みが禁止される。
1" is output. Switch 1 is a conventionally used protection switch, and when switch 1 is turned off, writing to the storage area is prohibited.

スイッチ1と解読回路2は共に、排他的論理和回路4に
接続されている。+5vは抵抗素子3を介してスイッチ
lの出力端と共に排他的論理和回路4に接続されている
。排他的論理和回路4の出力はインバート回路5を介し
てアンドゲート回路6の一方入力端に接続され、他方入
力端には書き込み信号WRが入力される。従って、イン
バート回路5の出力が論理値+11なる時に書き込み信
号畦はアンドゲート回路Gを通り、書き込みを行うこと
となる。スイッチ1が「開」状態にあると回路4の一方
の入力は論理値“1′であり、排他的論理和回路4はユ
ーザ記憶域使用の論理値“1”、記憶域使用の論理値“
Ooとに依って論理値′0゛ と“1”をそれぞれ出力
する。論理値はそれぞれインバーニー回路5に依って反
転され、論理値“1゛と°0”とをそれぞれアンドゲー
ト回路5に入力する。結果としてスイッチIが「開」の
時、ユーザ記憶域は書き込み可能となり、保守用記憶域
は書き込み禁止となる。即ち、ユーザのミスに依る保守
用記憶域の書き込みを禁止し破壊を防止する。次にスイ
ッチlが「閉」で論理値°O゛なる時に排他的論理和回
路4はユーザ記憶域使用の論理値°1” と保守用記憶
域使用の論理値“0゛に依ってそれぞれ論理値“l゛ 
と“0゛とを出力し、インバート回路5にて反転されア
ンドゲート回路5の入力をユーザ記憶域使用時に論理値
“0” と、保守記憶域使用時に論理“l゛をそれぞれ
出力する。即ち、スイッチを「閉」状態とすると、保守
用記憶域が書き込み可能となり、ユーザ記憶域の書き込
みのみが禁止される。上記した論理値の状態は下表に示
す。
Both the switch 1 and the decoding circuit 2 are connected to an exclusive OR circuit 4. +5v is connected to the exclusive OR circuit 4 together with the output terminal of the switch l via the resistor element 3. The output of the exclusive OR circuit 4 is connected to one input terminal of an AND gate circuit 6 via an invert circuit 5, and the write signal WR is input to the other input terminal. Therefore, when the output of the invert circuit 5 becomes the logical value +11, the write signal ridge passes through the AND gate circuit G to perform writing. When the switch 1 is in the "open" state, one input of the circuit 4 has a logic value "1", and the exclusive OR circuit 4 has a logic value "1" for user storage use and a logic value "1" for storage use.
The logical values '0' and '1' are output depending on Oo, respectively. The logic values are each inverted by the Inverney circuit 5, and the logic values "1" and "0" are respectively input to the AND gate circuit 5. As a result, when switch I is "open", the user storage area is writable and the maintenance storage area is write-protected. That is, writing to the maintenance storage area due to a user's mistake is prohibited to prevent destruction. Next, when the switch l is "closed" and the logic value becomes °O', the exclusive OR circuit 4 outputs a logic value depending on the logic value °1" for user storage use and the logic value "0" for maintenance storage use. Value “l゛
and "0", which is inverted by the invert circuit 5, and outputs the input of the AND gate circuit 5 as a logic value "0" when the user storage area is used and a logic value "1" when the maintenance storage area is used. That is, when the switch is set to the "closed" state, the maintenance storage area becomes writable, and only writing to the user storage area is prohibited. The states of the above logical values are shown in the table below.

表 「−一一−下−−−−下一一一一一下一一−−]1スイ
ッチ1使用状態1排他的論 1インバー11 状態 1
 1理和の出力1ト出力 1トー−−十−−−−十−−
−−十−−一一+1開“l”l ’l’l ’O’ l
’l’ 1+−−−−十−−−−十−−−−−十−−−
−−+1開′l°1 “0°I “1′1“0” 1F
=−−−十−−−−十−−−−一十−−−−−11閉“
0′1 °1’ l “1° 1′0” 1トーーー−
十〜−−−+−−−−+−−−−−11閉“0゛1 “
O’l ’0’ l“1′IL−一一一工−−−−上一
一一一一工−−m−」以下、他の実施例を第2図に依っ
て説明する。
Table ``-11-Bottom-----Bottom 1111Bottom 11--] 1 switch 1 usage state 1 exclusive theory 1 inver 11 state 1
Output of 1 sum 1 to output 1 to--10--10--
--10--11+1 open "l"l 'l'l 'O' l
'l' 1+----10-----10-----10----
−-+1 open'l°1 "0°I "1'1"0" 1F
=−−−10−−−−10−−−−10−−−−11 closed
0'1 °1' l "1° 1'0" 1 toe-
10~−−−+−−−−+−−−−−11 closed “0゛1”
Other embodiments will be described below with reference to FIG. 2.

第1図と同一個所は同符合を用いる。実施例と異なる部
分は保守用記憶域の書き込み禁止用のスイッチ11を付
設した点にある。解読回路2がユーザ記憶域を検出する
際、即ち論理値“1゛の場合、スイッチ11の開閉に関
係無くインバート回路12で反転されアンド回路14は
不通状態となる。一方スイソチ10聞及び閉状態に応じ
てアンド回路10の出力は論理値“1°と“Ooとにな
り、オア回路はスイッチlが開状態の時のみ論理値“1
゛を出力し書き込みを許可する。即ち、スイッチ1の開
閉に依って、ユーザ記憶域の書き込みの許可或いは禁止
を行うこととなる。若し保守記憶域使用の場合、即ち論
理値′0゛を解読回路2が出力する時には逆にアンド回
路10がスイッチlの開閉に関係無く不通状態となる。
The same symbols are used for the same parts as in FIG. The difference from the embodiment is that a switch 11 for inhibiting writing of the maintenance storage area is provided. When the decoding circuit 2 detects the user storage area, that is, when the logical value is "1", it is inverted by the invert circuit 12 regardless of whether the switch 11 is open or closed, and the AND circuit 14 becomes disconnected. Accordingly, the output of the AND circuit 10 becomes the logical value "1°" and "Oo," and the OR circuit has the logical value "1°" only when the switch l is open.
Outputs ゛ and allows writing. That is, depending on whether the switch 1 is opened or closed, writing to the user storage area is permitted or prohibited. If the maintenance storage area is used, that is, when the decoding circuit 2 outputs the logical value '0', the AND circuit 10 becomes disconnected regardless of whether the switch 1 is opened or closed.

更に、アンド回路14はスイソチ11が閉状態の時のみ
、通状態となり論理値′l″を出力しオア回路14を介
して書き込みを許可する。即ち、スイッチ2を閉とする
と保守用の記憶域が書き込み可能となる。
Further, the AND circuit 14 becomes conductive only when the switch 11 is closed, outputs a logical value 'l'', and permits writing via the OR circuit 14. That is, when the switch 2 is closed, the storage area for maintenance is opened. becomes writable.

(f) 発明のす】果 以上、詳細に説明したように本発明の書き込み禁止の取
扱い方法は、保守を行う時に使用する保守記憶域のみ書
き込み禁止の解除が行えるものとなり、磁気装置を保守
する上で利点の多いものとなる。
(f) Achievements of the Invention As explained above in detail, the write-protection handling method of the present invention allows the write-protection to be canceled only in the maintenance storage area used when performing maintenance. It has many advantages.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の書き込み禁止の取扱い方法の一実施例
の回路図、第2図は本発明による他の実施例を示す回路
図である。 図に於いて、■と11はスイッチ、2は解読回路をそれ
ぞれ示す。
FIG. 1 is a circuit diagram showing one embodiment of the write protection handling method of the present invention, and FIG. 2 is a circuit diagram showing another embodiment of the present invention. In the figure, ■ and 11 indicate switches, and 2 indicates a decoding circuit, respectively.

Claims (1)

【特許請求の範囲】[Claims] 一般の記憶域と保守用の記憶域を有し、記憶域の書き込
み禁止機能を持つ磁気記憶装置に於いて、記憶すべきア
ドレスが一般の記憶域か保守用の記憶域かを判定する手
段と、保守用のプロテクト指示手段とを有し、該プロテ
クト指示手段によって、書き込み禁止が指示されたとき
に前記アドレスが一般の記憶域に対応するものであると
きは、其の書き込みを禁止することを特徴とする書き込
み禁止の取扱い方法。
A means for determining whether an address to be stored is a general storage area or a maintenance storage area in a magnetic storage device that has a general storage area and a maintenance storage area and has a write-protection function for the storage area. and protection instruction means for maintenance, and when write prohibition is instructed by the protect instruction means, if the address corresponds to a general storage area, writing to the address is prohibited. Features: How to handle write protection.
JP24685483A 1983-12-27 1983-12-27 Method for handling write inhibition Pending JPS60138780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24685483A JPS60138780A (en) 1983-12-27 1983-12-27 Method for handling write inhibition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24685483A JPS60138780A (en) 1983-12-27 1983-12-27 Method for handling write inhibition

Publications (1)

Publication Number Publication Date
JPS60138780A true JPS60138780A (en) 1985-07-23

Family

ID=17154699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24685483A Pending JPS60138780A (en) 1983-12-27 1983-12-27 Method for handling write inhibition

Country Status (1)

Country Link
JP (1) JPS60138780A (en)

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