JPS60137197A - Fixed connection system for channel - Google Patents

Abstract

PURPOSE:To prevent a fixed connection circuit from being disconnected owing to a transient fault by storing data necessary for fixed talking connections in a nonvolatile control means in a time-division digital electronic exchange. CONSTITUTION:Control memory for supplying readout addresses of switching memory 11 consists of volatile control memory 16 and nonvolatile control memory 17. Those read addresses are obtained by the output of address control memory 18. When an exchange makes a fixed connection between, for example, channels of time slots (l) and (k) on a PCM highway, data A and B in the time slots (k) and (l) are written in addresses (k) and (l) of the switching memory 11 in a write period; and an address AA is outputted from the memory 18 with the time slot (k) in a readout period and data B in the address (l) of the memory 11 is outputted to the time slot (k) and connected fixedly. Even when the contents of the memory 16 are rewritten, there is no influence exerted.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for connecting fixed telephone lines in a time-division digital electronic exchange.

When the communication path formed by the conventional exchange is used for purposes other than general communication, for example, when it is used as a remote control information transmission path for transmitting digital signals using voice band signals, etc.
A fixed communication path must be formed by a fixed connection.

As shown in FIG. 1, in a conventional time division switch, a plurality of subscribers 1 are each connected to a subscriber east line switch 3 via a 710 person circuit 2, and the output of the subscriber concentrator switch 3 is connected to a subscriber east line switch 3. is encoded by the encoder/decoder 6 and sent to the upstream PC
The output of the analog trunk 4 is input to the multiplexing circuit 7 through the M line PCMt, and the output of the analog trunk 4 is encoded by the encoder/combiner 6' and input to the multiplexing circuit 7 through the upstream PCM line PCMt. ! Ia% P CM t (Directly connected to the multiplexing circuit 7. The multiplexing circuit 7 converts signals input from a plurality of upstream PCM@path PCMt into PCM
The signals are multiplexed and arranged in the time slots of each channel of the highway HWY and input to the time division digital switch 8 through the PCM highway HWY. The time-division digital switch 8 performs a phase conversion operation under the control of the control memory 10, and the phase-converted signal is separated and outputted to a plurality of downlink PCM lines PCMr by a multiplexer 971@path 9. Each channel of the downlink PCM line PCMr is paired with each channel of the uplink PCM line PCMt to form a transmission/reception channel.

FIG. 2 is a diagram showing details of the time division digital switch 8 and read address control of the control memory 10. That is, the time division digital switch 8 has a switching memory 11, a selector (SEL) i3, and a counter (CN
T) consists of 14. Then, in the write cycle, by supplying a fixed-cycle cyclic address signal output from the counter 14 to the switching memory 11 via the selector 13, the data of each time slot (channel) on the PCM highway HWY is written one by one. In the next read cycle, the read address signal output from the control memory 10 is supplied to the switching memory 11 via the selector 13.
Phase conversion is performed by outputting the data of each channel written in the switching memory 11 to an arbitrary time slot. In the read cycle, the control memory 10 reads out the contents of the address specified by the output of the counter 14 supplied via the selector 13',
Enter and return to 3. At each address of the control memory 10,
Data D is written to the address indicated by the address signal A input via the selector 13' in the write cycle. For example, when the PCM highway HWY is n-multiplexed, the control memory 10 is an n-word structured memory as shown in FIG. Address data j is written to address i of the control memory 10 according to data D, and address data i is written to address j of the control memory 10.

In the conventional fixed communication path connection method, the initial setting section of the call processing program of the central control unit of the exchange writes the number of the time slot to be fixedly connected to the control memory IO, and
After that, I leave it as is. Therefore, in the conventional method described above, if the contents of the control memory 10 are rewritten due to a temporary failure such as disturbance of the write clock to the control memory 10 or noise, the fixedly connected communication path is disconnected. There is a drawback. Moreover, this disconnection of the fixed connection cannot be detected by the controller of the exchange, and even if it is detected, it is necessary to initialize the entire exchange in order to reset the fixed connection.

OBJECTS OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional drawbacks and to provide a fixed communication path connection system in which the fixed connection line is not disconnected due to a temporary failure.

Composition of the Invention The communication path fixed connection system of the present invention includes a nonvolatile control means in a control circuit that controls a read address of a time division digital switch in a time division digital electronic exchange, and the nonvolatile control means It is characterized by controlling the connection of fixed communication channels.

Embodiments of the Invention Next, the present invention will be described in detail with reference to the drawings.

FIG. 4 is a block diagram showing one embodiment of the present invention.

That is, a control memory for providing a read address of the switching memory 11 is composed of a volatile control memory 16 and a non-volatile control memory 17, and these read addresses are input via a selector (SEL) 19 in a read cycle. is given by the output of address control memory 18. When the PCM highway HWY has n time slots, the volatile control memory 16 is an n-word memory that can be read and written, and in the write cycle, the address signal A (not shown in the central control unit By writing address data D to the address indicated by ), data for time slot replacement of the PCM highway HWY is written. Non-volatile control memory 17 and address control memory 1
Reference numeral 8 denotes a read-only memory in which only prewritten data can be read, and these two constitute a "non-volatile control means for controlling the read address of the time division digital switch". If a fixed connection is required at the exchange, the following data is written in advance in the above two memories.

Now, as shown in Figure 5 (A), the PCM highway HW
Assuming that the time slot statement on Y and the channel of the time slot are fixedly connected, as shown in FIG. ) and write address control memory 18.
Write (AA) in the address and (AA+1) in the alternating address. Further, the same numerical value as the address is written in each of the other addresses of the address control memory 18.

Therefore, when the output of the counter 14 is other than k and a sentence, the output of the address control memory 18 is the same as the output of the counter 14, and when the output of the counter 14 is k, the output of the address control memory 18 is AA. Therefore, when the output of the counter 14 is a sentence, the output of the address control memory 18 is AA+1.

That is, in the write cycle, data A in the time slot of the input side PCM highway HWY is written to an address in the switching memory 11, data B in time slot 1 is written to an alternate address in the switching memory 11, and In the read cycle, by outputting AA from the address control memory 18 in a time slot, a statement is output from the nonvolatile control memory 17 and becomes the read address of the switching memory 11, and the switching memory 1
The data (B) stored at sentence address 1 is output to time slot lk. Similarly, data A in time slot l-k of the input PCM highway HWY is output to time slot i on the output side. That is, in the channel,
! 11 is fixedly connected.

In this embodiment, the nonvolatile control memory 17 and the address control memory 18 are read-only memories, and their contents are unchanged. Therefore, even if the contents of the volatile control memory 16 are rewritten due to disturbances in the control clock, noise, etc., the fixed connection control will not be affected and the fixed call will not be disconnected. Writing to the nonvolatile control memory 17 and the address control memory 18 can be done by storing in advance time slots and the like determined according to the situation. If a fixed connection is not required, the same numerical value as the address may be written in each word of the address control memory 18, or the address control memory 18 may be omitted.

Effects of the Invention As described in 2, in the present invention, a non-volatile control means is provided in the control circuit that controls the read address of the time-division digital switch, and the data necessary for the fixed telephone connection is transferred to the non-volatile control means. Since the configuration is such that fixed-line calls are not disconnected due to temporary failures, there is an advantage.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a conventional time division switch, Fig. 2 is a block diagram showing details of the time division digital switch and control memory of the above conventional example, and Fig. 3 is a block diagram showing the control memory of the above conventional example. Figure 4 shows an example of data written to
The figure is a block diagram showing one embodiment of the present invention, FIG. 5(A)
1 is a diagram showing a state in which the time slot 14 and k are fixedly connected in the above embodiment, and FIG. In the figure, l: subscriber, 2: subscriber circuit, 3: subscriber concentrator switch, 4: analog trunk, 5: digital transmission interface, 6: encoder/decoder, 7: multiplexing circuit, 8: time division digital Switch, 9: Multiplexing/demultiplexing circuit, 1o: Control memory, ll switching memory, 1
3, 19: Selector, 14: Counter, 16: Volatile control memory, 17: Non-volatile control memo 18 18: If
Ground control memory. Applicant NEC Co., Ltd. Agent Patent Attorney Toshimu Eguchi Sumizu Figure 1 Uha 114 Figure 1 Figure 5 (A)

Claims (1)

[Claims] In a time-division digital electronic exchange, within the control circuit that controls the read address of the time-division digital switch,
A telephone line fixed connection system characterized in that a non-volatile control means is provided and the connection of the fixed telephone line is controlled by the non-volatile control means.