JPS60136492A - Chrominance signal processor - Google Patents

Abstract

PURPOSE:To obtain a processor which is high in general-purpose use and allows demodulation of a low-band conversion chrominance signal by generating timing for separation of a color difference signal from the demodulation axis of the low-band conversion chrominance signal by a relatively simple digital circuit. CONSTITUTION:A low-band conversion chrominance signal (q) inputted from a terminal 1 is A/D-converted in timing of a clock (b) by an A/D convertor 5, and added to a code inversion circuit 6, where only a minus component among color different signal components is code-inverted in timing of a code inversion pulse (f), and supplied to latch circuits 7a and 7b. In the latch circuits 7a and 7b, color-difference signal separating pulses q1 and q2 are latched, and two color different signal data d1 and d2 are separated from said pulses. The color difference signal separating pulses q1 and q2 delay the code inverting pulse (f) by one clock through a flip-flop 14, and are generated through an exclusive OR circuit 15 and a flip-flop 16.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is a method for eliminating crosstalk from adjacent racks when reproducing a low frequency converted color signal recorded on a magnetic disk in a rotary head type VTR or the like. The phase of the low-frequency conversion color signal used as the direction v1 is changed by 90 in the opposite direction every 111 in adjacent tracks (hereinafter referred to as A track, F3+- rack).
There is a method in which the phase of the B i-rack is inverted every 11" for the A track (hereinafter referred to as the PS method), and a method in which the phase of the B i-rack is inverted every 11" (hereinafter referred to as the P I This invention relates to a color signal processing device that divides a low-pass conversion color signal recorded using a method (referred to as a method) into two color difference signals. .

Conventional configuration and its problems In a conventional rotary head type VTR, when recording and reproducing color video signals, a modulated luminance signal modulated by FIVI and a low carrier frequency fc converted into -b of lζ low In this case, in order to perform high-density recording without intervening guard bands between adjacent tracks, the modulated luminance signal is recorded on the magnetic tape by mixing it with the gamut conversion color signal. Then, regarding the low-frequency conversion color signal, a frequency interleave relationship is established between adjacent tracks. (The cPS method or the PI method is adopted.
S processing or 1) 1 processing is performed, and the low-pass converted color signal is shifted 1- or 1) during reproduction, returning the inverted phase to its original state, and roughly converting it to any high carrier frequency fsc (Ni-3
In the C method, it is necessary to convert the frequency to 3.58 M 11 Z ), and the method and 1.1. /,= means that the PI processing is performed in 4 rows to create a signal of low carrier frequency [C, and the low carrier frequency (signal of a and -3-frequency fsca') 33i! Vqr Irl
path t=-r m Iff, frequency fsc + f
Create a signal c, and roughly give this frequency fsc -1-
Multiplying the fcf7) signal and the low-frequency conversion color signal using the circuit, the carrier frequency is fsc -1fa-fo.
-fsc carrier color signal to 1! There is a way to do it, but is there a second way? 7, the modulation axis of the low frequency conversion color signal is PS'A:
Since it is considered to be a quadrature two-phase balanced modulation wave that has been subjected to PI processing, the low-pass conversion color signal is demodulated into two color difference signals, and after demodulation, quadrature two-phase balanced modulation is performed using a carrier wave with a reference frequency fsc. By doing so, it is possible to reduce the carrier color signal of a predetermined carrier frequency fsc to 1t.

The first method is conventional method 1. Although it is r,
Two multiplier circuits are required, and along with them, a bandpass filter is used to remove the lower sidebands 111 and 111, which generate the heavy noise, and the lower sideband η, respectively. Regarding the multiplication circuit, the required C1 circuit scale is E5 <'r
If you take advantage of the drawback of 'Niru' and use the second method as J3,
When demodulating the low frequency conversion a1), the circuit for creating the demodulation axis according to the PSh formula and the PI method and the demodulation axis are converted to -1-1i1 to 1 (region conversion The circuit that demodulates the color signal is new/
It is necessary for j.

The recording and playback method of 5t low frequency conversion express 8 is V l-18
.

Depending on the system, such as Beta or 8mm, PS processing or PI processing is performed, and the low frequency carrier frequency is also different. TV 1 for further recording and playback
There are also differences in PS processing, P1 processing, and low-frequency carrier frequencies depending on the system of the signal, such as the N1'' SC system and PAL system. As a signal recording/reproducing circuit, there is a tendency to change the circuit operation in response to the system switching signal, and to make the circuit more versatile and reduce cost, but the circuit size is large because it is compatible with each system. I liked the drawback of becoming...

OBJECTS OF THE INVENTION The present invention solves the drawbacks of the prior art as described in (1) above, and adopts the second method (1) as a method for reproducing low-frequency converted color signals (in the case of using a comparatively compact digital circuit). By creating the timing for color difference signal separation from the demodulation axis of the fU111 converted color signal, it is possible to demodulate the low frequency 1! The input terminal r for switching the 6-type switch is compatible with each of the above methods.
The porpose is to do.

Structure of the Invention In order to achieve the above object, the color signal processing device of the present invention comprises:
A conversion means for sample-holding, analogizing, and digitally converting a low-frequency conversion color signal that has been subjected to phase shift or phase inversion processing using a clock having a frequency four times as high as the low-frequency carrier frequency; The digital data from the conversion means is inverted by ↑90 along the demodulation axis of the low frequency conversion color signal,
'Cf width 1, and a pulse generating means that generates a pulse for color Z signal separation from the pulse for sign inverting the digital data and the clock and supplies it to the processing means, The configuration is such that the low frequency conversion color 16 months is separated into two color difference signal data.

According to this configuration, since the pulse for separating color difference signal data is created from the pulse for sign inverting the digital data, it is possible to generate a low frequency converted color signal using a relatively slow and simple digital circuit. It is possible to restore two color difference signal data, and by adding a small number of circuits, it is possible to support both PS and PI processing.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

Fig. 1 shows a circuit J of a color signal processing device according to an embodiment of the present invention, which separates a low frequency converted color signal subjected to PSS processing into two color difference signal data. is a solid diagram of the low frequency variable IIA color signal supplied to the circuit of Fig. 1,
FIG. 3 is a diagram of signal waveforms at various parts in the circuit of FIG. 1.

In FIG. 1, 1 is an input terminal to which a low-frequency conversion color signal q is input, 2 is an input terminal to which a sunset signal b that is four times the low-frequency conversion carrier frequency is input, and 3 is an input terminal for △1~rack and 131- 4 is a terminal to which a field discrimination signal i having a logical value of 1 and 1- is inverted is input, and a terminal 4 is input to a horizontal synchronizing pulse h. First, the low frequency conversion color signal MQ inputted from the input terminal -7 - terminal 1 is converted from analog to digital by the A/D converter 5 at the timing of the clock b inputted from the input terminal 2. Low-pass conversion color signal @q is shown in Figure 2. J: R-Y component of sea urchin color difference signal 0
The B-Y component 0 has a vectorial phase of 90°, and clock/71) is, for example, the horizontal synchronizing pulse hJ'3J
: and low-frequency conversion burst by the PLI circuit, and in a steady state, the ΔD conversion output data C becomes repeated data of color difference signal components p, o, -p, -o as shown in the timing of Fig. 3. It's like a lock. Next, the converted A/D conversion output data C is changed to -p by the sign inversion circuit 6 according to the timing of the sign inversion pulse f.
, -o part only is sign inverted, to Create 4-phase pulses shifted by 1 clock each in register 10, and transfer the data to register 13 by 1 clock.
This can be obtained by switching to 1-1 angle and outputting. The switching of the sign inversion pulse f is performed by creating a signal j by latching the field discrimination signal 1 with the flipflop 11 at the falling edge of the horizontal synchronization pulse h, and then switching the horizontal synchronization pulse h from 1 to the up/down counter 12. The up/down operation is switched by the # distribution signal j, and the output QA of this up/down counter 12 is Q8.
This is done by According to the above circuit diagram, the field discrimination signal i of the sign-inverted pulse f is logic I! J! In the case of +11-1, the phase advances by one clock of clock b every day,
If field discrimination signal 1 is logical value 1-, 1 every 1H
This results in a clock delay, and sign inversion along the sampling demodulation axis is performed. Further, the exclusive OR circuit 15 creates an exclusive OR of the sign-inverted pulse f with a signal that is delayed by one clock of the clock h by the flip 70 block 14. The output of the exclusive OR circuit 15 is latched by the flip 70 tab 16, and the two color difference signal data d1. d2 zero-order hold and color difference signal separation pulse 01. (12).The A/D converted data that has passed through the sign inversion circuit 6 is supplied with the color difference signal separation pulse Q1.
Based on the signal g2, the signal is latched by the latch circuits 7a and 7h, respectively, and separated into two color difference signal data di and d2. This color difference signal data d1
．． Since d2 has a part that has the other color difference signal data due to timing, it is different from the other color difference signal data in terms of timing.
Then, the signal is further wrapped and separated into usable color difference signal components p or 0, and the color difference signal data e1, 02 are obtained.

In the waveforms of each part in FIG.
(2H) and the timing of the burst period (2H) in the next horizontal period, where the low frequency carrier frequency fc of the low frequency conversion color signal q is set to an integral multiple of 1/2 of the horizontal synchronization frequency fs. Mr. Lee 1 and conversion color confidence Shizuq are 11
-1st and 2nd (I) The phase of the S processing is shifted by 90°, and the phase of the low-frequency conversion burst r is similarly shifted. Furthermore, two color difference signal data e1.
Since c2 is obtained at 2rc which is twice the low carrier frequency fc, for one color difference signal data, the horizontal synchronizing pulse h
Based on 1H and 2H, the sampling point is 1.
80° -10- Phase jino i~ [t, f-Yu is discontinuous and 1 no. For this reason, the circuit C of this embodiment uses a zero-order hold filter to interpolate the data of the previous sampling point as the intermediate data of the sampling points, so that 8 data of each color difference are continuous and 111. Once the data output timing is aligned, the subsequent processing is done ().

In the above explanation, the low-frequency conversion color signal (
1 to 2 colors, i Kui: No. 1 data (! 1, (
Although we have described the case where the shift 1-register 10 in FIG. ) is replaced with an inverter 17 that outputs two pulses, a 4-frequency wave of 4 and an inverted output of No. 174 j adds an OR circuit 19 that inhibits the horizontal synchronizing pulse h input to the clock input of the flip-flop 18, which creates a frequency-divided wave of the immediate value 1 - the horizontal synchronizing pulse 1], and generates the field discrimination signal i. The sign of the pulse is inverted by 11-1175. By operating so that the output is 1" continuously, the PS
Color difference signal data 81.02 similar to that in the processing is 1q. Note that 20 is a data filler. Also, 1) In this case, the low carrier frequency is water) 11101191
The frequency is set to be an odd multiple of 1/4 of I, and P
As in the case of S processing, when horizontal synchronization pulse h is set to standard, the 1 non-pulling point is 180° between 1H and 21''.
Phase Gino 1~, 4 non-pull is not good! Therefore, data in the middle of the sampling points is interpolated using zero-order hold, and the sampling frequency fs of the color difference signal data is continuous at four times the low carrier frequency fc, and the data is an integer multiple of fl,I. is being converted to . Above, we have discussed the case of a low-frequency conversion color signal with an 11-1 correlation, such as the case where the carrier color signal PS of the NTSC system and the recording/reproduction 1 node of the PI system, but the J: sea urchin of the PAL system When there is a 21-1 correlation, as is clear from the above explanation, the sampling frequency of the six color difference signal data after interpolating the data between the sampling points is four times the low carrier frequency and f,/2. The output timings of data per odd number times -12- and 21-1 are aligned.

As described above, according to this embodiment, in both the PS processing and [) 1 processing, a flip 70 block is generated from the sign-inverted pulse f along the sampling demodulation axis and the four times the low carrier frequency beam lock b. 14.16 and an exclusive OR circuit 15, the color difference signal separation pulses Q1. AD conversion data k after creating Q2 and passing through the sign inversion circuit 6
[Repetition data of color difference signal data p and 0] is applied to the color difference signal separation pulse Q1. Latch circuits 7a, 7 by Q2
By separating the data of the p component and the O component at step b, the low-pass converted color signal q is converted into two color difference signal data di.

It is separated into d2.

Furthermore, as is clear from the explanation of the operations of PStB processing and PI processing in this embodiment, the only difference between PS processing and Pl processing is that the method of creating the sign-inverted pulse f is slightly different; The circuit that creates t is used for PS processing, etc.
It has two circuits, one for I processing, and can support both PS and PI types by switching the -13= generation circuit for the sign-inverted pulse f using an external switching signal.

FIG. 5 is a circuit diagram of a color signal processing device configured to be compatible with both PS and PI systems, and 22 is a sign inversion pulse generation circuit for PS processing, and the shift register 10 in the circuit diagram of FIG. , an up/down counter 12, and a data selector 13.It is a rotating pulse generation circuit including an up/down counter 12, and a data selector 13.
, an inverter 17, and a data selector 20.

In this embodiment, in addition to having two sign-inverted pulse generating circuits, a sign-inverted pulse generating circuit 22 for PS processing and a sign-inverted pulse generating circuit 23 for PI processing, a system switching signal input terminal 21 and a signal switching signal input terminal 21 are provided. It has circuit 24.25 etc.
The system switching signal @S allows the signal switching circuit 25 to switch between the sign inversion pulse ``PS'' and the sign inversion pulse 2 for S processing. It is also supplied to the creation circuits 22 and 23, and the switching signal @S stops the operation of the circuit of the Nari type method, preventing an increase in power consumption. Since the low-band carrier frequency contributes to I processing, the clock 1) with a quadrupled low-band carrier frequency is also switched by the signal switching circuit, and for example, the low-bIA carrier frequency 41.
It is sufficient to input the clock b2 of 4 times the low frequency carrier frequency for PI processing from the input terminal 2b by manually inputting the clock b1 of 5 [1 clock b1]. The other circuits in FIG. 5 are the same as those in FIGS. 1 and 4.

In the first installation explanation, we explained the case of switching between I) S processing and PI processing, but it is also possible to add a switching signal input terminal and a block input terminal, and add a sign inversion pulse generation circuit to support various recording and playback methods. By doing so, it is also possible to realize a color signal processing device that can handle a method of 2 seconds or more even in a 1-no.

Furthermore, in order to obtain a carrier color signal with a carrier frequency fsc using the color signal processing circuit configured as described above, two color difference signal data are converted into an ablog value using a D/A converter, and then quadrature two-phase balanced modulation is performed. -15- Alternatively, there is a method in which the obtained color difference data is converted into carrier color signal data by a digital color encoder, and then 1]/△ is converted and the carrier signal is converted to 1q. , 77S [1G signal 8J, or 4
t) The conveyed fish signal 8 can be removed using a -1 stroke component (because it is shifted by 1/2 of the horizontal synchronization frequency with respect to the original No. 43) type filter. PS processing,
The effects of P1 treatment are not lost.

Effects of the Invention As explained below, according to the present invention, [)S or P
When I processing is performed and the IC low frequency converted color signal is A/D converted at 4 times the low frequency carrier frequency and demodulated into two color difference signals, the signal is converted from the sign inverted pulse along the demodulation axis. Since a color difference signal separation pulse is created to separate the Δ/D converted data after the signal inversion process has been performed, the low frequency converted color signal is divided into two color difference signal data using an internal digital circuit. It can be demodulated, and color signal processing can be easily purchased digitally and at lower prices. Also, a small amount (
It is possible to support both ps and pi processing using the adder circuit, and if it is configured and integrated to support various systems using switching inputs, the same circuit can handle each system, making it a general-purpose device. It is possible to provide a color signal processing circuit with high performance and low cost.

[Brief explanation of the drawing]

FIG. 1 shows color signal processing vi, w in an embodiment of the present invention.
Figure 2 is a vector diagram of the low frequency conversion color signal, Figure 3 is a signal waveform diagram of each part of the circuit shown in Figure 1, and Figure 4 is a circuit block diagram of the circuit shown in Figure 1.
5 and 5 are circuit block diagrams of a color signal processing device in another embodiment of the present invention, respectively. 5... A/D converter, 6... Sign inversion circuit, 7a. 7b--latch circuit, 8a, 8b, 11.1
4.16.18... Flip-flop, 9... Frequency divider, 10... Shift register, 12... Up/down counter, 13.20... Data selector, 15.
・・Exclusive OR circuit, 17・・Inverter, 19・
...Logic product circuit, 22.23 ... Sign inversion pulse generation circuit, 24.25 ... Signal switching circuit agent Morimoto
Yoshihiro - 17 - Fig. 2 1 Tsumugi Fig. 3 Procedural amendment (marshal), J-11, Case indication Child-2 1981 Patent Application No. 249404 April 2, Title of invention Color signal processing device 3 , Relationship with the case of the person making the amendment Patent applicant name (582) Matsushita Electric Industrial Co., Ltd. Showa Year/Month
Day 6, number of inventions increased by amendment 7, subject of amendment ■ Grasping of detailed explanation of inventions in Book 1 of Meiwa (υ page 14, line 7 to page 8 line ``Including data selector 13 In the rotation pulse generation circuit,
'' is corrected to ``The circuit configuration includes a data selector 13, and 23 is a sign-inverted pulse generating circuit for PI processing.'' Book (2), page 14, line 16 [sign-inverted pulse The text "j" in "f2" is corrected to "the sign-inverted pulse f, and the sign-inverted pulse f2 for PI processing." (3) On page 16, line 18, correct the phrase ``digital purchase.'' (2)

Claims (1)

[Claims] 1. A low frequency converted color signal that has been subjected to phase shift or phase inversion processing has a frequency four times as high as the low frequency carrier frequency [
Conversion means that performs ripple hold and analog-to-digital conversion in one step, and sign-inverting the digital data from this conversion means along the demodulation axis of the low-frequency conversion color signal.
processing means for performing color difference signal separation, and pulse generation means for creating a pulse for color difference signal separation from the pulse for sign inverting the digital data and the clock and supplying it to the processing means; A color signal processing device configured to separate a signal into two color difference signal data. 2. The converting means uses a switching signal for distinguishing between various systems to convert the clock (even four times the frequency of the low 111 carrier frequency) to a frequency corresponding to each process. The pulse generating means generates a pulse for inverting the sign of the digital data.
(For PS processing and P
By switching the sign inversion pulse generation circuit according to the switching signal,
A color 4'':S5'j processing apparatus according to claim 1, which is configured to handle both S processing and [)1 processing.