JPS60136280A - Manufacture of buried type semiconductor laser - Google Patents

Abstract

PURPOSE:To enable the inhibition of diffusion leakage current and the inhibition of turn-ON of a P/N reverse junction in the high output action of the titled laser by a method wherein a current diffusion preventing region is provided in adjacency to a buried mesa stripe. CONSTITUTION:The Fig (a) shows the state that a groove is provided by etching after a photoresist 9 is provided on an N type InP substrate 1. The Fig (b) shows the state that an N type InP buffer layer 1', an InGaAsP active layer 2, a P type InP clad layer 3, and a P type InGaAsP ohmic contact layer 4 are crystal-grown after removal of the photoresist 9. The state of crystal growth at this time shows crystal growth with a thickness of the degree that the trace of the groove provided in the Fig (a) remains. The Fig (c) shows the state that mesa etching is carried out with an etchant having no crystal selectivity to InGaAsP and InP. The etched state at this time shows an etching deep on both sides because of the trace of the groove provided first and shallow at the other part. Successively, a P type InP buried layer 5, an N type InP blocking layer 6, and a P type or N type InGaAsP crystal protection layer 7 are grown.

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to a method for manufacturing a buried type semiconductor laser, and relates to a method for manufacturing a buried type semiconductor laser with a 5% improvement in high output characteristics and output efficiency. Regarding the method.

[Prior art and its problems]

The buried Milli semiconductor laser has a stable single-transverse mode,
It has advantages such as low oscillation threshold current. An embedded semiconductor laser is a device in which a mesa stripe of about 1 μm is provided on a double heterojunction structure Ueno 1-, and the mesa stripe is embedded with a clad crystal provided with a P/N reverse junction or the like. According to this structure, optical confinement is possible in both the vertical and horizontal directions, and stable single-transverse mode oscillation can be obtained. Furthermore, since current confinement can be achieved by the buried layer', a low oscillation threshold current can also be obtained.

Figure-1 shows a schematic cross-sectional view of the laser implanted in four adult cows. The part 2 in the figure is active 1 storage, and l.

G) is embedded by a cladding crystal of 3.5.

However, in such a conventional buried semiconductor laser, a part of the current injected from the ohmic contact layer 4 flows into the cladding layer 5, diffuses through the layer 5, and spreads, resulting in a leakage α current. It often happened.

The leakage current (indicated by the broken line arrow in the figure) causes problems such as a decrease in efficiency during high-output operation of the semiconductor laser and the tendency to turn on the P/'N reverse junction of the buried semiconductor. This made high-power laser operation difficult.

[Purpose of the invention]

The invention was made in consideration of these drawbacks of the prior art, and is aimed at suppressing the diffusion leakage α flow in high-power operation of an embedded semiconductor laser.

It is an object of the present invention to provide a method for manufacturing a buried semiconductor laser that makes it possible to suppress turn-on due to P/N reverse coupling.

[Summary of the invention]

A feature of the present invention is that a current diffusion prevention region is provided adjacent to the buried mesa stripe.

FIG. 82 shows a schematic cross-sectional view of the present invention.

In this figure, a region 8 is a current diffusion prevention region.

As in FIG. 1, the leakage electric current 'a (indicated by the broken line arrow) that has flowed into the layer 5 cannot diffuse and spread outside the region 8 because of the electric field applied to the entire confectionery. This is because if it tries to spread outside the region 8, it must flow against the electric field (the solid line arrow in the figure indicates the direction of the electric field).

Thus, according to the present invention, it is possible to suppress the diffusion and spread of leakage current, and it is possible to prevent a decrease in efficiency and turn-on of the P/N reverse junction during high output operation.

〔Effect of the invention〕

According to the present invention, the P/N due to the expansion of the leak α flow
This has the effect of preventing reverse junction turn-on phenomena and facilitating high-output operation of a buried semiconductor laser.

[Embodiments of the invention]

Examples of persimmons according to the present invention will be explained below with reference to the drawings. Here, the case of InGaAsP active 1i type crystal will be explained.

Figure 31 shows the manufacturing process of one example of the present invention. The fat diagram shows a state in which a photoresist 9 is provided on an N-type 1nP substrate 1 and a groove is formed by etching. .Remove the photoresist 9 in figure Fb1 and
nP′<nfy layer 1′, InGaAsP activity 1i
2. , P-type InP cladding layer 3. P-type InGaAs
This is a state in which the P ohmic contact layer 4 has been crystal-grown.

In this normal crystal growth state, (crystal growth 2 is carried out to a thickness that leaves traces of the grooves provided in figure a1.
20 [μm] and the groove depth is 1 to 2 [μm], the crystal growth thickness may be 2 to 2.5 [μm]. fC1 diagram is InG
This is the result of mesa etching performed using an etching solution 1 that does not have crystal selectivity for aAsP and InP, such as Br-methanol.

At this time, the etching state is such that it is deep etched on both sides of the mesa stripe due to the traces of the grooves that were initially provided, and shallowly etched on other parts.

Next, a P-type InP buried layer 5. N-type InP blocking layer6. The P-type or N-type InGaAsP crystal protective layer 7 is eroded by 5y. This state is the fd1 diagram, which is similar to that in FIG. 2.

Next, an example in which a P-type impurity diffusion layer or a crystal growth layer is provided on a first N-type InP substrate will be described.

FIG. 4 is a diagram showing the manufacturing process of this embodiment.

The fat diagram shows a P-type crystal layer 11 provided on an N-type InP substrate.

Next, a photoresist 9 is provided to form a groove deeper than 111 before. Figure fb1 shows a state where crystal growth has been performed in the same way as Figure 3 fb1.

(Figure c1 shows a mesa-etched state similar to figure 3 te1, but the difference from figure 3 is that the etching was performed to leave 11 P-type layers. fd1
The figure shows a state in which buried crystal growth similar to that in FIG. 3 fd1 has been performed.

The advantage of the embodiment shown in FIG. 4 is that in the case of the embodiment shown in FIG. 3, the growth of the buried layer 5 may be interrupted, whereas in FIG. When a state is reached in which crystal growth is uniformly constrained by the P layer of .

The above is an example in which grooves are first formed in the InP substrate,
An example in which no grooves are provided will first be described below.

FIG. 5 shows an example of this, and (a) shows an N-type InP buffer layer 1' and an InGaA layer on an N-type InP substrate 1.
sP active 12', P-type InP cladding layer 3. P-type InG
Crystal aAsP ohmic contact 1ψ4? After evaporation of 8 i 0° 10, a photoresist 9 is applied to form a sin.

This is the state where stripe etching has been performed. Next, Si
n, a photoresist 9' having a window wider than the stripe mask is provided parallel to the stripe mask, and Br-
Etching that does not reach the active layer is performed using an amorphous selective etching solution such as methanol (Figure b).

Thereafter, the photoresist 9' is removed and etching is performed again using an etching solution such as 3r-methanol. At this time, the active layer is deeper in the windows on both sides of the mesa stripe, and shallower than the active layer in other parts.

Then, the active layer other than the mesa stripe is etched to be deeper than the ohmic contact layer 4 (Fig. Etching is continued until the surface is completely etched (Figure (d)).

After this, if buried crystal growth similar to the embodiments of FIGS. 3 and 4 is performed, the result will be as shown in FIG. 01, and the same state as in FIG. 2.

In addition, in Fig. 5 (at state, P type impurity, for example, Z
If n, Cd, etc. are diffused deeper than the active layer, the same effect as that of the embodiment shown in FIG. 3 in the embodiment 1 of FIG. can. This embodiment is shown in FIG.

In each of the above embodiments, an N-type InP substrate was used.
Although this has been described, a P-type InP substrate may be used, and the P/N of each crystal j- may be reversed. Other parameters such as the carrier concentration and thickness of the crystal/packing are not specified, but these may be adjusted according to each case.

In short, the present invention is capable of various modifications without departing from the spirit of the invention.

[Brief explanation of the drawing]

FIG. 1 is a plan view of a configuration 1lf showing an embedded semiconductor laser, and FIGS. 2 to 6 are diagrams for explaining a method of manufacturing an embedded semiconductor laser according to an embodiment of the present invention. 1... Semiconductor substrate and buffer single layer (N), 2...
Active layer, 3... Cladding % (P), 4... Ohmic contact 19 (P), 5... Buried layer (P), 6... Blocking layer (N), 7... Protection 8... Diffusion prevention region, 9... Photoresist, 10... 5f02 or Si3N4 mask, 11... P type layer (layer by diffusion or crystallization growth). Representative Patent Attorney Noriyuki Chika (and 1 other person) Figure 1 Figure 2 Figure 3 (α) (b) (C) Figure 8 432 <d) Figure 4 (Mu) (Mu) (c) Fig. 4 32 (d-) Fig. 5 (mu) (l:)) (C>

Claims (4)

[Claims] (1) Forming a groove wider than the mesa width of a mesa stripe to be formed later on a first conductivity type semiconductor substrate, and forming a semiconductor multilayer film including at least an active layer on the semiconductor substrate so that traces of the groove are formed. a step of growing a crystal to a thickness within the remaining range; a step of forming a stripe mask parallel to the groove within the trace of the groove to form a mesa stripe by etching deeper than the active layer; 1. A method for manufacturing a buried semiconductor laser, comprising the step of performing buried growth using a buried layer including a type cladding layer and a first conductivity type cladding layer. (2) The semiconductor substrate of the first conductivity type is provided with an impurity diffusion layer or a crystallization layer of the second conductivity type, which is shallower than the depth of the trench to be formed. A method for manufacturing an embedded semiconductor laser as described in Section 1. (3) The constituent crystal of the semiconductor laser is In GaAs
P/InP system, with InG on @1 conductivity type InP substrate.
A step of crystal-growing an InGaAsP/InP multilayer pattern including an aAsP active layer, a step of providing a stripe mask made of an oxide film or a nitride film, and a photo-etching process having a window wider than the stripe mask and parallel to the stripe mask around the stripe mask. a step of providing a resist;
A process of etching to a depth that does not reach the active layer using an etching solution that does not have crystal selectivity for InGaAsP and InP, and a step of removing the photoresist and etching adjacent to the stripe mask using an etching solution that does not have crystal selectivity for InGaAsP and InP. In the area where the etching is to be performed, the etching process is performed to remove the mesa stripe (in other areas, the etching process is performed so as to stop in the InP cladding layer on the active layer, and the active layer in the electric area other than under the stripe mask is etched). In until it buds out
A step of etching using a selective etching solution for P, and a step of growing the mesa stripe under the corresponding ridge stripe mask with a buried crystal layer containing at least InP of the second conductivity type and InP of the first conductivity type. A method of manufacturing an embedded semiconductor laser, comprising: (4) A step of diffusing an impurity of the second conductivity type deeper than the active layer is included between the step of providing a stripe mask made of an oxide film or a nitride film and the step of providing a photoresist. 3. A method for manufacturing a built-in semiconductor laser according to item 3.