JPS60133780A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPS60133780A
JPS60133780A JP24126583A JP24126583A JPS60133780A JP S60133780 A JPS60133780 A JP S60133780A JP 24126583 A JP24126583 A JP 24126583A JP 24126583 A JP24126583 A JP 24126583A JP S60133780 A JPS60133780 A JP S60133780A
Authority
JP
Japan
Prior art keywords
inp
layers
layer
phase
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24126583A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Kitamura
北村 光弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP24126583A priority Critical patent/JPS60133780A/en
Publication of JPS60133780A publication Critical patent/JPS60133780A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/40Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H01S5/4031Edge-emitting structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching
    • H01S5/2277Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To improve the reproducibility of element characteristics by improving the phase interference of active layers by a method wherein the gaps of the buried active layers arranged in a lateral direction are filled with semiconductor layers having a larger refractive index than clad layers sandwitching the top and bottom of the active layers. CONSTITUTION:An N-InP buffer layer 2, the active layers 3, and the P-InP clad layers 4 are laminated on an N-InP substrate 1. Next, mesa stripes 5, etching grooves 6 and 7, and current block layers 8 and 9 are formed by etching a wafer of such a double hetero structure. Then, except the upper surfaces of the layers 5, a P-InP buries layer 10 and an electrode layer 11 are laminated. Excellent phase synchronization can be obtained by forming the layer 8 of a semiconductor having a refractive index larger than InP.

Description

【発明の詳細な説明】 本発明は大出力動作が可能な埋め込みへテロ構造の位相
同期型半導体レーザ、特に横方向に配置された埋め込み
活性層の間を、活性層の上下をはさむクラッド層よりも
屈折率の大きな半導体層で埋め込むことによって、個々
の活性層間の位相干渉性が向上し、それによって゛素子
特性の再現性。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buried heterostructure phase-locked semiconductor laser capable of high-output operation, and in particular, to a buried heterostructure phase-locked semiconductor laser which is capable of high output operation. By embedding the active layer with a semiconductor layer with a high refractive index, the phase interference between the individual active layers improves, thereby improving the reproducibility of device characteristics.

製造歩留シが大幅に向上した位相同期型埋め込み構造半
導体レーザに関する。
The present invention relates to a phase-locked buried structure semiconductor laser with significantly improved manufacturing yield.

位相同期型(Phase Locked )半導体レー
ザが最近急速に関心を高めている。これは空間的には独
立なコヒーレント光源を外部共振器、光のオーバーラツ
プ、結合ストライプの導入等によシ位相結合させて動作
するものである。横方向に本来独立なコヒーレント光源
を位相同期させるので、通常の半導体レーザに比べてき
わめて大きな光出力を取シ出せると同時に00位相変位
の動作時には非常に狭いビーム放射角で発振するので集
光も容易であシ、光情報処理の分野のみならず長距離光
通信用光源としても期待されている。そのような位相同
期型半導体レーザの一例としてカリフォルニア工科大学
のチェノ(T、R,Chen)氏らは1983年7月発
行のアプライド・フィジックス・レターズ(Appli
ed Physics Lettsrs )語用43巻
、第2号。
Recently, interest in phase-locked semiconductor lasers has rapidly increased. This operates by phase-coupling spatially independent coherent light sources using external resonators, optical overlap, introduction of coupling stripes, etc. Since coherent light sources that are originally independent in the lateral direction are phase-synchronized, it is possible to emit an extremely large optical output compared to ordinary semiconductor lasers, and at the same time, when operating with a 00 phase displacement, the beam oscillates at a very narrow beam radiation angle, making it possible to focus light. It is easy to use and is expected to be used not only in the field of optical information processing but also as a light source for long-distance optical communications. As an example of such a phase-locked semiconductor laser, T. R. Chen et al.
ed Physics Lettsrs) Pragmatics Volume 43, No. 2.

第136頁から137頁にわたって回折結合を利用した
位相同期型InGaAsP / InP半導体レーザを
報告している。この半導体レーザはn−InP基板上に
n−InPバッファ層、 InGaAsP活性層、p−
InPクラッド層、p+−InP電極層を順次積層させ
たのち、P−InP層までエツチングを行ない、その部
分での電極抵抗が高くなることを利用して、幅3μm1
間かく2μmのストライプレーザを形成した素子中央部
分(長さ100μm)、および個々のレーザビームが回
折しあい、光波混合をおこさせる出力領域(長さ50−
100μm)より成るものである、チェン氏らはこのよ
うな構造の位相同期型半導体レーザを開発し、素子長2
50μm、50μm幅、10個のレーザから成るレーザ
アレイにおいて室温パルスでの発振しきい値電流200
mA、横方向ビーム放射角3°、最大パルス出力210
mWという特性を得た。しかしながらチェン氏らの位相
同期型レーザにおいては活性層は平坦に広がった構造の
ものであるため横方向への活性層内でのキャリアもれも
大きく、発揚しきい値電流があ−1シ小さくならず、効
率も悪い。したがってあまシ大きな光出力が得られない
という欠点があった。しかも出力領域は基本的には幅5
0μmのストライブ電極構造レーザになっているので、
出力領域における位相条件と10個のレーザアレイから
成る中火領域における位相条件が素子長、膜厚パラメー
タ等によって倣妙に影響されることになり、素子特性の
再現性、製造歩留りが悪かった。
From pages 136 to 137, a phase-locked InGaAsP/InP semiconductor laser using diffraction coupling is reported. This semiconductor laser has an n-InP buffer layer, an InGaAsP active layer, and a p-InP substrate on an n-InP substrate.
After sequentially stacking the InP cladding layer and the p+-InP electrode layer, etching is performed up to the P-InP layer, and by taking advantage of the high electrode resistance at that part, a width of 3 μm1 is formed.
The central part of the element (length 100 μm) has a striped laser of 2 μm in width, and the output region (length 50 μm) where individual laser beams diffract each other and cause light wave mixing.
Chen et al. developed a phase-locked semiconductor laser with such a structure, and the element length was 2.
Laser array of 50 μm, 50 μm width, and 10 lasers has an oscillation threshold current of 200 at room temperature pulses.
mA, lateral beam radiation angle 3°, maximum pulse power 210
A characteristic of mW was obtained. However, in Chen et al.'s phase-locked laser, the active layer has a flat and spread structure, so there is a large carrier leakage in the active layer in the lateral direction, and the launch threshold current is -1 It doesn't work, and it's not efficient. Therefore, there was a drawback that a relatively large light output could not be obtained. Moreover, the output area is basically 5 in width.
Since it is a laser with a 0μm stripe electrode structure,
The phase conditions in the output region and the phase conditions in the medium heat region consisting of 10 laser arrays were affected by the device length, film thickness parameters, etc., resulting in poor reproducibility of device characteristics and poor manufacturing yield.

以上のような欠点を除くにはキャリアもれも少なく電流
閉じ込めの有効な埋め込み構造レーザ(BH−LD)に
よって構成される位相同期型半導体レーザアレイを構成
すればよいが、そのままでは個々のBH−LDの活性層
間かくを十分に狭くしないと良好な位相同期が得られな
い。
In order to eliminate the above-mentioned drawbacks, it is possible to construct a phase-locked semiconductor laser array composed of buried structure lasers (BH-LDs) with less carrier leakage and effective current confinement. Good phase synchronization cannot be obtained unless the spacing between the active layers of the LD is made sufficiently narrow.

本発明の目的は従来例におけるような欠点を除き、大出
力を得ることが可能で、素子特性の再現性、製造歩留り
が大幅に向上した位相同期型BH−LDアレイを提供す
ることにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a phase-locked BH-LD array that eliminates the drawbacks of the conventional example, can obtain a large output, and has significantly improved reproducibility of device characteristics and manufacturing yield.

本発明による半導体レーザの構成は、半導体基板上に活
性層の周囲が、前記活性層よシもエネルギーギャップが
大きく、かつ屈折率の小さな半導体層でおおわれた埋め
込みへテロ構造を複数個備え、隣りあう前記活性層の間
に、前記活性層の上下をはさむ半導体層よりも屈折率の
大きな半導体層が形成されていることを特徴としている
。このように本発明は、活性層と埋め込み層との屈折率
差が小さくなっているので活性層間隔を小さくしなくと
も良好な位相同期が得られる利点がある。
The structure of the semiconductor laser according to the present invention includes a plurality of buried heterostructures on a semiconductor substrate surrounding an active layer covered with a semiconductor layer having a large energy gap and a small refractive index compared to the active layer. The semiconductor device is characterized in that a semiconductor layer having a higher refractive index than the semiconductor layers sandwiching the active layer above and below is formed between the active layers that meet each other. As described above, the present invention has the advantage that good phase synchronization can be obtained without reducing the active layer spacing because the refractive index difference between the active layer and the buried layer is small.

以下実施例を示す図面を用いて本発明をよシ詳細に説明
する。
The present invention will be explained in detail below using drawings showing embodiments.

図は本発明の一実施例である位相同期型BH−LDアレ
イの斜視図を示すものである。このような素子を得るに
はまず(100)面方位を有するn−InP基板1上に
n InPバッファ層2を厚さ5μm。
The figure shows a perspective view of a phase-locked BH-LD array that is an embodiment of the present invention. To obtain such a device, first, an n-InP buffer layer 2 is formed to a thickness of 5 μm on an n-InP substrate 1 having a (100) plane orientation.

発光波長1.3μm相当のノンドープIn(1,71G
ao、BA%61PO180活性層3を厚さ015μm
、pInPクラッド層4を厚さ1μm順次積層する。こ
のようなダブルへテロ構造(DH)半導体のウェファを
エッチンサストライプ5の中間のエツチング溝6は幅3
μm。
Non-doped In (1,71G) with an emission wavelength of 1.3μm
ao, BA%61PO180 active layer 3 with a thickness of 015 μm
, pInP cladding layers 4 are sequentially stacked to a thickness of 1 μm. In such a double heterostructure (DH) semiconductor wafer, the etching groove 6 in the middle of the etching stripe 5 has a width of 3.
μm.

深さ3μm9位相同期アレイの両わきのエツチング溝7
は幅10μmとし、位相同期BH−LDアレイの外側に
光がしみ出してそこで吸収損失を牌 受けるのを坊ぐようにしだ。メサストライプ5はいずれ
も活性層30部分で幅1.5μmとした。ここでは簡単
のため5個のBH−LDよ構成る位相同期レーザを示し
ているが、よ)高出力をねらうためにはさらにその数を
増やせばよい。その場合でもエツチング後の埋め込み成
長工程も、エピタキシャル成長の条件を多少選ぶことに
よシ十分良好な素子が得られている。以上のようにメサ
エッチングを行なったDHウェファに2回目のLPE成
長において発光波長約0.97μmに相当するInPに
近い組成のp−In196”0.04A80.10PO
,90電流ブロック層8. n−InP電流電流ブタ2
2層9ずれもメサストライプ5の上面のみを除いて、さ
らにp−InP埋め込み層101発光波長1.2μmに
相当するp”0.78Ga0.22”0.48P0.5
2電極層11を全面にわたって積層させる。P ”0.
96”0.04”Q、10PO,9G電流ブロック層8
およびn−InP電流プロ、り層はいずれも成長メルト
中にInP結晶小片が浮遊する2相溶液法によって成長
を行ない、メサ上面で成長しないように、成長温度等の
条件を適切に設定することにより再現性よく結晶成長を
行なえた。以上のように結晶成長を行なった素子にp形
オーミック電極12.n形オーミック電極13を形成し
、適当な共振器長に切り出して所望の位相同期型BH−
LDアレイを得た。
Etched grooves 7 on both sides of the 9 phase synchronized array with a depth of 3 μm
The width is 10 μm to prevent light from seeping out to the outside of the phase-locked BH-LD array and suffering absorption loss there. Each mesa stripe 5 had a width of 1.5 μm in the active layer 30 portion. For simplicity, a phase-locked laser composed of five BH-LDs is shown here, but the number can be further increased in order to achieve high output. Even in this case, a sufficiently good device can be obtained by slightly selecting the epitaxial growth conditions in the buried growth step after etching. In the second LPE growth on the DH wafer subjected to mesa etching as described above, p-In196"0.04A80.10PO with a composition close to InP corresponding to an emission wavelength of approximately 0.97 μm was grown.
, 90 current blocking layer 8. n-InP current current plug 2
The two layers 9 are also shifted except for only the top surface of the mesa stripe 5, and the p-InP buried layer 101 has p"0.78Ga0.22"0.48P0.5 corresponding to the emission wavelength of 1.2 μm.
Two electrode layers 11 are laminated over the entire surface. P”0.
96"0.04"Q, 10PO, 9G current blocking layer 8
Both the n-InP current layer and the n-InP current layer are grown by a two-phase solution method in which small InP crystal pieces are suspended in the growth melt, and conditions such as growth temperature are appropriately set to prevent growth on the top surface of the mesa. This allowed crystal growth to be performed with good reproducibility. A p-type ohmic electrode 12. An n-type ohmic electrode 13 is formed and a desired phase-locked BH-
An LD array was obtained.

このような位相同期型BI(−LDアレイにおいてBH
活性層8個、共振器長250μmとした素子で、室温C
Wでの発振しきい値電流150mA、微分量子効率50
−60%、室温での最大CW出力300mW程度の素子
が再現性よく得られた。埋め込み活性層の上下をInP
でクラッドし、左右をp −”0.96”O,04AI
I0.10PO,90というInPよりもやや屈折率の
大きな半導体層で埋め込むことにより、活性層幅1.5
μm、活性層どうしの間かくが311mでも相互の位相
結合は十分良好であシ、高い歩留シで00位相シフト動
作が得られておシ、そのときの発光遠視野像のビーム拡
がυ角は半値全幅で4°から5゜の単一ローブであった
Such a phase synchronized BI (BH in -LD array)
The device has 8 active layers and a cavity length of 250 μm, and the temperature at room temperature C
Oscillation threshold current at W 150mA, differential quantum efficiency 50
-60%, a device with a maximum CW output of about 300 mW at room temperature was obtained with good reproducibility. InP on the top and bottom of the buried active layer
clad with p-”0.96”O,04AI on the left and right
By embedding with a semiconductor layer of I0.10PO,90, which has a slightly higher refractive index than InP, the active layer width can be reduced to 1.5
μm, even if the distance between the active layers is 311 m, the mutual phase coupling is sufficiently good, and 00 phase shift operation can be obtained with a high yield, and the beam expansion of the emission far-field pattern at that time is υ The angle was a single lobe of 4° to 5° full width at half maximum.

本発明の実施例においては、電流閉じ込めの効果的なり
I(−LDを横方向に複数個配列し、かつ横方向での屈
折率差を小さくするだめに埋め込み活性層の上下をIn
P層でクラッドし、同時に横をInPに近い組成のP 
”0.96”0.04A80.10PO,90電流ブロ
ック層8でクラッドした。それによって良好な位相同期
が得られ、従来例と比べて特性の再現性、製造の歩留り
が大幅に向上した位相同期型BH−LDアレイが得られ
た。
In the embodiment of the present invention, in order to increase the effectiveness of current confinement and to arrange a plurality of LDs in the lateral direction and to reduce the difference in refractive index in the lateral direction, the upper and lower portions of the buried active layer are
Cladding with P layer, and at the same time P layer with composition close to InP on the side.
Clad with "0.96" 0.04A80.10PO,90 current blocking layer 8. As a result, good phase synchronization was obtained, and a phase-synchronized BH-LD array with significantly improved characteristic reproducibility and manufacturing yield compared to the conventional example was obtained.

なお本発明の実施例においては5つないし、8つの発光
活性層を有する素子を示しだが、もちろんその数は20
個以上の大きなものであってもかまわない。埋め込み構
造についても実施例においてはメサストライプの両側を
エツチング溝がはさむ構成のものを示したが、もちろん
これに限ることなく、溝の内部に埋め込み活性層を形成
するもの等であって何らさしつかえない。用いる半導体
材料もInPを基板、 InGaAgPを活性層とする
波長1μm帯の材料を示したが、これに限らず、GaA
tAs / GaAs 、 InGaAaP / Ga
AsP等他の半等信材料を用いて何ら差しつかえない。
In the examples of the present invention, elements having five to eight light emitting active layers are shown, but of course the number is 20.
It doesn't matter if it is larger than one piece. As for the buried structure, in the embodiment, a structure in which etched grooves are sandwiched between both sides of a mesa stripe is shown, but of course the structure is not limited to this, and any structure in which an active layer is formed buried inside the groove is acceptable. . The semiconductor material used is a material with a wavelength band of 1 μm using InP as a substrate and InGaAgP as an active layer, but is not limited to this.
tAs/GaAs, InGaAaP/Ga
There is no problem in using other semi-credible materials such as AsP.

さらに単純なファプリペロー型のB H−L Dだけで
なく、DFB/DBR−LD等を用いて構成してもかま
わない。
Furthermore, in addition to the simple Fapre-Perot type B H-LD, it is also possible to use a DFB/DBR-LD or the like.

本発明の特徴は複数の活性層が位相同期して発振する位
相同期型の半導体レーザアレイにおいて、個々のレーザ
にBH−LDを採用し、同時に埋め込み活性層の横を、
上下をはさむクラッド層よりも屈折率の大きな半導体材
料を用いて埋め込んだことである。それによって良好な
位相同期が得られ、低い発振しきい値電流、高い微分量
子効率、高出力CW動作等の優れた特性のみならず、特
性の再現性、製造歩留りが従来例と比べて大幅に向上し
た位相同期型のBH−LDアレイが得られた。
The feature of the present invention is that in a phase-locked semiconductor laser array in which a plurality of active layers oscillate in phase synchronization, a BH-LD is adopted for each laser, and at the same time, the side of the buried active layer is
This is done by using a semiconductor material with a higher refractive index than the cladding layers sandwiching the top and bottom. As a result, good phase synchronization is obtained, and not only excellent characteristics such as low oscillation threshold current, high differential quantum efficiency, and high power CW operation are obtained, but also the reproducibility of characteristics and manufacturing yield are significantly improved compared to conventional examples. An improved phase-locked BH-LD array was obtained.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例である位相同期型BH−LDの斜
視図である。図中1はn −InP基板、2はn −I
nPバッファ層、3はIf’+1.71 Gm6.2B
Aso、t3@Po、3g活性層、4はp −InPク
ラッド層、5はメサストライプ、6,7はエツチング溝
、8はp−InO,96Ga 6,64 As 646
 P 0,90電流ブロック層、9はn −InP電流
ブロック層、10はp −1nP埋め込み層、11はp
 −1n6.qB Gao、2.、A−so、4BP6
.52電極層、12はp形オーミック電極、13はn形
オーミック電極をそれぞれあられす。
The figure is a perspective view of a phase-locked BH-LD which is an embodiment of the present invention. In the figure, 1 is an n-InP substrate, 2 is an n-I
nP buffer layer, 3 is If'+1.71 Gm6.2B
Aso, t3@Po, 3g active layer, 4 is p-InP cladding layer, 5 is mesa stripe, 6 and 7 are etching grooves, 8 is p-InO, 96Ga 6,64 As 646
P 0,90 current blocking layer, 9 is n-InP current blocking layer, 10 is p-1nP buried layer, 11 is p
-1n6. qB Gao, 2. , A-so, 4BP6
.. 52 electrode layers, 12 a p-type ohmic electrode and 13 an n-type ohmic electrode.

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に、活性層の周囲が、前記活性層よシもエ
ネルギーギャップが大きく、かつ屈折率の小さな半導体
層でおおわれた埋め込みへテロ構造を複数個備え、さら
に、隣シあう前記活性層の間に、前記活性層の上下をは
さむ半導体層よシも屈折率の大きな半導体層が形成され
ていることを特徴とする半導体レーザ。
A semiconductor substrate is provided with a plurality of buried heterostructures in which the periphery of an active layer is covered with a semiconductor layer having a larger energy gap and a smaller refractive index than the active layer; A semiconductor laser characterized in that a semiconductor layer having a higher refractive index than the semiconductor layers sandwiching the active layer above and below is formed between the active layer and the active layer.
JP24126583A 1983-12-21 1983-12-21 Semiconductor laser Pending JPS60133780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24126583A JPS60133780A (en) 1983-12-21 1983-12-21 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24126583A JPS60133780A (en) 1983-12-21 1983-12-21 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPS60133780A true JPS60133780A (en) 1985-07-16

Family

ID=17071677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24126583A Pending JPS60133780A (en) 1983-12-21 1983-12-21 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS60133780A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63207189A (en) * 1987-02-24 1988-08-26 Mitsubishi Electric Corp Semiconductor laser
JP2013514659A (en) * 2009-12-16 2013-04-25 ウィスコンシン アラムニ リサーチ ファンデーション High power quantum cascade laser with active photonic crystal structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63207189A (en) * 1987-02-24 1988-08-26 Mitsubishi Electric Corp Semiconductor laser
JP2013514659A (en) * 2009-12-16 2013-04-25 ウィスコンシン アラムニ リサーチ ファンデーション High power quantum cascade laser with active photonic crystal structure

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